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STM32 Quad Encoder bug fixes

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4437 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-02-28 18:39:37 +00:00
parent 391d33732c
commit ff6f30399f
2 changed files with 17 additions and 5 deletions
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20
arch/arm/src/stm32/stm32_qencoder.c
View File

@ -124,7 +124,7 @@
/* If TIM1,3,4, or 8 are enabled, then we have 16-bit timers */
# if defined(CONFIG_STM32_TIM1_QE) || defined(CONFIG_STM32_TIM3_QE) || \
# defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM38_TIM3_QE)
# defined(CONFIG_STM32_TIM4_QE) || defined(CONFIG_STM32_TIM8_QE)
# define HAVE_16BIT_TIMERS 1
# endif
@ -296,7 +296,9 @@ static const struct stm32_qeconfig_s g_tim1config =
.psc = (STM32_APB2_TIM1_CLKIN / CONFIG_STM32_TIM1_QECLKOUT) - 1,
.ti1cfg = GPIO_TIM1_CH1IN,
.ti2cfg = GPIO_TIM1_CH2IN,
#if TIM1_BITWIDTH == 16
.handler = stm32_tim1interrupt,
#endif
};
static struct stm32_lowerhalf_s g_tim1lower =
@ -320,7 +322,9 @@ static const struct stm32_qeconfig_s g_tim2config =
.psc = (STM32_APB1_TIM2_CLKIN / CONFIG_STM32_TIM2_QECLKOUT) - 1,
.ti1cfg = GPIO_TIM2_CH1IN,
.ti2cfg = GPIO_TIM2_CH2IN,
#if TIM2_BITWIDTH == 16
.handler = stm32_tim2interrupt,
#endif
};
static struct stm32_lowerhalf_s g_tim2lower =
@ -344,7 +348,9 @@ static const struct stm32_qeconfig_s g_tim3config =
.psc = (STM32_APB1_TIM3_CLKIN / CONFIG_STM32_TIM3_QECLKOUT) - 1,
.ti1cfg = GPIO_TIM3_CH1IN,
.ti2cfg = GPIO_TIM3_CH2IN,
#if TIM3_BITWIDTH == 16
.handler = stm32_tim3interrupt,
#endif
};
static struct stm32_lowerhalf_s g_tim3lower =
@ -368,7 +374,9 @@ static const struct stm32_qeconfig_s g_tim4config =
.psc = (STM32_APB1_TIM4_CLKIN / CONFIG_STM32_TIM4_QECLKOUT) - 1,
.ti1cfg = GPIO_TIM4_CH1IN,
.ti2cfg = GPIO_TIM4_CH2IN,
#if TIM4_BITWIDTH == 16
.handler = stm32_tim4interrupt,
#endif
};
static struct stm32_lowerhalf_s g_tim4lower =
@ -392,7 +400,9 @@ static const struct stm32_qeconfig_s g_tim5config =
.psc = (STM32_APB1_TIM5_CLKIN / CONFIG_STM32_TIM5_QECLKOUT) - 1,
.ti1cfg = GPIO_TIM5_CH1IN,
.ti2cfg = GPIO_TIM5_CH2IN,
#if TIM5_BITWIDTH == 16
.handler = stm32_tim5interrupt,
#endif
};
static struct stm32_lowerhalf_s g_tim5lower =
@ -416,7 +426,9 @@ static const struct stm32_qeconfig_s g_tim8config =
.psc = (STM32_APB2_TIM8_CLKIN / CONFIG_STM32_TIM8_QECLKOUT) - 1,
.ti1cfg = GPIO_TIM8_CH1IN,
.ti2cfg = GPIO_TIM8_CH2IN,
#if TIM8_BITWIDTH == 16
.handler = stm32_tim8interrupt,
#endif
};
static struct stm32_lowerhalf_s g_tim8lower =
@ -643,11 +655,11 @@ static int stm32_interrupt(FAR struct stm32_lowerhalf_s *priv)
regval = stm32_getreg16(priv, STM32_GTIM_CR1_OFFSET);
if ((regval & ATIM_CR1_DIR) != 0)
{
priv->position -= (int32_t)0x0000fff0;
priv->position -= (int32_t)0x0000ffff;
}
else
{
priv->position += (int32_t)0x0000fff0;
priv->position += (int32_t)0x0000ffff;
}
return OK;
@ -871,7 +883,7 @@ static int stm32_setup(FAR struct qe_lowerhalf_s *lower)
#ifdef HAVE_16BIT_TIMERS
#ifdef HAVE_MIXEDWIDTH_TIMERS
if (priv->config->width != 32)
#else
#endif
{
/* Attach the interrupt handler */

2
configs/stm32f4discovery/src/up_qencoder.c
View File

@ -170,7 +170,7 @@ int qe_devinit(void)
{
/* Initialize a quadrature encoder interface. */
qevdbg("Initializing the quadrature encoder\n");
qevdbg("Initializing the quadrature encoder using TIM%d\n", TIMID);
ret = stm32_qeinitialize("/dev/qe0", TIMID);
if (ret < 0)
{