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risc-v: Restrict Fence instruction for chips that support S-mode

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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
Gustavo Henrique Nihei 2022-04-27 09:42:42 -03:00 committed by Xiang Xiao
parent 1967805b91
commit ffab2dc628
1 changed files with 6 additions and 1 deletions
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7
arch/risc-v/src/common/riscv_pmp.c
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@ -600,9 +600,14 @@ int riscv_config_pmp_region(uintptr_t region, uintptr_t attr,
# error "XLEN of risc-v not supported" # error "XLEN of risc-v not supported"
# endif # endif
/* fence is needed when page-based virtual memory is implemented */ #ifdef CONFIG_ARCH_USE_S_MODE
/* Fence is needed when page-based virtual memory is implemented.
* If page-based virtual memory is not implemented, memory accesses check
* the PMP settings synchronously, so no SFENCE.VMA is needed.
*/
__asm volatile("sfence.vma x0, x0" : : : "memory"); __asm volatile("sfence.vma x0, x0" : : : "memory");
#endif
return OK; return OK;
} }