arch/arm: only compare callee-saved registers for fpu
Registers S0-S15 (D0-D7, Q0-Q3) do not need to be preserved. They can be used for passing arguments or returning results in standard procedure-call variants. Registers D16-D31 (Q8-Q15), do not need to be preserved. Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
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@ -36,6 +36,8 @@
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#ifdef CONFIG_ARCH_FPU
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# define FPU_CALLEE_REGS (16)
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -60,6 +62,10 @@ bool up_fpucmp(const void *saveregs1, const void *saveregs2)
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const uint32_t *regs1 = saveregs1;
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const uint32_t *regs2 = saveregs2;
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return memcmp(®s1[REG_S0], ®s2[REG_S0], 4 * FPU_CONTEXT_REGS) == 0;
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/* Only compare callee-saved registers, caller-saved registers do not
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* need to be preserved.
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*/
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return memcmp(®s1[REG_S16], ®s2[REG_S16], 4 * FPU_CALLEE_REGS) == 0;
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}
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#endif /* CONFIG_ARCH_FPU */
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@ -60,10 +60,12 @@ bool up_fpucmp(const void *saveregs1, const void *saveregs2)
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const uint32_t *regs1 = saveregs1;
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const uint32_t *regs2 = saveregs2;
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/* Only compare callee-saved registers, caller-saved registers do not
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* need to be preserved.
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*/
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/* compare of hardware fp registers should skip REG_FP_RESERVED */
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return memcmp(®s1[REG_S0], ®s2[REG_S0],
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4 * (HW_FPU_REGS - 1)) == 0 &&
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memcmp(®s1[REG_S16], ®s2[REG_S16], 4 * SW_FPU_REGS) == 0;
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return memcmp(®s1[REG_S16], ®s2[REG_S16], 4 * SW_FPU_REGS) == 0;
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}
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#endif /* CONFIG_ARCH_FPU */
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@ -36,6 +36,8 @@
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#ifdef CONFIG_ARCH_FPU
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# define FPU_CALLEE_REGS (16)
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -60,6 +62,10 @@ bool up_fpucmp(const void *saveregs1, const void *saveregs2)
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const uint32_t *regs1 = saveregs1;
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const uint32_t *regs2 = saveregs2;
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return memcmp(®s1[REG_S0], ®s2[REG_S0], 4 * FPU_CONTEXT_REGS) == 0;
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/* Only compare callee-saved registers, caller-saved registers do not
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* need to be preserved.
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*/
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return memcmp(®s1[REG_S16], ®s2[REG_S16], 4 * FPU_CALLEE_REGS) == 0;
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}
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#endif /* CONFIG_ARCH_FPU */
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@ -60,10 +60,12 @@ bool up_fpucmp(const void *saveregs1, const void *saveregs2)
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const uint32_t *regs1 = saveregs1;
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const uint32_t *regs2 = saveregs2;
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/* Only compare callee-saved registers, caller-saved registers do not
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* need to be preserved.
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*/
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/* compare of hardware fp registers should skip REG_FP_RESERVED */
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return memcmp(®s1[REG_S0], ®s2[REG_S0],
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4 * (HW_FPU_REGS - 1)) == 0 &&
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memcmp(®s1[REG_S16], ®s2[REG_S16], 4 * SW_FPU_REGS) == 0;
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return memcmp(®s1[REG_S16], ®s2[REG_S16], 4 * SW_FPU_REGS) == 0;
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}
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#endif /* CONFIG_ARCH_FPU */
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@ -41,6 +41,12 @@
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#include "arm64_fatal.h"
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#include "arm64_fpu.h"
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/***************************************************************************
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* Pre-processor Definitions
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***************************************************************************/
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#define FPU_CALLEE_REGS (8)
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/***************************************************************************
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* Private Data
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***************************************************************************/
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@ -245,5 +251,10 @@ bool up_fpucmp(const void *saveregs1, const void *saveregs2)
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const uint64_t *regs1 = saveregs1 + XCPTCONTEXT_GP_SIZE;
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const uint64_t *regs2 = saveregs2 + XCPTCONTEXT_GP_SIZE;
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return memcmp(regs1, regs2, 8 * XCPTCONTEXT_FPU_REGS) == 0;
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/* Only compare callee-saved registers, caller-saved registers do not
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* need to be preserved.
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*/
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return memcmp(®s1[FPU_REG_Q4], ®s2[FPU_REG_Q4],
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8 * FPU_CALLEE_REGS) == 0;
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}
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