Commit Graph

41 Commits

Author SHA1 Message Date
lipengfei28
1cb81f9a8f armv7a pci irq support
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
f2a4d59900 pci/pci_ecam: add read_io/write_io for pci ecam
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
fb97285a36 drivers/pci: one pci device should only associate with one driver
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
dbcef4f297 drivers/pci: change all devfn type to unsigned int
Now all the type of devfn in pci framework are unsigned int

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
Yongrong Wang
fe1286b44a pci.c: fix compile warning
pci/pci.c:1128:15: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'uint32_t' {aka 'long unsigned int'} [-Wformat=]
 1128 |       pciinfo("Limit MME to %x, num to %d\n", mmc, num);
      |               ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  ~~~
      |                                               |
      |                                               uint32_t {aka long unsigned int}
pci/pci.c:1128:30: note: format string is defined here
 1128 |       pciinfo("Limit MME to %x, num to %d\n", mmc, num);
      |                             ~^
      |                              |
      |                              unsigned int
      |                             %lx

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-10-10 15:31:08 +02:00
p-szafonimateusz
87b940a611 drivers/pci_qemu_test.c: fix compiler warning
pci/pci_qemu_test.c:218:6: warning: ‘ops’ may be used uninitialized [-Wmaybe-uninitialized]
  218 |   ops->write(dev->bus, &hdr->test, num, sizeof(num));
      |   ~~~^~~~~~~
pci/pci_qemu_test.c: In function ‘pci_qemu_test_probe’:
pci/pci_qemu_test.c:286:41: note: ‘ops’ was declared here
  286 |   FAR const struct pci_qemu_test_ops_s *ops;
      |

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-10-10 15:31:08 +02:00
wangyongrong
7f4f7f293d pci.c: fix pci 32bit warning
pci/pci.c:863:66: warning: right shift count >= width of type [-Wshift-count-overflow]
  863 |       pci_write_config_dword(dev, msi + PCI_MSI_ADDRESS_HI, (mar >> 32));

Signed-off-by: wangyongrong <wangyongrong@xiaomi.com>
2024-10-10 15:31:08 +02:00
Bowen Wang
1407a44862 drivers/pci/pci.c: fix warning when CONFIG_PCI_ASSIGN_ALL_BUSES=n
pci/pci.c:415:34: warning: variable ‘res’ set but not used [-Wunused-but-set-variable]
  415 |       FAR struct pci_resource_s *res;
      |                                  ^~~
pci/pci.c: In function ‘pci_scan_bus’:
pci/pci.c:663:32: warning: unused variable ‘ctrl’ [-Wunused-variable]
  663 |   FAR struct pci_controller_s *ctrl = bus->ctrl;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-10-10 15:31:08 +02:00
lipengfei28
519c5c86aa add pci irq interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-10 15:31:08 +02:00
yangshuyong
a537ecdd0f Support nuttx pci endpoint driver framework
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-23 10:03:54 +02:00
lipengfei28
ca39dc2e74 math: Optimize the implementation of log2ceil and log2floor
and move common math funtions to math32.h:
div_round_up
div_round_closest
is_power_of_2
roundup_pow_of_two
rounddown_pow_of_two

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-23 10:03:54 +02:00
p-szafonimateusz
1e212981b9 drivers/net: add support for Intel I225 network card
add support for Intel I225 network card

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-17 01:42:38 +08:00
p-szafonimateusz
bc0c7b0db3 drivers/net: add Intel e1000 network card support
add Intel e1000 network card support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-17 01:42:38 +08:00
p-szafonimateusz
51909ed59f drivers: fix gcc14 errors for PCI
fix gcc14 errors for PCI

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
p-szafonimateusz
a0e00b993a intel64: register PCI controller early but postpone PCI drivers init
Some of PCI drivers require OS interfaces that can't be executed in the INIT context.
In that case we have to postpone PCI drivers probing and call it for example
in board initialization logic.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
p-szafonimateusz
393ed71d81 pci_drivers.c: initialize ret to avoid compiler warnings
initialize ret to avoid compiler warnings in pci_drivers.c

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
Xiang Xiao
1d586c3bee pci: Add driver_data to pci_device_id_s
so driver writer could save the private data here
and get it back in the probe function.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-09-15 03:37:58 +08:00
wangyongrong
877e462990 vitrio-pci.c: add virtio-pci transport support for Nuttx
1. only support pci modern device;
2. need the pci controller support MSI/MSI-X;
It has been verified based on virtio-rng and virtio-net.

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-15 02:22:16 +08:00
Yongrong Wang
67e41d0e32 rpmsg/rpmsg_virtio_ivshmem: add rpmsg virtio ivshmem support
rpmsg_virtio_ivshmem is a ivshmem based rpmsg virtio driver,
with this driver, we can use the rpmsg virtio in qemu platfrom

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-14 17:34:52 +08:00
Bowen Wang
7a495fabb6 pci/pci_uio_ivshmem: pci uio ivshmem msix interrupt support
1. Change pci uio ivshmem driver from pci bus based tp pci-ivshmem
bus based;
2. Add the interrupt support by usin the pci_ivshmem API;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-14 08:39:52 +08:00
p-szafonimateusz
4a147fc86b drivers/pci_qemu_edu: add MSI test
Add simple MSI test for QEMU PCI EDU device so we can verify if MSI works correctly

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 09:42:08 +08:00
p-szafonimateusz
db6d0bd356 drivers/pci: add MSI/MSI-X support
Add support for MSI and MSI-X in PCI framework

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-13 09:42:08 +08:00
p-szafonimateusz
ff2fe986cf cmake: add support for PCI
PCI framework can be build with cmake

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-12 18:11:13 +08:00
Bowen Wang
4fe2a0daf8 pci/pci.c: fix some pci BUGs
fix some pci BUGs that make it impossible to match PCI device

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-12 18:10:46 +08:00
Bowen Wang
9c91ed2360 pci/pci_ivshmem: fix bug in remove and add vmid check
1. Should check the vmid in ivshmem_remove() when release irq instead
check the ivdev->reg;
2. Add vmid check in ivshmem_probe() because ivshmem driver only support
vmid == 0 or 1 for now in NuttX;

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-10 14:34:31 +08:00
Bowen Wang
218210d26e pci/pci_ivshmem: add pci ivshmem driver support
Add common ivshmem driver, provide the ivshmem bus mechisam, so
many ivshmem based driver can change to pci_ivshmem based

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-10 14:34:31 +08:00
Bowen Wang
ccb17f2bb4 pci/pci_uio_ivshmem: add pci uio ivshmem driver support
Application can open "/dev/uioX" and use `mmap()` to get the
memory provided by ivshmem device.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-10 14:34:31 +08:00
Bowen Wang
f8ba836174 rptun/rptun_ivshmem: add rptun ivshmem support
Rptun is a rptun fremework driver base on the Inter-Virtual Machine
Share Memory Device.
With this driver, two NuttX runs in different QEMU can communicate
with each other by the rpmsg api.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-10 14:34:31 +08:00
lipengfei28
aeb98d9c05 fix Compile error
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
b70922cb24 pci: add ioctl for userspace
which is same as OpenBSD:
https://github.com/openbsd/src/blob/master/sys/sys/pciio.h

Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
dba7700813 pci: add rom addr and rom size to resource
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
3250625a15 pci: add find device from bus
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
c25f839b06 pci: add pci bus find capability interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
45f1597562 pci: add pci read/write config/io space interface
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
lipengfei28
d9c8838319 pci: use g_pci_ctrl_list replace g_root_bus_list
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
75f8c72dbb drivers/pci/pci_qemu_edu: update qemu edu driver code
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
9c07b369e9 drivers/pci/pci_qemu_test: update qemu pci test code
Change the qmeu pci test code for new pci driver framework

Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
7cbb7d36d8 Changed the x86 64 pci driver
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
yangshuyong
125884ae95 Changed the pci bus for arm architecture
Signed-off-by: yangshuyong <yangshuyong@xiaomi.com>
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-09-06 10:01:11 +08:00
raiden00pl
a12fdd8876 cosmetic changes after pci code rebase 2024-01-25 09:09:30 -08:00
Brennan Ashton
69ed5bb67d Various fixes for PCI work
Squashed commits:

1. Porting prior PCI work in place of jailhouse code

At this point the PCI enumeration works for x86_64 including over
pci-pci bridges.

Running QEMU with this configuration we see the bridge and the
device on the bridge.  It also detected the qemu test device

qemu-system-x86_64 \
  -cpu host,+pcid,+x2apic,+tsc-deadline,+xsave,+rdrand \
  --enable-kvm -smp 1 -m 2G -cdrom boot.iso --nographic -no-reboot \
  -device pci-testdev \
  -device pci-bridge,id=bridge0,chassis_nr=2 \
  -device e1000,bus=bridge0,addr=0x3

qemu_pci_init: Initializing PCI Bus
pci_probe_device: [00:00.0] Found 8086:1237, class/revision 06000002
pci_probe_device: [00:01.1] Found 8086:7010, class/revision 01018000
pci_probe_device: [00:01.2] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.3] Found 8086:7113, class/revision 06800003
pci_probe_device: [00:01.4] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.5] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.6] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.7] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:02.0] Found 1234:1111, class/revision 03000002
pci_probe_device: [00:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:04.0] Found 1b36:0005, class/revision 00ff0000
pci_probe_device: [00:04.0] Probing
pci_check_pci_bridge: [00:05.0] Found Bridge
pci_probe_device: [01:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:05.0] Found 1b36:0001, class/revision 06040000

2. Remove unused CONFIG_PCI_MAX_BDF option

3. Add a workaround for Jailhouse pci scanning

4. Extend BAR parsing and handle PIO and MMIO for pci-testdev

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

5. PCI: Add initial support for QEMU 'edu' test device

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

6. Bring up PCI later in boot process

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

7. Add ISR and DMA support to QEMU edu test pci device

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

8. Fix bad function prototype definition in qemu_edu

9. intel64:  Add a pci test configuration and instructions

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>

10. PCI: Fix issue in identification of 64bit bar

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2024-01-25 09:09:30 -08:00