Commit Graph

15764 Commits

Author SHA1 Message Date
ligd
a1836de09a fdt: move fdx_xx extend APIs from boards to drivers
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-22 18:51:33 +08:00
Ville Juven
7a2edf9414 stm32f7/stm32_foc.c: Set .info_get to foc_lower_ops
This fixes build error (Werror):

Error: chip/stm32_foc.c:1918:12: error: 'stm32_foc_info_get' defined but not used [-Werror=unused-function]
 1918 | static int stm32_foc_info_get(struct foc_dev_s *dev, struct foc_info_s *info)
      |            ^~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
2024-03-21 19:53:29 +08:00
Jukka Laitinen
0dee4eb7f0 arch/arm/src/imxrt/imxrt_start.c: Clear CONTROL register at start to make sure we use MSP as the stack pointer
When entering the function from an external bootloader, the CPU could be using PSP. But the following
code expects MSP to be in use.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-03-21 18:45:00 +08:00
ligd
327d0789e4 arch: add ARCH_TRUSTZONE_DISABLED choice
We can decide whether use trustzone

After this patch, we can support the following mode:

                             ARCH_HAVE_TRUSTZONE   ARCH_TRUSTZONE_DISABLED  ARCH_TRUSTZONE_SECURE  ARCH_TRUSTZONE_NONSECURE

Without Security Extensions         n                       n                       n                         n
CHIP have NO trustzone

With Security Extensions            y                       y                       n                         n
Only one bin in sec mode

With Security Extensions            y                       n                       y                         n
TEE bin in sec mode

With Security Extensions            y                       n                       n                         y
REE bin in non-sec mode

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-19 18:24:42 +09:00
zhangyuan21
9c0d2e1a3c armv7-a/gicv2: move IRQ to group1 and group0 as the FIQ
Purpose: make the the os crash when busyloop with interrupt disable

Follow the arm gicv2 spec, if we want to use the IRQ and FIQ
simultaneously when not using the processor Security Externsions.
We should:
1. IRQ to Group 1 and FIQ to Group 0;
2. Set CICC_CTLR.FIQEn to 1;

Then in NuttX:
1. implement the arm_decodefiq and directly crash in it;
2. provide interface to change the IRQ to FIQ, e.g. change the
   watchdog IRQ to FIQ, so the watchdog can trigger even with the
   interrupt disabled (up_irq_save() called);

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-19 18:24:42 +09:00
Jorge Guzman
8e0bf9a0b4 stm32h7/linum-stm32h753bi: Add buzzer support
Signed-off-by: Jorge Guzman <jorge.gzm@gmail.com>
2024-03-18 13:48:59 +08:00
Michał Łyszczek
87cec8d5c7 stm32f40xxx_pinmap: add 3rd alternate mapping for USART6
Some stm32 has alternate USART6 pinout on G9/G14 but others have it
on A12/A11. Unfortunately it's very difficult to make proper ifdefs for
this since position is based on package (and pincount) and not chip
itself. Creating such list would take a lot of time. Because of that
I just added another possible config for this pin and moved responsibility
of proper selection onto board code.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2024-03-12 10:09:59 -03:00
Michał Łyszczek
02dc6fa219 stm32_serial.c: fix compilation of onewire driver mode
Onewire driver wants to use "struct up_dev_s *priv", which is extracted
from "struct uart_dev_s" and "struct inode". But inode and uart dev are
only declared when TERMIOS or BSDCOMPAT is also enabled. Without these
driver fails to compile with missing declaration errors. Adding some
additional "#if defined()" to these declarations fix the issue and driver
compiles and works properly (tested with ds18b20 temp sensor).

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2024-03-12 13:45:41 +01:00
Nicolas Lemblé
63782c7ff2 arch/xmc4 Add tickless support 2024-03-11 13:56:07 -03:00
Pressl, Štěpán
9f7f3a6e3a SAMV7: fix typos in Kconfig PWM0 fault input selections - inv. polarity 2024-03-09 18:32:58 -03:00
raiden00pl
be1750d041 arch/nrf91: fix compilation for SPI
remove references to unsupported SPI freq and SPI4 which is not supported
2024-03-10 01:43:11 +08:00
raiden00pl
d33846046e arch/nrf{52|53|91}: fix typo
fix typo sndlock -> sndblock
2024-03-10 01:43:11 +08:00
Sammy Tran
b4b7710c63 Disable interrupt during FTFC operation 2024-03-06 13:31:48 -03:00
Yanfeng Liu
a66c7c3ee1 comments/docs: fix typos in comments
This fix some typos in comments.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-06 13:31:50 +08:00
trns1997
54e9e582d5 Use C++ standard lib from toolchain
Signed-off-by: trns1997 <trns1997@gmail.com>
2024-03-06 08:42:44 +08:00
ligd
113ab704c7 goldfish & qemu: handle MMU table and CONFIG_RAM_END
Reproduce:

configure:
./tools/configure.sh qemu-armv7a:nsh -j8
open kasan:
CONFIG_MM_KASAN=y
run:
qemu-system-arm -cpu cortex-a7 -nographic -machine virt,virtualization=off,gic-version=2 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
error:
run hanged

Rootcause:

In Qemu armv7a, the ram-end reserved for MMU PGTABLE:

And the up_allocate_heap()  directly use the ram-end for heap in arch/arm/src/common/arm_allocateheap.c

*heap_size  = CONFIG_RAM_END - g_idle_topstack;

Then they are conflict.
Usually, we won't use the heap end, so can't find the error.
BUT, the KASAN will use the heap end for shadow, so found the error.

Resolve:

up_allocate_heap() consider of MMU, re-define the RAM_END at chip.h

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-06 09:26:44 +09:00
raiden00pl
a20b3e8335 arch/nrf{52|53|91}/spi: fix error message
wrong parameters were passed to spierr()
2024-03-06 00:50:00 +08:00
Michal Lenc
44a087111d samv7: add support for USART TX DMA transfers
This commit adds support for TX DMA transfers for USART peripheral. Code
refactor in sam_serial.h was also required in order to have correct
defines for all possible cases (both RX and TX DMA used, just one used,
none used).

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-03-05 09:48:03 +08:00
Tiago Medicci Serrano
dcad39a962 arch: Fix style warnings regarding included header files
This commit fixes style warnings regarding including header files
outside the `Included Files` section.
2024-03-05 09:45:49 +08:00
Tiago Medicci Serrano
ae9ef972c0 paging: Rename existing CONFIG_PAGING to CONFIG_LEGACY_PAGING
Current `CONFIG_PAGING` refers to an experimental implementation
to enable embedded MCUs with some limited RAM space to execute
large programs from some non-random access media.

On-demand paging should be implemented for the kernel mode with
address environment implementation enabled.
2024-03-05 09:45:49 +08:00
SPRESENSE
3b3f2d97e9 arch: cxd56: Follow interface change of set_buf() operation
set_buf() operation is changed to have the argument about
format. Follow the change.
2024-03-04 20:39:44 +08:00
ligd
91f0a0f1a8 Revert "goldfish & qemu: handle MMU table and CONFIG_RAM_END"
This reverts commit 2f7b107608.

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-04 18:08:15 +08:00
ligd
b599fdbc0e stm32: fix compile failed
Error: chip/stm32_sdmmc.c:1911:7: error: variable 'regaddress' is used uninitialized whenever 'if' condition is false [-Werror,-Wsometimes-uninitialized]
 1911 |   if (priv->base == STM32_SDMMC1_BASE)

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-04 18:08:15 +08:00
ligd
2f7b107608 goldfish & qemu: handle MMU table and CONFIG_RAM_END
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 18:57:32 +08:00
ligd
7d45afe871 armv7-a/r: use _ebss as idle stack both in SMP mode or not
It is better take the _ebss as IDLE_STACK_BASE like armv8-m

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:25:03 +08:00
ligd
51d8bbfbd9 armv7-a/r: use arm_timer to setup perf
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:19:37 +08:00
ligd
5aeab4a36c armv7-a timer:fix timer overflow.
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:19:37 +08:00
ligd
8eddf00212 armv7a/r: use register cval to set timer
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:19:37 +08:00
ligd
dabed3c7fb armv7-a/r: correct maxdelay calculating
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-03 02:19:37 +08:00
Marco Casaroli
447cc9698f use apps-or-nuttx-Make.defs for archs
This will allow apps to tweak build configuration of NuttX
2024-03-01 12:59:16 -03:00
ligd
2241969e5a SMP: fix crash when switch to new task which is still running
cpu0 thread0:                        cpu1:
sched_yield()
nxsched_set_priority()
nxsched_running_setpriority()
nxsched_reprioritize_rtr()
nxsched_add_readytorun()
up_cpu_pause()
                                     IRQ enter
                                     arm64_pause_handler()
                                     enter_critical_section() begin
                                     up_cpu_paused() pick thread0
                                     arm64_restorestate() set thread0 tcb->xcp.regs to CURRENT_REGS
up_switch_context()
  thread0 -> thread1
arm64_syscall()
    case SYS_switch_context
     change thread0 tcb->xcp.regs
    restore_critical_section()
                                     enter_critical_section() done
                                     leave_critical_section()
                                     IRQ leave with restore CURRENT_REGS
                                     ERROR !!!

Reason:
As descript above, cpu0 swith task: thread0 -> thread1, and the
syscall() execute slowly, this time cpu1 pick thread0 to run at
up_cpu_paused(). Then cpu0 syscall execute, cpu1 IRQ leave error.

Resolve:
Move arm64_restorestate() after enter_critical_section() done

This is a continued fix with:
https://github.com/apache/nuttx/pull/6833

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-01 21:05:00 +09:00
chao an
6d50274ebe nuttx/list: rename container_of to list_container_of from public header
Use private naming to avoid conflicts with user applications

In file included from libuv/src/unix/internal.h:25,
                 from libuv/src/unix/udp.c:23:
libuv/src/uv-common.h:57: warning: "container_of" redefined
   57 | #define container_of(ptr, type, member) \
      |
In file included from nuttx/include/nuttx/list.h:47,
                 from nuttx/include/nuttx/tls.h:40,
                 from nuttx/include/nuttx/sched.h:48,
                 from nuttx/include/nuttx/arch.h:87,
                 from nuttx/include/nuttx/userspace.h:35,
                 from nuttx/include/nuttx/mm/mm.h:30,
                 from nuttx/include/nuttx/kmalloc.h:34,
                 from nuttx/include/nuttx/lib/lib.h:31,
                 from nuttx/include/stdio.h:35,
                 from apps/system/libuv/libuv/include/uv.h:59,
                 from libuv/src/unix/udp.c:22:
nuttx/include/nuttx/nuttx.h:48: note: this is the location of the previous definition
   48 | #define container_of(ptr, type, member) \
      |

Signed-off-by: chao an <anchao@lixiang.com>
2024-02-29 19:44:54 +08:00
chao an
b413a1f4f7 arm/armv8-r: fix build break if disable CONFIG_UART_PL011
Common code should support the if PL011 is not enabled

Signed-off-by: chao an <anchao@lixiang.com>
2024-02-27 21:22:40 +08:00
Michał Łyszczek
aa75b7f27c stm32/stm32f30xxx_rcc.c: fix broken flash setup
During removal of F1 related stuff, code that configures FLASH
latency was removed, which rendered some of the F3 line unbootable.

It was done by mistake, since previous removed block was
'#ifdef VALUE_LINE', and block with FLASH code was '#ifndef VALUE_LINE'
and so it should not have been removed.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2024-02-23 06:11:26 +01:00
chao an
f4bc5b5c6b cmake/toolchain: fix compiler warning on ARM32
-- Detecting CXX compile features
-- Detecting CXX compile features - done
arm-none-eabi-gcc: error:  -Wstrict-prototypes: No such file or directory
arm-none-eabi-gcc: error:  -Wstrict-prototypes: No such file or directory
-- Configuring done
-- Generating done

Signed-off-by: chao an <anchao@lixiang.com>
2024-02-21 00:43:42 -08:00
Rdk-T
cc95a76795 Add XMC4 flash command sequence API 2024-02-20 08:52:27 -08:00
Xiang Xiao
2e91c07ca7 Remove the back slash from long literal string
since the back slash is only needed for the long macro definition

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-02-19 16:43:15 +01:00
raiden00pl
02b418a7ea arch/arm/src/nrf52/CMakeLists.txt: format file 2024-02-18 07:40:41 -08:00
raiden00pl
b3b543e093 arch/nrf52: add initial support for IEEE 802.15.4
Supported features:

- frame transmition
- frame reception and filtering
- immediate ACK (incoming and outgoing)
- promiscuous mode
- delayed transmision
- radio events trace
- setting pending bit for all incoming Data Request frames
- un-slotted CSMA-CA

Work in progres features (some logic is present, but they require more work):

- beacon transmision (periodic transmition works, but requires verification)
- slotted CSMA-CA
- GTS

Fetures not implemented:

- enhanced ACK (Enh-ACK)
- enhanced beacon
- low power mode
- advanced features from IEEE 802.15.4e (DSME, TSCH)

Added examples for boards:

- nrf52832-dk: mrf24j40_6lowpan
- nrf52832-dk: mrf24j40_mac
- nrf52840-dk: ieee802154_6lowpan
- nrf52840-dk: ieee802154_mac
- nrf52840-dongle: ieee802154_mac
- nrf9160-dk-nrf52: ieee802154_6lowpan
- nrf9160-dk-nrf52: ieee802154_mac
2024-02-18 07:40:41 -08:00
raiden00pl
3f763f5d69 nrf52/nrf52_radio: various changes to support IEEE802154
- remove read-write logic - this should be handled by radio protocol implementation
- remove EVENTS and TASKS bit definitions - we can just use a signle definition
- add more radio ops
- fix frequency configuration
- fix printf warnings
- fix radio reset
2024-02-18 07:40:41 -08:00
raiden00pl
f4324e118e arch/nrf{52|53|91}: let the events from comparator correspond to CC id
this allows us to use the same value to set the comparator and handle comparator events,
making RTC easier to use
2024-02-17 05:00:35 -08:00
raiden00pl
a77c3b367a arch/nrf{52|53}/gpiote.c: fix event reconfiguration for a given pin
if a given pinset is already used, we need to update it, not add another event
2024-02-17 05:00:06 -08:00
raiden00pl
dbbe06193e arch/arm/src/nrf{52|53|91}/xxx_rtc.h: include nuttx/irq.h
fixes undefined xcpt_t error that sometimes occurs
2024-02-17 04:59:49 -08:00
Alan Carvalho de Assis
940f1bace0 arch/stm32h7: Clear all PWM channel when during STOP
I noticed when executing pwm STOP command in
multichannel mode, the channel still outputting.

This commit fixes this issue.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2024-02-15 21:27:22 -08:00
Alan Carvalho de Assis
5975b25951 arch/stm32f7: Clear all PWM channel when during STOP
I noticed when executing pwm STOP command in
multichannel mode, the channel still outputting.

This commit fixes this issue.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2024-02-15 21:27:22 -08:00
Alan Carvalho de Assis
6d346793ee arch/stm32: Clear all PWM channel when during STOP
I noticed when executing pwm STOP command in
multichannel mode, the channel still outputting.

This commit fixes this issue.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2024-02-15 21:27:22 -08:00
Nicolas Lemblé
4a85fbfd09 arch/xmc4: Fix CCU registers 2024-02-13 10:33:04 -03:00
Roberto Bucher
4a04c22147 STM32-H745 files for pysimCoder 2024-02-10 20:01:12 -03:00
trns1997
5c118967bb build xmc4800-relax using CMake 2024-02-10 10:20:59 -03:00
Michal Lenc
2849cd7c6d arch/samv7: add function to retrieve reset cause from HW
SAMv7 reset controller stores the cause of last reset (SW reset, power up,
pin reset etc.) in status register. This commit adds function that allows
the board to retrieve this information. This function should be called
from board support layer either during initialization or based on
incoming ioctl call.

Adding the sam_get_reset_cause() to sam_systemreset.c also resulted in
always compiling this file by default and only putting up_systemreset()
under CONFIG_SAMV7_SYSTEMRESET option.

Also header file sam_systemreset.h was created as it defines reset types
in comfortable manner for future processing in board layer. This is done
to avoid passing boardctl dependent structure to architecture layer.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2024-02-07 13:26:37 -03:00