Gregory Nutt
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021bdecb05
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SAMA5: Add LCD register definition header file
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2013-10-04 10:11:12 -06:00 |
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Gregory Nutt
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5c9926b61e
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SAMA5: Touchscreen driver now works
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2013-10-04 08:03:38 -06:00 |
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Gregory Nutt
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ac66287ba7
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SAMA5: First changes from touchscreen debug
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2013-10-03 17:11:30 -06:00 |
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Gregory Nutt
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889ea78194
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SAMA5: ADC and touchscreen drivers now build without errors
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2013-10-03 14:32:21 -06:00 |
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Gregory Nutt
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0001191f6c
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SAMA5: Integrate touchscreen and ADC drivers into the build
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2013-10-03 12:49:13 -06:00 |
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Gregory Nutt
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db6d76baf5
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SAMA5 ADC and touchscreen: Drivers are code complete and ready for test
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2013-10-03 10:06:14 -06:00 |
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Gregory Nutt
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8b8523f935
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SAMA Touchscreen/ADC: More progress
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2013-10-02 16:55:22 -06:00 |
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Gregory Nutt
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b885459624
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Add framework for Spark Core board support. The initial commit is a clone of the Maple Mini and still needs Spark customizations
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2013-10-02 08:24:46 -06:00 |
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Gregory Nutt
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afa475e948
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SAMA5 ADC/Touchscreen: A little more logic
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2013-10-01 14:40:34 -06:00 |
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Gregory Nutt
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183421fe07
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KL: Now builds up_puts
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2013-10-01 11:51:27 -06:00 |
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Gregory Nutt
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e4074e1e21
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KL: Missing header file in low level getc logic
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2013-10-01 11:25:01 -06:00 |
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Gregory Nutt
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bb6b31f495
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SAMA5 touchscreen and ADC: A little more progress
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2013-10-01 11:23:24 -06:00 |
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Gregory Nutt
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7120517af0
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SAMA5 ADC/Touchscreen: A little more progress. Still not complete
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2013-09-30 14:28:42 -06:00 |
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Gregory Nutt
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d4e689ef1a
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Add freedom-kl25z/minnsh configuration: This is an experiment to see just how small we and get an NSH configuration. From Alan Carvalho de Assis.
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2013-09-30 09:20:11 -06:00 |
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Gregory Nutt
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dc3ac21264
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KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis
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2013-09-30 09:15:31 -06:00 |
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Gregory Nutt
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babcd56908
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KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis
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2013-09-30 09:11:54 -06:00 |
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Gregory Nutt
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3027dd3c54
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SAMA5: Framework for an touchscreen driver (incomplete)
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2013-09-30 09:04:21 -06:00 |
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Gregory Nutt
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e1fc3f51b3
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SAMA5 ADC: Framework for an ADC driver (incomplete)
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2013-09-30 07:22:34 -06:00 |
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Gregory Nutt
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05eb7e3da4
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SAMA5 ADC: Beginning ADC register definition file
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2013-09-29 18:34:09 -06:00 |
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Gregory Nutt
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fbf5359a39
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Work around a start-up error in the GMAC that I still do not understand
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2013-09-29 16:46:22 -06:00 |
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Gregory Nutt
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0e5caa2ae3
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SAMA5 GMAC: Various fixes from initial debug
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2013-09-29 15:03:57 -06:00 |
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Gregory Nutt
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7c81618f2f
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Dependency generation fix for directories that keep object files in a sub-directory
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2013-09-29 11:46:10 -06:00 |
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Gregory Nutt
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4aaee6fb3c
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Clean up some naming: fd vs. fildes vs. filedes and filep vs filp
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2013-09-28 16:50:07 -06:00 |
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Gregory Nutt
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22d0ebeb07
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configs/compal_e88 converted to use the kconfig-frontends tools
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2013-09-27 16:12:44 -06:00 |
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Gregory Nutt
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9fcbd8879a
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SAMA5 GMAC and GMII support is code complete and ready for test
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2013-09-27 13:12:04 -06:00 |
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Gregory Nutt
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f519f94926
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Networking: Fix backward conditional in test to see if address is in ARP table. From Max Holtzberg
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2013-09-27 08:27:35 -06:00 |
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Gregory Nutt
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fbd09bd75f
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Beginng of support for GMII/RGMII PHYs
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2013-09-26 15:55:21 -06:00 |
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Gregory Nutt
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48f1227fbf
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SAMA5 GMAC: Initial driver check-in is just the EMAC driver forced to compile with the GMAC register definitions
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2013-09-26 10:35:52 -06:00 |
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Gregory Nutt
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9dd0680f0e
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SAMA5: Completes GMAC register definition header file
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2013-09-26 09:13:14 -06:00 |
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Gregory Nutt
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5f4682c874
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SAMA5 EMAC: Need to pace RX and TX because and RX can result in a TX; Process TX interrupt events before TX interrupt events for the same reason
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2013-09-25 14:22:35 -06:00 |
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Gregory Nutt
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d53a0189f7
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SAMA5 EMAC: Add some need D-Cache Flush/Invalidate operations. Add support for CONFIG_NET_DUMPPACKET
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2013-09-25 11:51:49 -06:00 |
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Gregory Nutt
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ea4c8bbf68
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Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
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2013-09-25 11:50:31 -06:00 |
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Gregory Nutt
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52b0a16cd3
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Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled
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2013-09-25 11:50:05 -06:00 |
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Gregory Nutt
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694080ba47
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Fix badly applied patch to ENCX24J600
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2013-09-25 08:26:56 -06:00 |
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Gregory Nutt
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d979859754
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SAMA5 UDPHS: Dont' reject read request submissions while stalled. That causes an infinite loop. When stalling, cancel all pending write requests, but cancel only a reqd request if it is in progress. It will be immediately requeued
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2013-09-24 15:06:17 -06:00 |
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Gregory Nutt
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5783fec78b
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Comment out assertion that apparently fires inappropriately
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2013-09-24 15:01:25 -06:00 |
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Gregory Nutt
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245f5ad32d
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Slightly improved debug output
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2013-09-24 13:47:03 -06:00 |
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Gregory Nutt
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f0ca9c2a8d
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Stack monitor fixes
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2013-09-24 12:14:52 -06:00 |
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Gregory Nutt
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a8461747b9
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Standardize stack checking interface
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2013-09-24 11:45:13 -06:00 |
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Gregory Nutt
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7c767c4ebe
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SAMA5 UDPHS: Minor clean-up of STALL logic
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2013-09-23 18:10:41 -06:00 |
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Gregory Nutt
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a070e748fd
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SAMA5 HSMCI: Disable TX DMA. it is not reliable
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2013-09-23 13:54:32 -06:00 |
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Gregory Nutt
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d167a09c74
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SAMA5 HSMCI DMA clean-up. There are still some issues
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2013-09-23 11:25:39 -06:00 |
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Gregory Nutt
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306a8743e0
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Cosmetic changes to comments and coding style fixes
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2013-09-22 14:48:22 -06:00 |
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Gregory Nutt
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b2e3a95565
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Un-neccesary, cosmetic changes to label names and comments
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2013-09-22 08:54:06 -06:00 |
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Gregory Nutt
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a768f32532
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SAMA5 OHCI: Back out a change, the real root cause was a bug in the cache logic so the hack is no longer necessary
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2013-09-22 07:53:51 -06:00 |
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Gregory Nutt
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d1ac44242f
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ARMv7-A: Fix some error in alignment to cache line boundaries in the cache operations
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2013-09-21 15:47:00 -06:00 |
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Gregory Nutt
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da37aa6413
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SAMA5 OHCI: Fix some strange Dcache problems that I still don't understand; end address on cache operations is end+1, not end
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2013-09-21 12:21:10 -06:00 |
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Gregory Nutt
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c9050ae5fd
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ARMv7-A: Clarify end address paramet in cache operations: It is the end+1 address, not the end address
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2013-09-21 12:16:34 -06:00 |
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Gregory Nutt
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f3d56e8695
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SAMA5 OHCI: Fix some problems with D-Cache coherency and physical addressing related to interrupt endpoints
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2013-09-20 15:22:09 -06:00 |
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Gregory Nutt
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f72ad05d0f
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SAMA5 OHCI: When UPLL drives OHCI the logically correct divider of 10 does not work; But a divider of 5 does. Why?
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2013-09-19 16:10:46 -06:00 |
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