Commit Graph

15972 Commits

Author SHA1 Message Date
Nathan Hartman
ca8585e8e7 stm32: nxstyle fixes
arch/arm/src/stm32/hardware/stm32_adc_v2.h
arch/arm/src/stm32/hardware/stm32_i2c_v2.h
arch/arm/src/stm32/hardware/stm32_tim.h

    * nxstyle fixes, mostly long lines and misaligned comments
2020-05-19 19:34:34 -06:00
Xiang Xiao
567962bd62 build: Move the extension definition to common place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-19 19:23:18 +01:00
Nathan Hartman
5fe9085913 stm32: lowputc: nxstyle fixes
arch/arm/src/stm32/stm32_lowputc.c:

    * nxstyle fixes, mostly for long lines and comment misalignments.
2020-05-19 11:20:40 -06:00
Nathan Hartman
387d33c535 stm32: allocateheap: nxstyle fixes
arch/arm/src/stm32/stm32_allocateheap.c:

    * nxstyle fixes, mostly for comment misalignments.
2020-05-19 10:56:34 -06:00
Nathan Hartman
624b50f7ea stm32: serial: nxstyle fixes
arch/arm/src/stm32/stm32_serial.c:

    * nxstyle fixes, mostly for long lines.
2020-05-19 10:56:12 -06:00
Xiang Xiao
bd656888f2 build: Replace WINTOOL with CYGWIN_WINTOOL Kconfig
so the correct value can be determinated by Kconfig system automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-18 15:02:55 -06:00
chao.an
05ebb39998 arch: complete logic in create/use stack to support stack coloration.
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-18 07:30:46 -06:00
chao.an
86a412d65a arch/stack: fix check stack breakage
remove the TLS alignment check

Regression by:

--------------------------------------------------------
commit a6da3c2cb6
Author: Ouss4 <abdelatif.guettouche@gmail.com>
Date:   Thu May 7 18:50:07 2020 +0100

    arch/*/*_checkstack.c: Get aligned address only when
    CONFIG_TLS_ALIGNED is enabled.

--------------------------------------------------------
commit c2244a2382
Author: Gregory Nutt <gnutt@nuttx.org>
Date:   Thu May 7 09:46:47 2020 -0600

    Remove CONFIG_TLS

    A first step in implementing the user-space error is
    force TLS to be enabled at all times.  It is no longer optional

Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-18 07:27:17 -06:00
qiaowei
cddd64fd30 armv8-m: Add stack overflow by stack pointer limit register
Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I0f0ae0fb8edb8e1690b3c5e3e8b3189d51a318b0
2020-05-18 07:21:05 -06:00
Gregory Nutt
a569006fd8 sched/: Make more naming consistent
Rename various functions per the quidelines of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions

    nxsem_setprotocol -> nxsem_set_protocol
    nxsem_getprotocol -> nxsem_get_protocol
    nxsem_getvalue -> nxsem_get_value
2020-05-17 14:01:00 -03:00
Xiang Xiao
d938b50969 arch/sim: Fix multiple definition of g_cpu_wait' and g_cpu_paused'
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I62d81582d58c9156ee8a56207b479dad7d6d18df
2020-05-17 07:36:45 -06:00
Gregory Nutt
00ed37b609 sched/: Run nxstyle on all .c/.h files modified by PR. 2020-05-16 13:39:03 -03:00
Gregory Nutt
d823a3ab3e sched/: Make more naming consistent
Rename various functions per the quidelines of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-16 13:39:03 -03:00
Gregory Nutt
e6a984dc2b arch/arm/src/stm32h7/stm32_sdmmc.c: Fix wrong selection in modifying the conflict. 2020-05-15 23:11:33 +01:00
Pierre-Olivier Vauboin
671191d7a1 boards/arm/stm32h7/stm32h747i-disco: fix nxstyle warnings 2020-05-15 23:11:33 +01:00
Pierre-Olivier Vauboin
2d43c57a67 boards/arm/stm32h7/stm32h747i-disco: SDMMC card detect interrupt 2020-05-15 23:11:33 +01:00
Pierre-Olivier Vauboin
07bd520ccb arch/arm/src/stm32h7/stm32_sdmmc: check IDMA buffer address
For SDMMC1, IDMA cannot access SRAM123 or SRAM4. Refer to ST AN5200 for
details. This patch makes stm32_dmapreflight check the buffer address and
return an error when the buffer is located in a invalid address space.

This does not fix the hardware limitation but at least makes it visible.
2020-05-15 23:11:33 +01:00
Pierre-Olivier Vauboin
369293dd84 boards/arm/stm32h7/stm32h747i-disco: bring support for SDMMC 2020-05-15 23:11:33 +01:00
Jukka Laitinen
1071934350 arch/arm/src/stm32h7/stm32_sdmmc.c: Fixes for IDMA transfer and cache usage
This simplifies the sdmmc driver when the IDMA is in use. There is no need to mix
IDMA and interrupt based transfers; instead, when making unaligned data tranfers,
just make IDMA into an internal aligned buffer and then copy the data.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:33 -06:00
Jukka Laitinen
a532b0b53a arch/arm/src/stm32h7/stm32_dma.c: Optimization for stm32_sdma_capable
It should not be an error to clean cache beyond the dma source buffer
boundaries. It would just prematurely push some unrelated data from
cache to memory.

The only case where it would corrupt memory is that there is a dma
destination buffer overlapping the same cache line with the source
buffer. But this can't happen, because a destination buffer must always
be cache-line aligned when using write-back cache.

This patch enables doing dma tx-only transfer from unaligned source
buffer when using write-back cache.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
c7acbb80d8 arch/arm/src/stm32h7/stm32_dma.c: Allow transfer from peripheral to AXI SRAM
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
f5571b2550 arch/arm/src/stm32h7/stm32_dma.c: Fix DEBUGASSERT compilation
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
8f559b1276 arch/arm/src/stm32h7/stm32_dma.c: Split long lines to pass style checks
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:31:06 -06:00
Jukka Laitinen
1e0f416a93 arch/arm/src/stm32h7: Make flash program size configurable
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:27:49 -06:00
Jari Nippula
de8f3b73d5 arch/arm/src/stm32h7/stm32_flash.c: fix write and erase
Correct flash write and erase functions, they inherit some
broken code from other platforms. Also fix the confusion between
eraseblock(sector) and page sizes.

Signed-off-by: Jari Nippula <jari.nippula@intel.com>
2020-05-14 17:27:49 -06:00
Jukka Laitinen
f9a886f8b7 arch/arm/src/stm32h7/stm32_flash.c: Lock flash option register
If the flash option register was locked before modifying it, return
it to the locked state after modify.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-14 17:27:49 -06:00
Nathan Hartman
8d985819b3 Fix typos
Comments only. No functional changes.
2020-05-14 10:49:44 -06:00
chao.an
8bce416c25 sim/tapdev: follow the tunnel MTU size
Change-Id: Ia32255517650d95ea3a675ee9fe5b69e923fb51a
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-14 07:54:57 -06:00
Gregory Nutt
801b9d6e5f arch/arm: Remove support for old redundant toolchains.
Remove support for the Codesourcery, Atollic, DevKitArm, Raisonance, and CodeRed toolchains.  Not only are these tools old and no longer used but they are all equivalent to standard ARM EABI toolchains.  Retaining specific support has no effect (they are still supported, but now just as generic EABI toolchains).
2020-05-13 18:41:10 +01:00
Jukka Laitinen
e989147119 arch/arm/src/stm32h7: Add support for spi simplex configurations
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
574b2593e6 arch/arm/src/stm32h7/stm32_spi.c: Correct the dmacapable check
First, configure the dmacfg in spi_dmarxsetup and spi_dmatxsetup. Then,
check for dmacapable, and only after that set up the dma.

This way the dmacapable actually works, and we don't need to initialize
the dmacfg structures twice.

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
d1c406d65d arch/arm/src/stm32h7/stm32_spi.c: Correct cache flush
When starting dma transfer, the dcache for the TX buffer should be cleaned.
"flush" performs also invalidate, which is unnecessary. The TX buffer
can be unaligned to the cahche line in some(most) cases, whereas RX buffer
can never be.

The cache for the receive buffer can be dirty and valid before call to exchange.
Thus another memory access (hitting the same cache line) may corrupt receive data
while waiting for transfer to complete. So the receive buffer should be
invalidated before the transfer

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
ace63ef74a arch/arm/src/stm32h7/stm32_spi.c: Remove un-used local variable
Causes compilation warning

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
63af18eaf9 arch/arm/src/stm32h7/stm32_spi.c: Fix long lines to pass style checks
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 07:29:14 -06:00
Jukka Laitinen
4967352c33 arch/arm/src/stm32h7/stm32_ethernet.c: Comment and debug assertion fixes
Modify some comments and debug assertions, which inherit from previous versions
and make no sense. Also add a few nerr printouts to make it easier to debug
running out of buffers

Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Jukka Laitinen
db492ca03b arch/arm/src/stm32h7/stm32_ethernet.c: Break long lines to pass style checks
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Jukka Laitinen
d618dad296 arch/arm/src/stm32h7/Make.defs: arm_mpu.c was added twice
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
Jukka Laitinen
2ef571453a arch/arm/src/stm32h7/stm32_allocateheap.c: Fix compilation when CONFIG_MM_REGIONS == 1
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
2020-05-13 06:51:57 -06:00
rajeshwaribhat
3d7678ad9b nxstyle corrections for .c and .h file modified by PR1030 2020-05-13 06:46:56 -06:00
Gregory Nutt
4664642cf7 Board specific code moved to boards directory and ipv6 support added
Added support to crashdump for rx65n on sbram
Board specific code moved to boards directory and ipv6 support added
2020-05-13 06:46:44 -06:00
Xiang Xiao
9607152e68 arm/gic: Don't pirnt log in arm_decodeirq
it is unsafe place to do this

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I47fdb1a34a7f1d5c5d3c4f3c0030a60bf01c43c2
2020-05-13 06:33:56 -06:00
Xiang Xiao
7ffafa3654 Remove executable bit from source code
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-13 06:32:13 -06:00
Masayuki Ishikawa
77f15c8b17 arch: cxd56xx: Apply the latest cxd56_dma.c and cxd56_spi from SDK
See the following commit in SDK:

  commit 62a2fb4fd3001aefad9ec3b2e2e7c47e5b0f21e1
  Author: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
  Date:   Fri Jan 24 13:32:04 2020 +0900

      Enable dummy transfer by SPI using DMA

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-05-13 13:11:08 +02:00
Xiang Xiao
517974787f Rename clock_systime[r|spec] to clock_systime_[ticks|timespec]
follow up the new naming convention:
https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-10 14:35:50 -06:00
Gregory Nutt
3ac629bdfb Run all .c and .h files modifed by the PR though nxstyle. 2020-05-09 16:58:42 -03:00
Gregory Nutt
f92dba212d sched/sched/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 16:58:42 -03:00
Gregory Nutt
4b44b628ea Run nxstyle against all .c and .h files modified by this PR.
All complaints fixed except for those that were not possible to fix:

- Used of Mixed case identifier in ESP32 files.  These are references to Expressif ROM functions which are outside of the scope of NuttX.
2020-05-09 14:19:08 -03:00
Gregory Nutt
a4218e2144 include/nuttx/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 14:19:08 -03:00
Xiang Xiao
b7d922960f Fix nxstyle issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-08 07:20:49 -06:00
Gregory Nutt
2d78ed7c7e arch/sim/src/nuttx-names.dat: Add __errno()
Needed to avoid collision with the host on simulator build.
2020-05-08 01:58:25 +01:00
Ouss4
958999c443 arch/mips/src/common/mips_usestack.c: Include tls.h header. 2020-05-07 18:41:43 -06:00
Gregory Nutt
3dca5eba15 Completes the Implementation of the TLS-based errno
- Remove per-thread errno from the TCB structure (pterrno)
- Remove get_errno() and set_errno() as functions.  The macros are still available as stubs and will be needed in the future if we need to access the errno from a different address environment (KERNEL mode).
- Add errno value to the tls_info_s structure definitions
- Move sched/errno to libs/libc/errno.  Replace old TCB access to the errno with TLS access to the errno.
2020-05-07 23:11:34 +01:00
Ouss4
a6da3c2cb6 arch/*/*_checkstack.c: Get aligned address only when CONFIG_TLS_ALIGNED is
enabled.
2020-05-07 12:04:51 -06:00
Ouss4
e74899ff6d arch/risc-v/src/common/riscv_createstack.c: Fix the stack_color name. 2020-05-07 12:04:32 -06:00
Gregory Nutt
c2244a2382 Remove CONFIG_TLS
A first step in implementing the user-space error is force TLS to be enabled at all times.  It is no longer optional
2020-05-07 12:04:16 -06:00
Pierre-Olivier Vauboin
8d8ceee838 boards/arm/stm32h7/stm32h747i-disco: support for FMC SDRAM 2020-05-07 10:29:01 -06:00
Masayuki Ishikawa
1cf62c7db9 arch: k210: Fix cpu1 hangup during boot with qemu 2020-05-07 08:33:50 +02:00
Ouss4
6eb6d31c32 Fix nxstyle complaints 2020-05-06 21:56:40 -06:00
Ouss4
d56c613b7d arch/avr,renesas,risc-v: The *_getsp function was moved to a header
file, remove it from the different source files that used to implement
it to avoid redefinitions.
2020-05-06 21:56:40 -06:00
Ouss4
a4dd967440 arch/: Implement up_tls_info() for the rest of the architectures. 2020-05-06 21:56:40 -06:00
Ouss4
1e3ec6ecd0 arch/: Implement Thread Local Storage for the rest of the architectures.
The change consisted on modifying *_usestack.c and *_createstack.c
2020-05-06 21:56:40 -06:00
Xiang Xiao
3e00d182d2 Fix nxstyle issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Xiang Xiao
94bb2e05bb syslog: Code outside libc shouldn't call nx_vsyslog directly
since nx_vsyslog is the implementation detail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Yang Chung-Fan
6b1f94ee49 arch: x86_64: real-mode bootstrap code should jump to 1M 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
ffa2027226 arch: x86_64: Add option to disable interrupt controller initialization 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
c63c8a3841 arch: x86_64: Add real-mode bootstrap stub 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
9ab6b92ad7 arch: x86_64: move the disable multiboot2 marco around to retain labels 2020-05-06 08:35:09 -07:00
Yang Chung-Fan
235d905001 arch: x86_64: remove leftover debug output 2020-05-06 23:33:46 +08:00
Masayuki Ishikawa
4ca19e7e74 arch: k210: Set CPU clock based on PLL0 settings 2020-05-05 17:21:32 -07:00
Gregory Nutt
bda24f09c2 libs/libc/tls/tls_getinfo.c: Add tls_get_info()
Move the logic to get TLS information from an inline function to a normal function.  For the unaligned case, it is probably too large to be inlined.

Also fixes some minor things from review of previous commits.
2020-05-05 18:56:33 +01:00
Abdelatif Guettouche
b7e7fba732 TLS_UNALIGNED (#2)
* Implement the TLS_UNALIGNED
2020-05-05 18:56:33 +01:00
Pierre-Olivier Vauboin
8d763d37ab arch/arm/src/stm32h7/stm32_oneshot: fix style issues 2020-05-05 11:53:58 -06:00
Pierre-Olivier Vauboin
d96565a765 arch/arm/src/stm32h7: add support for oneshot timer
The code is ported from arch/arm/src/stm32
2020-05-05 11:53:58 -06:00
Brennan Ashton
093aa040eb x86_64: Fix /dev/random rdrand implementation
rdrand was checking the wrong return value for the intrinsics
so it would block forever.  The read function was also not returning
the actual number of bytes read.

This was tested by running the rand example application
NuttShell (NSH) NuttX-9.0.0
nsh>rand
Reading 8 random numbers
Random values (0x101584f70):
0000: 019a172df7d539f2df8550362e2d3f74 9b467c51ebe30b9f6510e540e34fabcc ...-..9...P6.-?t .F|Q....e..@.O..

Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-05 18:54:47 +08:00
Yang Chung-Fan
521e6354b6 arch: x86_64: fix style of intel64_lowsetup.c 2020-05-05 02:03:34 -07:00
Yang Chung-Fan
8b86fae8d3 arch: x86_64: Check only XSAVE and rename __eanble_sse3 to __enable_sse_avx 2020-05-05 02:03:34 -07:00
Yang Chung-Fan
2936f72651 arch: x86_64: revoke lower 128MB mapping later, ldmxcsr require 32-bit address 2020-05-05 02:03:34 -07:00
Brennan Ashton
aea90e7cf0 Clean code to match nxstyle requirements
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
2405901bf2 Use mempy to perform type punning for setting gdt entry
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
4c24d91b4a Surpress unused rtcb variable
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
19afc57eef Fix null pointer reference in x86_64 rng
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Brennan Ashton
a9871f584a Resolve linking issues with x86_64 port
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
2020-05-04 08:32:22 -06:00
Masayuki Ishikawa
11bbe3997e arch: x86: Add hlt instruction to save power in qemu_idle.c 2020-05-04 07:13:30 -06:00
raiden00pl
f03ed73f91 arch/arm/src/stm32/stm32_adc.c: remove obsolete warnings 2020-05-03 15:57:49 -03:00
raiden00pl
534ba2cc18 arch/arm/src/stm32/stm32_adc: add setup and shutdown operations to the low-level interface 2020-05-03 15:57:49 -03:00
raiden00pl
b3a1aef773 arch/arm/src/stm32/stm32_adc.c: cosmetics 2020-05-03 15:57:49 -03:00
raiden00pl
5857c48b2e arch/arm/src/stm32/stm32_adc.c: setup/shutdown ADC instance only once 2020-05-03 15:57:49 -03:00
raiden00pl
e2a3266857 arch/arm/src/stm32/stm32_adc: add interface to configure EXTSEL/JEXTSEL from low-level ops 2020-05-03 15:57:49 -03:00
Gregory Nutt
1bab5b6813 arch/arm/: Rename up_intstack_* to arm_intstack_*
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all architecture-private functions begin with the name of the arch, not up_.

This PR addresses only these name changes for the ARM-private functions up_instack_base() and up_instack_top() which should be called arm_instack_base() and arm_instack_top().

There should be no impact of this change (other that one step toward more consistent naming).

Normal PR checks are sufficient
2020-05-03 14:48:40 -03:00
Gregory Nutt
da4c597b5f Run all .c and .h files modified by this PR through nxstyle. 2020-05-03 16:42:19 +01:00
Gregory Nutt
01d32a2b22 arch/arm/stm32, stm32f7, stm32l4: Rename up_waste to stm32_waste
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the MCU, not up_.

This PR addresses only these name changes for the STM32-private functions up_waste() which should be called stm32_waste.

There should be no impact of this change (other that one step toward more consistent naming).

Normal PR checks are sufficient
2020-05-03 16:42:19 +01:00
Gregory Nutt
cbc931b590 arch/arm: Rename up_savestate and up_restorestate
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses function-like macro naming that was missing in previous PRs:  up_savestate() and up_restorestate() which must be named arm_savestate() and arm_restorestate().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f103-minimum:nsh
2020-05-02 18:35:30 -03:00
Alan Carvalho de Assis
54d0256b9a Remove the not existent CONFIG_XXX_CMNVECTOR 2020-05-02 09:55:35 -06:00
Gregory Nutt
bb29541e3c Remove garbage file accidentally added 2020-05-01 21:05:22 -03:00
Xiang Xiao
f2aba8d9b7 build: Remove 'u' prefix from userspace library
so user needn't link the different library because the build type change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 15:56:55 -06:00
Gregory Nutt
673640b313 Run all .c and .h modified by this PR through nxstyle
The are remaining nxstyle complaints due to the use of mixed case identifiers in arch/arm/src/lc823450/lc823450_irq.c This, cannot be easily fixed since it depends on register definitions in header files that have implications to section other lc823450 files.
2020-05-01 16:55:33 -03:00
Gregory Nutt
b0dbdd7c10 arch/arm, board/arm: Rename all up_ramvec_* functions to arm_ramvec_*
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions up_ramvec_initialize() and up_ramvec_attch().

Impact

There should be no impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 16:55:33 -03:00
Xiang Xiao
2476aad5b4 sim: Fix librt can't find on macOS
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 13:09:44 -06:00
Gregory Nutt
2aa85fd17e arch/arm, board/arm: Rename all up_* functions to arm_*
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h

This change to the files only modifies the name of called functions.  nxstyle fixes were made for all core architecture files.  However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change.  It is not humanly possible to fix all of these.   I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
2020-05-01 18:28:13 +01:00
Gregory Nutt
542b684f73 arch/arm: Rename all up_*.S files to arm_*.S
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.S files.

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
2020-05-01 11:29:11 -03:00
Xiang Xiao
f8a809eb5b Fix nxstyle issue
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 10:43:47 -03:00
Xiang Xiao
eca7059785 Refine __KERNEL__ and CONFIG_BUILD_xxx usage in the code base
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 10:43:47 -03:00
YAMAMOTO Takashi
8b054dba98 sim: Update hostfs after the recent struct stat timespec changes
Fix it after the following change:

    commit bb4458b63f
    Author: Ouss4 <abdelatif.guettouche@gmail.com>
    Date:   Thu Apr 30 19:05:12 2020 +0100

        include/sys/stat.h: Per the POSIX standard, the atime, ctime and mtime field
    s
        have changed their type from time_t to struct timespec.
2020-05-01 17:42:46 +08:00
Ouss4
21302fcdae arch/risc-v/src: Rename files starting by up_ to risc_ to conform to the
naming standard.
2020-04-30 20:48:32 -06:00
Gregory Nutt
037c9ea0a4 arch/arm: Rename all up_*.h files to arm_*.h
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.h files.  There are only three, but almost 1680 files that include them:

    up_arch.h
    up_internal.h
    up_vfork.h

The only change to the files is from including up_arch.h to arm_arch.h (for example).

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
2020-05-01 03:43:44 +01:00
Gregory Nutt
ee05672434 Run all .c and .h files modified by this PR through nxstyle. 2020-05-01 02:11:01 +01:00
Gregory Nutt
c6c712b2fc arch/arm: Rename all up_*.c files to arm_*.c 2020-05-01 02:11:01 +01:00
Gregory Nutt
a86884c615 Run all .c and .h files modifed in this PR through nxstyle. 2020-04-30 22:09:51 +01:00
Gregory Nutt
84ccee4d34 Rename up_switchcontext to arm_switchcontext 2020-04-30 22:09:51 +01:00
Gregory Nutt
6398a64e26 Rename up_saveusercontext to arm_saveusercontext 2020-04-30 22:09:51 +01:00
Gregory Nutt
3a82a20c90 Rename up_copyarmstate to arm_copyarmstate 2020-04-30 22:09:51 +01:00
Gregory Nutt
3d2cd1493f Rename up_copyfullstate to arm_copyfullstate 2020-04-30 22:09:51 +01:00
Xiang Xiao
b1e661e7db sama5/sam_tsd: Fix error: 'ret' may be used uninitialized
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-30 11:43:29 -06:00
Gregory Nutt
a7558cf9b9 Run all .c and .h modified by the PR through nxstyle. 2020-04-30 18:38:32 +01:00
Gregory Nutt
e2a65ceb5f Rename up_fullcontextrestore to arm_fullcontextrestore 2020-04-30 18:38:32 +01:00
Gregory Nutt
317a8a8942 arch/z16: Build update
Verfy build.  Update to latest 2.2.2 toolchain.
2020-04-30 16:58:06 +01:00
liuhaitao
55ff12ad66 arch/arm/src/common/up_exit.c: _exit should call arm_fullcontextrestore for armv8-m
Since armv8-m now uses arm_fullcontextrestore instead of up_fullcontextrestore, _exit
should call arm_fullcontextrestore for armv8-m accordingly.

Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-04-30 08:47:10 -06:00
liuhaitao
bab61180db sim: Add host mmap and perror support
Change-Id: I20bb8cba7ed6ab3e06c91f275fa2be6a633efe9e
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-04-30 20:20:32 +08:00
Gregory Nutt
1aa9ff8af2 Run .c and .h files in this PR through nxstyle and fix complaints 2020-04-29 22:30:54 -03:00
Gregory Nutt
f23a756349 arch/z16: Correct file naming for coding standard
Rename all up_* files to conform to the name conventions of https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ

Rename all internal functions from up_* z16_
2020-04-29 22:30:54 -03:00
Xiang Xiao
5d12735f34 sama5d3x-ek/nxwm: Fix error: 'g_adcdev' undeclared
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-29 14:04:14 -06:00
Yang Chung-Fan
bebc8875fb arch: x86_64: add no-relax to the linker flags 2020-04-29 09:29:03 -07:00
Xiang Xiao
1c483d8ed4 arm/up_allocpage: fix warning: "PG_POOL_MAXL1NDX" is not defined
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-29 10:26:29 -06:00
Xiang Xiao
d2a262672c tiva/cc13x0: fix error 'TIVA_GPIO_BASE' undeclared
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-29 07:10:44 -06:00
Nathan Hartman
1b03a42bc0 arch/arm/src/stm32/Kconfig - Remove redundant ARCH_CHIP configs
* Remove redundant configs:
  - ARCH_CHIP_STM32F303RD, and
  - ARCH_CHIP_STM32F303RE.
2020-04-27 17:46:31 -06:00
Ouss4
e5443a4718 Remove a duplicate file introduced by the previous PR. 2020-04-26 22:12:42 -06:00
Ouss4
32597a763a arch/mips: Fix file naming. 2020-04-26 20:56:30 -06:00
zhongan
ef9735febd arch/sim: initialize 'rxbuf_size' and 'txbuf_size' instead of 'buf_size'.
Change-Id: I5442f022cafef6c0f636614ba739e11249713134
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-26 19:59:16 -06:00
zhongan
4ec8fd521f arch/sim: change 'VIRTIO_RPMSG_F_BIND' to 'VIRTIO_RPMSG_F_ACK'
Change-Id: I4d6b6b700130e264199f490ab4e922f699955113
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-26 19:59:16 -06:00
Gregory Nutt
dcd50db5d1 Run files in previous commit through nxstyle, fixing issues. 2020-04-26 22:14:25 +01:00
Gregory Nutt
a0fdda698c arch/z80: Fix z80 file naming
Modify file naming to conform on the Naming conventions of https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ

This commit only address the file naming convention.  There is still nonconformant function naming.
2020-04-26 22:14:25 +01:00
raiden00pl
f837bfecdb arch/arm/src/stm32/stm32_adc.h: add prefix STM32 to low-level ops macros 2020-04-26 11:35:11 -06:00
raiden00pl
1b4e0fddb8 arch/arm/src/stm32/stm32_adc.h: move generalized ADC definitions to the header file 2020-04-26 11:35:11 -06:00
raiden00pl
0e09d162e2 arch/arm/src/stm32/stm32_adc.c: fix injected channels configuration for ADC IPv1 2020-04-26 11:35:11 -06:00
raiden00pl
a85ffd0fbd arch/arm/src/stm32/stm32_adc.c: enable callback logic if DMA enabled 2020-04-26 11:35:11 -06:00
raiden00pl
4cb8be9608 arch/arm/src/stm32/stm32_adc.c: move adc_offset_set to llops section 2020-04-26 11:35:11 -06:00
Gregory Nutt
010603329b More compliance to the naming standard.
1) Rename all up_*.S file to arm_*.S
2) Rename all functions used only by armv8_m logic from up_* to arm_*
2020-04-26 14:12:47 -03:00
Gregory Nutt
15f003d01c arch/arm/src/armv8-m: Rename files to correspond to naming conventions.
This files in the arch/arm/src/armv8-m directory were cloned from arch/arm/src/armv7-m.  Naming standards were created for the architecture files, function, and variable names:  https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ

There however were never appliced to arch/arm/src/armv7-m and so this bad naming was inherited by arch/arm/src/armv8-m.  This commit corrects the file naming only and makes it compliant with the Naming FAQ.
2020-04-26 14:12:47 -03:00
Gregory Nutt
6766aa0ed5 Mea Culpa. Fix nxstyle problems from PR879
In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check).  It was really my intention to merge PR878, but I screwed that up and merged 879 instead.

This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
2020-04-26 11:56:15 -03:00
Nathan Hartman
d6f7821b15 Docs and comments: Change OSX -> macOS
Mac OS X was renamed to macOS at some point. Update references to
OSX, OS X, Mac OS X, Mac OSX, and other permutations, to macOS,
in README files and in comments of other files.
2020-04-26 07:48:33 -06:00
qiaowei
2376d8a266 Porting arch/armv8-m support
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p

Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
2020-04-26 07:43:37 -06:00
Matias Nitsche
a0d4e61d54 STM32L4 PWM: nxstyle 2020-04-24 12:38:47 -06:00
Matias Nitsche
436979baed STM32L4 PWM: nxstyle 2020-04-24 12:38:47 -06:00
Matias Nitsche
ff85335b71 fix use of undefined CONFIG_STM32L4_LPTIM1_CH1POL 2020-04-24 12:38:47 -06:00
Matias Nitsche
3fcb441ef8 STM32L4 PWR/RCC: nxstyle 2020-04-24 12:34:17 -06:00
Matias Nitsche
a0d4370163 STM32L4 RCC/PWR: nxstyle fixes 2020-04-24 12:34:17 -06:00
Matias Nitsche
e9319fa9a0 stm32l4x6 RCC: allow choosing HSI, MSI or HSE as SYSCLK instead of PLL to reduce power 2020-04-24 12:34:17 -06:00
Matias Nitsche
34bf9b26e0 stm32l4x6 RCC: set CORE regulator range according to CPU clock 2020-04-24 12:34:17 -06:00
Matias Nitsche
891acc5fa3 stm32l4x6 RCC: fix MSI clock speed setting 2020-04-24 12:34:17 -06:00
Matias Nitsche
2a76451185 stm32l4 PWR: add VOS setting function 2020-04-24 12:34:17 -06:00
Matias Nitsche
977f3194de stm32l4_lptim: nxstyle fix 2020-04-24 14:47:07 -03:00
Matias Nitsche
f0033f783e stm32l4_lptim: nxstyle fix 2020-04-24 14:47:07 -03:00
Matias Nitsche
d5eaa68b50 stm32l4_lptim: nxstyle fixes 2020-04-24 14:47:07 -03:00
Matias Nitsche
38bd0364bf stm32l4_lptim: add various functions 2020-04-24 14:47:07 -03:00
anjana-tel
0a673d759d Corrected build error
Corrected build error in rx65n_sbram_open()
2020-04-23 18:33:09 +08:00
Gregory Nutt
e6af32c88f Run nxstyle against all files modified by PR 848 2020-04-22 21:36:41 +01:00
Gregory Nutt
2f7e003ef8 arch/arm/src/armv7-m: Use Apache 2.0 license
Change license header on all files under arch/arm/src for which I am the sole author and the only person claiming to hold a coyright on the file.
2020-04-22 21:36:41 +01:00
Nathan Hartman
02ab0cd149 stm32: Fix typos, wrong comments, and nxstyle.
arch/arm/include/stm32/chip.h:

    * Fix 2 typos.

    * Fix 1 wrong comment (No LCD -> LCD)

    * Fix nxstyle errors regarding comment positions, blank lines
      before/after comments, and C++ style comments.
2020-04-22 16:14:57 +01:00
rajeshwaribhat
31332904dd Added support to crashdump for rx65n on sbram 2020-04-22 07:32:37 -06:00
raiden00pl
c2162365fc arch/arm/src/stm32h7/stm32_pwm: nxstyle fixes 2020-04-22 01:37:42 +08:00
raiden00pl
d89b9102cc arch/arm/src/stm32h7/stm32_pwm: fix PWM_DUMP_REGS macro
arch/arm/src/stm32h7/stm32_pwm: prevent the PA0 pin configuration from being overwritten
2020-04-22 01:37:42 +08:00
raiden00pl
655bb2e391 arch/arm/src/stm32/stm32_pwm: fix PWM_DUMP_REGS macro
arch/arm/src/stm32/stm32_pwm: prevent the PA0 pin configuration from being overwritten
2020-04-22 01:37:42 +08:00
raiden00pl
23c1efa164 arch/arm/src/stm32/hardware/stm32f30xxx_pinmap.h: add missing TIM2_CH1 pins 2020-04-22 01:35:10 +08:00
Alin Jerpelea
afead9c9da arch: arm: a1x: nxstyle fixes for a1x arch
nxstyle fixes for a1x arch

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-21 13:46:07 +08:00
Xiang Xiao
090a4d1690 Update .gitignore per testbuild.sh report
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-20 07:07:32 -06:00
Xiang Xiao
3d10f8cf8f Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-19 07:51:18 -06:00
Xiang Xiao
2a7029dd52 arch/sim: All cpu core need conform to CONFIG_SIM_WALLTIME behaviour
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-19 07:51:18 -06:00
Nakamura, Yuuichi
00049aa482 Fix saved %esp value in up_saveusercontext() for qemu-i486 2020-04-18 19:33:39 +08:00
Nathan Hartman
1d394535cb arch/README.txt: Various improvements to the text
* Added missing architectures and directories.

* Corrected a few mistakes.

* Rewrapped some text for consistency.
2020-04-17 15:16:43 -06:00
Nathan Hartman
120de788d4 kinetis: Fix typos
arch/arm/include/kinetis/kinetis_pmc.h:

    * Fix several typos in comments.
    * Rewrap some comment lines.
    * Fix define KINETIS_PMC_VERSION_UKN: Put -1 in
      parenthesis for safety.
    * Fix nxstyle complaint regarding long line.
2020-04-16 14:43:54 -06:00
Nathan Hartman
9b9d1fc7ca arch/stm32h7: Extend support to all STM32H7x3xx
All parts in the STM32H7x3xx family have the same pinmap, etc.,
so extending support to all members of the family required only
minimal changes: Adding them to Kconfig, extending some
preprocessor logic, and minor code changes.

arch/arm/src/stm32h7/Kconfig:

    * Add explicit support for all microcontrollers in the
      STM32H7x3xx family by adding support for:
        - STM32H743AG
        - STM32H743AI
        - STM32H743BG
        - STM32H743BI
        - STM32H743IG
        - STM32H743II
        - STM32H743VG
        - STM32H743VI
        - STM32H743XG
        - STM32H743XI
        - STM32H743ZG
        - STM32H753AI
        - STM32H753BI
        - STM32H753VI
        - STM32H753XI
        - STM32H753ZI

    * Fix TODO items for IO_CONFIG (all STM32H7X3XX).

    * Because 100-pin parts lack GPIO ports F and G, but have
      port H, create the new hidden configs STM32H7_HAVE_GPIOF
      and STM32H7_HAVE_GPIOG.

    * STM32H7_STM32H7X3XX:
      - Select STM32H7_HAVE_GPIOF and STM32H7_HAVE_GPIOG only
        when not STM32H7_IO_CONFIG_V (100-pin part).
      - STM32H7_STM32H7X3XX: select STM32H7_HAVE_SPI5 for all
        IO configs except V (100-pin part), which doesn't expose
        SPI5 due to pin count.

    * STM32H7_STM32H7X7XX: Always select STM32H7_HAVE_GPIOF and
      STM32H7_HAVE_GPIOG because we aren't adding more part
      numbers in this family.

    * Remove extraneous (duplicate) "bool" and "default n"
      lines.

    * config STM32H7_FMC: Fix indent (contents were indented
      with spaces while rest of file uses tabs).

arch/arm/include/stm32h7/chip.h:

    * Extend preprocessor logic to add support for the new
      MCU part numbers.

    * Expand table of differences between family members.

    * Define STM32H7_NGPIO based on IO_CONFIGs decided in Kconfig.

    * If IO config is not known, issue compile-time #error
      with grep-friendly "CONFIG_STM32H7_IO_CONFIG_x Not Set."
      Suggested by davids5.

arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h:
arch/arm/src/stm32h7/stm32h7x3xx_rcc.c:
arch/arm/src/stm32h7/stm32h7x7xx_rcc.c:

    * When checking STM32H7_NGPIO > 5 or 6, check also
      CONFIG_STM32H7_HAVE_GPIOF or CONFIG_STM32H7_HAVE_GPIOG.

arch/arm/src/stm32h7/stm32_gpio.c:

    * stm32_configgpio(): When applicable, make sure we're not
      trying to configure one of the missing ports.

    * Fix nxstyle complains (wrong end of line comment position
      and several long lines). No functional changes.

    * g_gpiobase[]: Init base address for ports F and G according to
      CONFIG_STM32H7_HAVE_GPIOF and CONFIG_STM32H7_HAVE_GPIOG.

    * stm32_configgpio(): Replace complicated check with g_gpiobase[]
      null check. Suggested by davids5.

    * stm32_gpiowrite() and stm32_gpioread(): Add previously missing
      null check of g_gpiobase[].

arch/arm/src/stm32h7/stm32_gpio.h:

    * Wrap the defines GPIO_PORTA, GPIO_PORTB, GPIO_PORTC, GPIO_PORTD,
      GPIO_PORTE, GPIO_PORTF, GPIO_PORTG, GPIO_PORTH, GPIO_PORTI,
      GPIO_PORTJ, and GPIO_PORTK in conditional logic so that the
      compiler will prevent use of ports that do not exist on the
      target MCU.

    * Fix nxstyle complaints.

Documentation/NuttX.html:

    * Remove copy-and-pasted anchor for stm32f76xx77xx.

    * Correct link to README.txt for Nucleo-H743ZI board,
      formerly on BitBucket, now on GitHub.

    * Add list item for STMicro STM32H747I-DISCO board.

Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
2020-04-16 13:23:12 -06:00
Nathan Hartman
3c829226f9 Fix typos and nxstyle complaints.
arch/x86_64/src/intel64/intel64_tickless.c:
boards/x86_64/intel64/qemu-intel64/src/qemu_freq.c:
drivers/modem/altair/altmdm.c:

    * Fix typos and nxstyle complaints.
2020-04-15 17:04:58 +01:00
zhongan
b4a50a9192 fix nxstyle warning.
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-15 12:30:50 -03:00
zhongan
4ff0edce25 arch/sim: add implemntation of 'host_sleep'.
Change-Id: Ib82343565ca9541499dec52c753c3f15923f7d1c
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-15 12:30:50 -03:00
zhongan
a41c5e01e1 arch/sim: add header to remove warning when build with 'CONFIG_SYSLOG_RPMSG_SERVER'.
Change-Id: I58ebe25434aaebce3812abb52caf3c670118cb66
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-15 12:30:50 -03:00
zhongan
648a76b3c1 risc-v: add pm initialization functions.
Signed-off-by: zhongan <zhongan@xiaomi.com>
2020-04-15 10:07:30 -03:00
Nathan Hartman
9b86305ad3 Fix copy/paste typo in various Kconfigs 2020-04-14 22:42:21 +01:00
Xiang Xiao
11705ffc71 Fix nxstyle issue 2020-04-14 13:02:00 -06:00
zhongan
0d3691a460 Add fpu support. 2020-04-14 13:01:47 -06:00
zhongan
957c14d95e Add initialization for idle task. 2020-04-14 13:01:34 -06:00
zhongan
38b4933e88 Change --start-group and '--end-group' as args. 2020-04-14 13:01:20 -06:00
zhongan
7262af219f rv32im/Toolchain.defs: when 'CONFIG_ARCH_FPU' enabled, add 'f' to match and mabi. 2020-04-14 13:01:08 -06:00
zhongan
bf21c1b947 Risc-v: Fix the not supported options in the latest 'RISCV_TOOLCHAIN' in rv32im's Toolchain.defs. 2020-04-14 13:00:53 -06:00
Juha Niskanen
88971a15a5 arch/arm/src/stm32f7/stm32_flash.c: Fix return value of stm32_flash_lock 2020-04-14 17:34:45 +01:00
Gregory Nutt
61f6fa769a nxstyle fixes for previous commit. 2020-04-14 17:19:11 +01:00
Juha Niskanen
552ca28d22 arch/arm/src/stm32l4/stm32l4_1wire.c: fix build error, fix typo 2020-04-14 17:19:11 +01:00
Juha Niskanen
e1138e35e0 arch/arm/src/stm32l4/stm32l4_spi.c: add missing ret declaration 2020-04-14 16:32:10 +01:00
Alin Jerpelea
222a3b9fe8 arch: arm: cxd56xx: nxstyle fixes
nxstyle fixes for cxd56xx

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-14 13:20:21 +01:00
Alin Jerpelea
dd2f3deaaf arch: arm: cxd56xx: nxstyle fixes
nxstyle fixes for cxd56 arch

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-14 17:31:18 +08:00
Xiang Xiao
df57cacd61 nuttx: Fix the nightly build warning again
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-14 11:22:22 +02:00
Xiang Xiao
d3c4879113 Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-04-13 12:01:39 -06:00
Xiang Xiao
b22e3b9e28 nuttx: Fix the nightly build warning
lpc2148_spi1.c:142:24: warning: initialization of 'uint32_t (*)(struct spi_dev_s *, uint32_t)' {aka 'unsigned int (*)(struct spi_dev_s *, unsigned int)'} from incompatible pointer type 'uint16_t (*)(struct spi_dev_s *, uint16_t)' {aka 'short unsigned int (*)(struct spi_dev_s *, short unsigned int)'} [-Wincompatible-pointer-types]
  142 |   .send              = spi_send,
      |                        ^~~~~~~~
lpc2148_spi1.c:142:24: note: (near initialization for 'g_spiops.send')

In file included from ieee802154/mac802154_bind.c:49:
ieee802154/mac802154_internal.h: In function 'mac802154_setdevmode':
ieee802154/mac802154_internal.h:788:42: warning: converting a packed 'enum ieee802154_devmode_e' pointer (alignment 1) to a 'const union ieee802154_attr_u' pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  788 |                         (FAR const union ieee802154_attr_u *)&mode);
      |                                          ^~~~~~~~~~~~~~~~~

chip/stm32_hciuart.c: In function 'hciuart_read':
chip/stm32_hciuart.c:2104:30: warning: statement with no effect [-Wunused-value]
 2104 |                       ntotal == (ssize_t)ret;
      |                       ~~~~~~~^~~~~~~~~~~~~~~

wireless/ieee80211/bcm43xxx/bcmf_driver.c: In function 'bcmf_wl_auth_event_handler':
wireless/ieee80211/bcm43xxx/bcmf_driver.c:579:23: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  579 |   type = bcmf_getle32(&event->type);
      |                       ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c:580:25: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  580 |   status = bcmf_getle32(&event->status);
      |                         ^~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c: In function 'bcmf_wl_scan_event_handler':
wireless/ieee80211/bcm43xxx/bcmf_driver.c:619:25: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  619 |   status = bcmf_getle32(&event->status);
      |                         ^~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_driver.c:620:35: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  620 |   escan_result_len = bcmf_getle32(&event->len);
      |                                   ^~~~~~~~~~~
wireless/ieee80211/bcm43xxx/bcmf_bdc.c: In function 'bcmf_bdc_process_event_frame':
wireless/ieee80211/bcm43xxx/bcmf_bdc.c:166:27: warning: taking address of packed member of 'struct bcmf_event_s' may result in an unaligned pointer value [-Waddress-of-packed-member]
  166 |   event_id = bcmf_getle32(&event_msg->event.type);
      |                           ^~~~~~~~~~~~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c: In function 'sdio_io_rw_direct':
wireless/ieee80211/bcm43xxx/mmc_sdio.c:157:3: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  157 |   ret = SDIO_RECVR5(dev, SD_ACMD52, (uint32_t *)&resp);
      |   ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c: In function 'sdio_io_rw_extended':
wireless/ieee80211/bcm43xxx/mmc_sdio.c:239:11: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  239 |           ret = SDIO_RECVR5(dev, SD_ACMD53, (uint32_t *)&resp);
      |           ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:244:11: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  244 |           ret = SDIO_RECVR5(dev, SD_ACMD53, (uint32_t *)&resp);
      |           ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:257:7: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  257 |       ret = SDIO_RECVR5(dev, SD_ACMD53, (uint32_t *)&resp);
      |       ^~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:265:3: warning: converting a packed 'struct sdio_resp_R5' pointer (alignment 1) to a 'uint32_t' {aka 'unsigned int'} pointer (alignment 4) may result in an unaligned pointer value [-Waddress-of-packed-member]
  265 |   SDIO_RECVR1(dev, SD_ACMD52ABRT, (uint32_t *)&resp);
      |   ^~~~~~~~~~~
wireless/ieee80211/bcm43xxx/mmc_sdio.c:79:28: note: defined here
   79 | begin_packed_struct struct sdio_resp_R5
      |                            ^~~~~~~~~~~~

chip/stm32_adc.c: In function 'adc_reset':
chip/stm32_adc.c:2860:7: warning: unused variable 'ret' [-Wunused-variable]
 2860 |   int ret;
      |       ^~~
chip/stm32_adc.c: In function 'adc_shutdown':
chip/stm32_adc.c:3044:7: warning: unused variable 'ret' [-Wunused-variable]
 3044 |   int ret;
      |       ^~~

chip/stm32_i2c.c:722:12: warning: 'stm32_i2c_sem_wait_noncancelable' defined but not used [-Wunused-function]
  722 | static int stm32_i2c_sem_wait_noncancelable(FAR struct i2c_master_s *dev)
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

wireless/gs2200m.c: In function 'gs2200m_read':
wireless/gs2200m.c:727:20: warning: passing argument 1 of 'nxsem_wait' from incompatible pointer type [-Wincompatible-pointer-types]
  727 |   ret = nxsem_wait(dev);
      |                    ^~~
      |                    |
      |                    struct gs2200m_dev_s *

.config:1207:warning: symbol value '' invalid for TESTING_OSTEST_FPUSIZE

platform/audio/cxd56_audio_analog.c:69:13: warning: inline function 'cxd56_audio_clock_is_enabled' declared but never defined
   69 | inline bool cxd56_audio_clock_is_enabled(void);
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
platform/audio/cxd56_audio_analog.c:68:13: warning: inline function 'cxd56_audio_clock_disable' declared but never defined
   68 | inline void cxd56_audio_clock_disable(void);
      |             ^~~~~~~~~~~~~~~~~~~~~~~~~
platform/audio/cxd56_audio_analog.c:67:13: warning: inline function 'cxd56_audio_clock_enable' declared but never defined
   67 | inline void cxd56_audio_clock_enable(uint32_t clk, uint32_t div);
      |             ^~~~~~~~~~~~~~~~~~~~~~~~

chip/stm32_adc.c: In function 'adc_reset':
chip/stm32_adc.c:1348:7: warning: unused variable 'ret' [-Wunused-variable]
 1348 |   int ret;
      |       ^~~
chip/stm32_adc.c: In function 'adc_shutdown':
chip/stm32_adc.c:1496:7: warning: unused variable 'ret' [-Wunused-variable]
 1496 |   int ret;
      |       ^~~

chip/stm32_i2c.c:729:12: warning: 'stm32_i2c_sem_wait_uninterruptble' defined but not used [-Wunused-function]
  729 | static int stm32_i2c_sem_wait_uninterruptble(FAR struct i2c_master_s *dev)
      |            ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

wireless/lpwan/sx127x/sx127x.c:147:52: warning: missing terminating ' character
  147 | #  warning OOK support is not complete, RX+TX doesn't work yet!
      |                                                    ^

str71_spi.c:435:24: warning: initialization of 'uint32_t (*)(struct spi_dev_s *, uint32_t)' {aka 'unsigned int (*)(struct spi_dev_s *, unsigned int)'} from incompatible pointer type
                                               'uint16_t (*)(struct spi_dev_s *, uint16_t)' {aka 'short unsigned int (*)(struct spi_dev_s *, short unsigned int)'} [-Wincompatible-pointer-types]
  435 |   .send              = spi_send,
      |                        ^~~~~~~~
str71_spi.c:435:24: note: (near initialization for 'g_spiops.send')

chip/pic32mx-lowconsole.c:147:24: warning: 'pic32mx_getreg' defined but not used [-Wunused-function]
 static inline uint32_t pic32mx_getreg(uintptr_t uart_base,
                        ^
chip/pic32mx-gpio.c:113:20: warning: 'pic32mx_value' defined but not used [-Wunused-function]
 static inline bool pic32mx_value(uint16_t pinset)
                    ^
chip/pic32mz-gpio.c:124:20: warning: 'pic32mz_value' defined but not used [-Wunused-function]
 static inline bool pic32mz_value(pinset_t pinset)
                    ^
chip/pic32mx-usbdev.c:3065:1: warning: 'pic32mx_epreserved' defined but not used [-Wunused-function]
 pic32mx_epreserved(struct pic32mx_usbdev_s *priv, int epno)
 ^

mmcsd/mmcsd_spi.c: In function 'mmcsd_mediachanged':
mmcsd/mmcsd_spi.c:1938:7: warning: 'return' with a value, in function returning void
       return ret;
       ^

In file included from partition/fs_partition.c:42:0:
partition/partition.h:66:19: warning: 'read_partition_block' defined but not used [-Wunused-function]
 static inline int read_partition_block(FAR struct partition_state_s *state,
                   ^

local/local_netpoll.c: In function 'local_pollsetup':
local/local_netpoll.c:305:1: warning: label 'pollerr' defined but not used [-Wunused-label]
 pollerr:
 ^~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: If3ea8f32b878aa218072130f7c3018f0d3c1aca5
2020-04-13 12:01:39 -06:00
Nathan Hartman
34113810bd Fix nxstyle errors in previous commit. 2020-04-12 15:49:35 -06:00
Nathan Hartman
743dcd8acf Fix suspect DEBUGASSERT() like PR765
As pointed out by Şükrü Bahadır Arslan in PR765, function calls
inside DEBUGASSERT() will not be executed if DEBUGASSERT is
disabled. Following that PR, I searched for other instances of
similar errors and found four. As there are many thousands of
DEBUGASSERT in the code, this is *not* an exhaustive fix.

arch/arm/src/tms570/tms570_boot.c:
* In function arm_boot(), call tms570_memtest_complete()
  outside of the DEBUGASSERT(). Otherwise, if DEBUGASSERT is
  disabled, we will never rendezvous with completion of the
  test. (Two instances of this fix.)

arch/arm/src/tms570/tms570_clockconfig.c:
* In function tms570_clockconfig(), call
  tms570_efc_selftest_complete() outside of the DEBUGASSERT()
  for the same reason as above.

boards/arm/sam34/sam4s-xplained-pro/src/sam_boot.c:
* In function board_late_initialize(), call
  sam_watchdog_initialize() outside of the DEBUGASSERT() for
  the same reason as above.
2020-04-12 15:49:35 -06:00
Gregory Nutt
72104c182c nxstyle fixes
Run all files modified by PR 766 through nxstyle and fix any resulting complaints.

NOTE:  Numerous "Mixed case identifier" errors in arch/arm/src/cxd56xx/cxd56_gnss.c were not fixed because this problem is of much larger scope than this file.
2020-04-11 21:19:47 +01:00
Gregory Nutt
67ec3d7926 Remove CONFIG_CAN_PASS_STRUCT
This commit resolves issue #620:

Remove CONFIG_CAN_PASS_STRUCTS #620

The configuration option CONFIG_CAN_PASS_STRUCTS was added many years ago to support an old version of the SDCC compiler. That compiler is currently used only with the Z80 and Z180 targets. The limitation of that old compiler was that it could not pass structures or unions as either inputs or outputs. For example:

    #ifdef CONFIG_CAN_PASS_STRUCTS
    struct mallinfo mallinfo(void);
    #else
    int      mallinfo(FAR struct mallinfo *info);
    #endif

And even leads to violation of a few POSIX interfaces like:

    #ifdef CONFIG_CAN_PASS_STRUCTS
    int  sigqueue(int pid, int signo, union sigval value);
    #else
    int  sigqueue(int pid, int signo, FAR void *sival_ptr);
    #endif

This breaks the 1st INVIOLABLES rule:

Strict POSIX compliance
-----------------------

  o Strict conformance to the portable standard OS interface as defined at
    OpenGroup.org.
  o A deeply embedded system requires some special support.  Special
    support must be minimized.
  o The portable interface must never be compromised only for the sake of
    expediency.
  o Expediency or even improved performance are not justifications for
   violation of the strict POSIX interface

Also, it appears that the current SDCC compilers have resolve this issue and so, perhaps, this is no longer a problem: z88dk/z88dk#1132

NOTE:  This commit cannot pass the PR checks because it depends on matching changes to the apps/ directory.
2020-04-11 21:19:47 +01:00
liuhaitao
459ad99373 Use EXTRAFLAGS instead of EXTRADEFINES to be used by make via command line
So call 'make EXTRAFLAGS=-Wno-cpp' could suppress the warnings with pre-processor
directive #warning in GCC.

Change-Id: Iaa618238924c9969bf91db22117b39e6d2fc9bb6
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-04-11 08:31:08 -06:00
John Rippetoe
2f54204035 Fixed some nxstyle errors 2020-04-11 13:53:20 +08:00
John Rippetoe
acb16e087a Fixes build issues associated with ARMv7-m mpu support files.
- inline functions within mpu.h converted to macros or moved to up_mpu.c
- mpu.h and up_mpu.c are now conditionally included in build via CONFIG_ARM_MPU

Chips affected by these changes
- imxrt
- kinetis
- lpc17xx
- lpc43xx
- lpc54xx
- sam34
- stm32
- stm32f7
- stm32h7
- stm32l4
- tiva
- xmc4
2020-04-11 13:53:20 +08:00
ligd
cbf31bca5c global change: fix tools/checkpatch.sh warnnings
Change-Id: I88cfa979c44bcaf3a8f6e036c6bfccd3402ca85a
Signed-off-by: ligd <liguiding@fishsemi.com>
2020-04-09 10:29:28 -06:00