add defintions for vector extension and additional user-mode
extension fields for MSTATUS and SSTATUS registers.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
Adding CMakeLists.txt files to support CMake build system.
Note that only FLAT build works now due to limitations of current
CMake build system.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
SAMA5D2 has UART (TX/RX only) and FLEXCOM USART (with control pins).
UART has only TX/RX, so if I try to use flow control with FLEXCOM USART,
there is no register definition on the UART side and get a compilation error.
Signed-off-by: Takeyoshi Kikuchi <kikuchi@centurysys.co.jp>
Commit 03e5c02 introduced option to have both standard SPI and QSPI
in SPI mode on one system. However this change broke the appearance of
QSPI driver configuration menu entry in menuconfig as it was dependent
on !SAMV7_QSPI_IS_SPI (which is now true for all MCUs having standard
SPI ability in QSPI driver).
This change makes sure the menu is correctly shown when QSPI driver
used.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This adds support for creating an early frame buffer and primatives for
writing to this frame buffer as a console. This does require the font
infrastructure as well as multiboot2.
Additionally this can now be used with a UEFI bootloader long as it
boots NuttX via Multiboot2. There does seem to be a PCI interrupt
issue when running in UEFI mode.
I was able to boot my laptop using this and see PCI devices enumerate.
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
x86_64: Add conditionals around the multiboot framebuffer
After warm reset the interrupt source in the HW block is not explicitly
cleared, thus once the interrupt source is enabled the old / stale interrupt
fires immediately.
This causes a DEBUGASSERT() failure on line 808 mpfs_spi_unload_rx_fifo:
DEBUGASSERT(nwords > 0);
This commit fixes building native MCUboot from sources by getting
the required sources from `esp-hal-3rdparty` repository and enable
building MCUboot and using it as the 2nd stage bootlaoder.
- A pre-built IDF bootloader is used by default;
- `ESP32C3_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32C3_PARTITION_TABLE.
- A pre-built IDF bootloader is used by default;
- `ESP32S3_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32S3_PARTITION_TABLE.
- A pre-built IDF bootloader is used by default;
- `ESP32S2_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32S2_PARTITION_TABLE.
- A pre-built IDF bootloader is used by default;
- `ESP32_PARTITION_TABLE` requires the IDF bootloader to be built
from sources.
- Native MCUboot also can be used to boot the device. It will be
built from sources and depends on !ESP32_PARTITION_TABLE.
Simple boot is a method of booting that doesn't depend on a 2nd
stage bootloader. Please note that some of the ESP-IDF bootloader
features are not available using simple boot, such as partition
tables and OTA: most of these features are implemented in NuttX
and MCUboot.
This commit refactors DAC driver. The functionality remains the same
but driver start up is now done in dac_setup (after application called
open function) instead of sam_dac_initialize (called from BSP). This
ensures that driver does not take resources (timer, interrupt) until
opened. Implementation of dac_shutdown is also provided, therefore
the driver frees resources once closed.
This change is consistent with other drivers implementation.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
USART peripheral can work in SPI mode as well. This commit adds support
for such functionality. Only 1 slave device is supported by the
peripheral therefore board level does not have to ensure correct CS
setup.
The usage of the peripheral is the same as with other SPI drivers.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also makes this bootloader configuration as default
for esp32c3-generic target and removes the need for running
'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
Ox64 BL808 crashes with a Page Fault when we run `getprime` then `hello`. This is caused by the T-Head C906 MMU incorrectly accessing the MMU Page Tables of the Previous Process (`getprime`) while starting the New Process (`hello`).
To fix the problem, this PR flushes the MMU Cache whenever we point the MMU SATP Register to the New Page Tables. We execute 2 RISC-V Instructions that are specific to T-Head C906:
- DCACHE.IALL: Invalidate all Page Table Entries in the D-Cache
- SYNC.S: Ensure that all Cache Operations are completed
This is derived from the T-Head Errata for Linux Kernel. More details here: https://lupyuen.github.io/articles/mmu#appendix-flush-the-mmu-cache-for-t-head-c906
Modified Files:
- `arch/risc-v/src/common/riscv_mmu.h`: If needed, `mmu_write_satp()` calls `mmu_flush_cache()` (weak function) to flush the MMU Cache. (Like for T-Head C906)
- `arch/risc-v/src/bl808/bl808_mm_init.c`: Flush the MMU Cache for T-Head C906. Extend `mmuflags` from 32-bit to 64-bit to be consistent with `mmu_ln_setentry()`.
- `boards/risc-v/bl808/ox64/configs/nsh/defconfig`: Enable `ostest` in the Build Config. Update `CONFIG_BOARD_LOOPSPERMSEC` according to `calib_udelay`.
Ubuntu stock toolchain `gcc-riscv64-unknown-elf` complains about
current CMake system (see issue#11573). This tries to fix it so
that both newer XPack and stock toolchains can be used with CMake.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
If a TX DMA completion interrups a forground write.
The TX DMA completion can start a dma_send and it will
then followed by the forground write's dma_send
stoping the,then in progress DMA.
By atomicaly marking the tx dma busy, the forground
write will not perform the dma_send, and will only
enqueue the data. At the next TX dma completion any
data pending in the tx queue will be sent
ESP32 is supported on NuttX starting from chip revision 3.0. This,
however, didn't prevent the user from using older chip revisions,
which caused unexpected behaviors. This commit checks chip revision
before finishing booting NuttX.
This commit is intended to update the EFUSE's register content and
update related configs:
- Remove duplicated configs from `esp32_soc.h`;
- Add missing header files from APB registers;
- Add missing macro definitions from EFUSE;
- Update related code to use the new macros;
The logic of the conditional expression that determines whether
the QH is a target QH or not is reversed in the process of canceling
a transfer in INPROGRESS state.
Therefore, the QH in INPROGRESS state is not released and subsequent
communication is not successful.
Checked with CDC-ACM driver and cu command.
Signed-off-by: Takeyoshi Kikuchi <kikuchi@centurysys.co.jp>
To avoid build break:
ld: riscv-none-elf/lib/rv64imafdc_zicsr/lp64d/crt0.o: in function `.L0 ':
(.text+0x8): undefined reference to `__bss_start'
ld: (.text+0x10): undefined reference to `_end'
ld: (.text+0x36): undefined reference to `main'
collect2: error: ld returned 1 exit status
Signed-off-by: chao an <anchao@lixiang.com>
Newly added logging in `sched/task_exit.c` obsoletes the existing
ones in `arch/up_exit()`, thus remove the latter to reduce duplications.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
Previously k230 kernel build needs OpenSBI wrapping for use on
target, thus leading to larger program and memory overheads.
This patch adds alternative small overhead kernel build support.
Changes:
- in arch/risc-v/src/k230:
- k230_head.S entrance renamed for sake of NUTTSBI
- k230_irq.c add M-mode handling for NUTTSBI case
- k230_mm_init.c add L3 table for smaller RAM case
- hardware/k230_plic.h add PLIC_CTRL definition
- Make.defs use CHIP_ASRCS to fix entrance selection
- in boards/risc-v/canmv230/scripts:
- Make.defs add support for NUTTSBI case
Additions:
- in boards/riscv/canmv230/:
- scripts/ld-nuttsbi.script link script for NUTTSBI case
- configs/nsbi/defconfig config for NUTTSBI case
The artifact nuttx.bin from this configuration can be used directly
on target as OpenSBI wrapping is not needed.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
fix typo
new options to enable toolchain support for quadruple precision
(128 bits or 16 bytes) floating point if both the toolchain and
the hardware support it.
Signed-off-by: chao an <anchao@lixiang.com>
Some devices have special preparations before entering S-mode, thus
a hook is needed from NUTTSBI to give them the chance.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
Chips like K230 has ARCH_RV64 but only supports 32-bit MMIO. So using
ARCH_RV_MMIO_BITS is more proper here.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This is not the right place to modify DMA memory protection values.
Why not? These are designed to protect other AMP mode instances. Opening
the entire SoC's memory for the USB DMA kind of defeats this purpose.
Also, the driver cannot know how to configure these registers correctly,
only opening up the whole SoC "works".
armv8-r/arm_gicv3.c: In function 'gic_validate_dist_version':
armv8-r/arm_gicv3.c:730:9: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'uint32_t' {aka 'long unsigned int'} [-Wformat=]
730 | sinfo("GICD_TYPER = 0x%x\n", typer);
| ^~~~~~~~~~~~~~~~~~~~~ ~~~~~
| |
| uint32_t {aka long unsigned int}
armv8-r/arm_gicv3.c:730:26: note: format string is defined here
730 | sinfo("GICD_TYPER = 0x%x\n", typer);
| ~^
| |
| unsigned int
| %lx
Signed-off-by: chao an <anchao@lixiang.com>
Fully linked apps take less storage and are efficient to load. This
is to enable them for rv-vrit configurations in KERNEL build.
Changes:
- arch/risc-v/Kconfig select BINFMT_ELF_EXECUTABLE for QEMU-RV
- boards/risc-v/qemu-rv/rv-virt/configs
- knsh32/defconfig enable ELF_EXECUTABLE, LIBM, OSTEST
- knsh64/defconfig enable ELF_EXECUTABLE, LIBM, OSTEST
- ksmp64/defconfig enable ELF_EXECUTABLE, LIBM, OSTEST
- knetnsh64/defconfig enable ELF_EXECUTABLE, LIBM, OSTEST
- knetnsh64_smp/defconfig enable ELF_EXECUTABLE, LIBM, OSTEST
Additions:
- boards/risc-v/qemu-rv/rv-virt/scripts/
- gnu-elf.ld apps linker script
The ARCH_TEXT_VBASE of knsh32 is set to same as that of 64bit to reuse
the apps linker script.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
Previously apps in kernel build are partially linked, thus are
big and inefficient. This enables full link for kernel mode apps
to reduce size and speed up loading.
Changes:
- arch/risc-v/Kconfig select HAVE_ELF_EXECUTABLE for K230
- boards/../scripts/Make.defs adjust LDELFLAGS
- boards/../knsh/defconfig enable BINFMT_ELF_EXECUTABLE
Additions:
- boards/../scripts/gnu-elf.ld apps linker script
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
The RT-Timer thread may call the `start_rt_timer` function. This
function gets the spinlock with interrupts disabled to ensure
exclusive access. However, this was already being performed in the
RT-Timer thread, causing a deadlock.
Following up the 'Espressif HAL fullly integration for ESP32s2/s3'
changes in https://github.com/apache/nuttx/pull/11428
There are few missing interrupt type constants need update. So
update them to avoid the build error.
Usually the startup script is placed under /etc. The contents of the etc directory
are compiled and linked with Nuttx binary in the form of romfs. After startup,
it will be mounted by Nsh.
etc is generated by the different boards, that use genromfs and xxd tools to generate
and compile it into the Nuttx, for example: boards/arm/at32/at32f437-mini/tool/mkromfs.sh
The more common method is etc image generated from the content in the corresponding
board/arch/board/board/src/etc directory, and added by Makefile for example:
boards/sim/sim/sim/src/etc.
But in kernel/protected mode, Nuttx kernel and apps are run in different privileged/
non-privileged mode or the isolated binarys, so as that nsh should use syscall to
access Nuttx kernel by exported API. In this scenario, nsh can not mount the etc image
content, because that is generated in board and as a part of Nuttx kernel.
changes:
- move etc romfs mount from nsh to Nuttx, but keep the script to parse and execute.
- move and rename the related CONFIG, move customized nsh_romfsimg.h to etc_romfs.c
in boards, and no need declaration for romfs_img/romfs_img_len.
This commit changes and updates all configurations in Nuttx arch/board as much as possible,
but if any missing, please refer to the following simple guide:
- rename CONFIG_NSH_ROMFSETC to CONFIG_ETC_ROMFS, and delete CONFIG_NSH_ARCHROMFS in defconfig
- rename the etc romfs mount configs, for example CONFIG_NSH_FATDEVNO to CONFIG_ETC_FATDEVNO
- move customized nsh_romfsimg.h to etc_romfs.c in board/arch/board/board/src and no need
declaration for romfs_img/romfs_img_len.
- delete default nsh_romfsimg.h, if ROMFSETC is enabled, should generate and compile etc_romfs.c
in board/arch/board/board/src.
Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
Note: This implementation is a bit more relaxed than what we do for
non-cmake builds. Mainly because I'm not familiar enough with cmake
to mirror what the non-cmake version does.
Current LITEX_LAST_IRQ looks like a typo that blocks compilation of
`arty_a7/knsh` configuration.
This fixes the build but I have no such device for test.
Found it was LITEX_IRQ_LAST before commit #ee84ea3 so likely typo was
introduced by then.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
Add ARCH_CHIP_QEMU_TRUSTZONE to enable/disable the TrustZone
support beacause qemu also support enable/disable Arm Security
Extensions: https://qemu-project.gitlab.io/qemu/system/arm/virt.html
when launch.
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
The implementation of the RISC-V Timer for BL808 SoC is incomplete. This PR implements the BL808 RISC-V Timer by calling OpenSBI. The code is derived from NuttX for RISC-V QEMU.
The implementation of `up_timer_initialize` with OpenSBI is explained in this article: https://lupyuen.github.io/articles/nim#appendix-opensbi-timer-for-nuttx
Changes:
- Documentation/platforms/risc-v/k230 revised for both modes
- arch/risc-v/include/k230/irq.h add S-mode IRQs
- under arch/risc-v/src/k230 folder:
- Make.defs drop use of k230_exception_m.S
- hardware/k230_clint.h add S-mode defs, revised freq
- k230_head.S unified flat/kernel mode support
- k230_irq.c add S-mode support with debug dump
- k230_mm_init.c revised for K230 S-mode
- k230_start.c revised for flat/s-mode,
- arch/risc-v/src/k230/k230_timerisr.c unified flat/s-mode support.
- under boards/risc-v/k230/canmv230 folder:
- configs/nsh/defconfig fix RAM size
- include/board_memorymap.h cleanup for S-mode
- src/.gitignore ignore romfs_boot.c
- src/Makefile add romfs support
Renames:
- under boards/risc-v/k230/canmv230/src/ folder:
- canmv_init.c from k230_appinit.c making room for more k230 devices
Dropped:
- under arch/risc-v/src/k230/
- k230_exception_m.S as hybrid mode not ready yet.
New files in boards/riscv/k230/canmv230:
- configs/knsh/defconfig S-mode config
- scripts/ld-kernel.script S-mode linker script
- src/romfs.h User space ROMFS defs needed in S-mode
- src/romfs_stub.c Stub ROMFS image
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
hostfs has its copies of some of nuttx definitions with different
names to avoid conflicting with the host OS definitions.
sometimes people only modifies one of them and forgets updating
another. eg. https://github.com/apache/nuttx/pull/11445
this commit introduces some assertions to detect that kind of
mistakes.
This is to align with ARCH_KMAP_VBASE by source codes.
It also fixes fake warnings from `tools/refresh.sh`.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
By integrating the Espressif`s HAL repository into the current
ESP32-S2 implementation on NuttX, it is possible to call functions
that makes it easier to setup the registers of the ESP32-S2,
enabling the usage of common Espressif drivers.
By integrating the Espressif`s HAL repository into the current
ESP32-S3 implementation on NuttX, it is possible to call functions
that make it easier to set up the registers of the ESP32-S3 and
enables the usage of common Espressif drivers. Please note that
Espressif's HAL repository was already being used for the Wi-Fi
driver. Then, this commit includes other source files to be used
by other drivers other than Wi-Fi and reorganize the build process.
This lower-half WS2812 LED driver uses the RMT peripheral of the
Espressif's SoCs to drive the RGB addressable LEDs. Compared to
the SPI-based implementation, it is faster!
The lower-half implementation of the RMT character driver based on
Espressif HAL enables using the RMT peripheral of ESP32, ESP32-S2
and ESP32-S3 as a common xtensa-based Espressif driver.
The RMT packages on Espressif SoCs are 4-byte long and are known as
"items". Please check the Techinal Reference Manual of the chip to
obtain more details.
