Summary:
- This commit fixes kernel stack dump information
Impact:
- Affects armv7-a with kernel build
Testing:
- Built with sama5d4-ek:knsh
- Not tested
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Apply the same logic for armv7-m
- NOTE: stack pointer alignment is 4-byte
Impact:
- Affects armv6-m with interrupt stack enabled
Testing:
- Built with freedom-kl25z:nsh (CONFIG_ARCH_INTERRUPTSTACK=2048)
- Not tested but should work
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Apply the same logic for armv7-m
- NOTE: stack pointer alignment is 8-byte
Impact:
- Affects armv8-m with interrupt stack enabled
Testing:
- Not tested but should work
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Apply the same logic for armv7-a
- NOTE: stack pointer alignment is 8-byte
Impact:
- Affects armv7-r with interrupt stack enabled
Testing:
- Not tested but should work
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Apply the same logic for armv7-a
- NOTE: stack pointer alignment is 4-byte
Impact:
- Affects arm (arm7/9) and c5471 with interrupt stack enabled
Testing:
- Built with c5471evm.nsh (CONFIG_ARCH_INTERRUPTSTACK=2048)
- Built with ea3131:nsh (CONFIG_ARCH_INTERRUPTSTACK=2048)
- Not tested but should work
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Remove -4/-8 offset coding in imx_irq.c and arm_vectors.S
- Instead, add SP adjustment after calling setirqstack/setfiqstack
- Fix off-by-one irq/fiq stack allocation in 8-byte aligned arch
- Fix comments on the user stack pointer in arm_vectors.S
- Also, fix up_dumpstate() to extract the user stack pointer
- NOTE: stack pointer alignment is 8-byte
Impact:
- Affects armv7-a with interrupt stack enabled
Testing:
- Tested with sabre-6quad:smp with QEMU
- Tested with sabre-6quad:nsh with QEMU
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit fixes CPUx IDLE stack top for SMP
- Also removes SMP_STACK_TOP from smp.h
Impact:
- Affects armv7-a SMP only
Testing:
- Tested with sabre-6quad:smp (QEMU)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
There is a good case on sim platform:
When we input some cmd and click enter key to start application in terminal,
this context will change to application from IDLE loop. Althrough entey key '\r'
has been received to recv buffer and complete post semaphore of reader, but
pollnotify may not be called because context change. So when application run
poll function, because no events happend and poll enter wait, context will
again change to IDLE loop, this pollnotify of IDLE loop will run to send poll
events, poll function of applicaton will wake up. It's wrong!
Change-Id: I812a889f2e90781a9c3cb4b0251cccc4d32bebd1
Signed-off-by: dongjiuzhu <dongjiuzhu1@xiaomi.com>
Summary:
- Modify arm_intstack_base() to return "top" of the IRQ stack for the current CPU
- This change fixes IRQ stack dump information for ARM SMP
- Add arm_intstack_alloc() to return "bottom" of the IRQ stack for the current CPU
- Also, these functions are now implemented in xxx_irq.c (imx/cxd56/lc823450)
- up_color_intstack() and up_check_intstack() now call arm_intstack_alloc()
- These semantics are now consistent with non-SMP case
- up_color_intstack() now initializes whole IRQ stack region for SMP
- Adjust IRQ stack top address for each CPU (e.g. -8)
- Fix setintstack to handle in case of NCPUS=1 (cxd56, lc823450)
- Adjust INTSTACK_SIZE to 8 bytes alignment (cxd56, lc823450)
- Refactor setintstack for lc823450
- Remove old IRQ stack coloring code from up_irqinitialize() (lc823450)
- Introduce g_cpu_intstack_top for lc823450
- Refactor header files
Impact:
- Affects imx6/cxd56xx/lc823450 SMP with interrupt stack enabled
Testing:
- Tested with sabre-6quad:smp (with QEMU, NCPUS=1 and 4)
- Tested with spresense:wifi_smp (NCPUS=1 and 2)
- Tested with lc823450-xgevk:rndis (NCPUS=1 and 2)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
cfsetispeed() now stores baud rate to c_cflag member of
struct termios, so it must not be overridden later on.
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
1.Get the stack pointer from sp instead of .Lstkinit's field
2.Make g_idle_topstack point to the end of the idle stack
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
arch/arm/src/tiva/cc13xx/cc13x0_rom.h,
arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v2_rom.h:
* Fix nxstyle errors; nxstyle was complaining about lack of a
space after comma because of the presence of line
continuation backslashes immediately after the comma.
Removed these backslashes as they are not necessary: these
lines are typedefs, not preprocessor defines.
arch/arm/src/tiva/cc13xx/cc13x2_v2_trim.c:
* Fix nxstyle errors.
* No functional changes; however modified one function,
trim_wakeup_fromshutdown(), to avoid blocks that existed
only to declare variables mid-function; nxstyle was
complaining about the positions of the opening and
closing braces of those blocks.
Summary:
- During Wi-Fi audio streaming test, I noticed data corruption in tcb
- Finally, I found an issue in IRQ request handing with IPI
- This commit fixes this issue
Impact:
- Affects SMP only
Testing:
- Tested with spresense:wifi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit adds interrupt stack for SMP
Impact:
- Affects SMP only
Testing:
- Tested with spresense:wifi_smp with CONFIG_ARCH_INTERRUPTSTACK=2048
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- The handle_irqreq() is used for remote IRQ control.
- The logic is called via IPI (Inter-Processor Interrupt)
- And the handler should handle only one request
- However, I noticed that the handler handles up to two requests
- This commit fixes this issue
Impact:
- Affects SMP cases only
Testing:
- Tested with spresense:wifi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Not all boards have an interrupt line from the phy to
the Soc. This commit allows the phy to be polled for
link status.
This may not work on all MAC/PHY combination that
have mutually exclusive link management and operating
modes. The STM32F7 and LAN8742AI do not have such a
limitation.
Summary:
- I found an issue with up_interrupt_context() when testing.
- And finally found that up_interrupt_context() is not atomic.
- This commit fixes the issue
Impact:
- Affects SMP only
Testing:
- Tested with spresense:wifi_smp and sabre-6quad:smp (qemu)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
There was no error handling before and it would block on common
cases like NACK which meant that you could not use the i2ctool
to perform a scan of the bus.
This does not handle the interrupt flow which also has incomplete
error handling.
When the Head to Tail relationship was H < T, then
only the tail to end of buffer was sent.
The fix is: In the txdma completion to do a second
the DMA operation using nbuffer if the nlength is
non zero.
stm32f7:serial UART5 use actual size
UART5 was using the CONFIG_UART5_TXBUFSIZE
not the UART5_TXBUFSIZE_ADJUSTED.
Since the buffer size was adjusted up, this
has no dcache implications.
If the UART5_TXBUFSIZE_ADJUSTED is larger
then CONFIG_UART5_TXBUFSIZE it will present
a larger usable buffer to the system's
serial driver.
This implements the missing callback hooks nrf52_spi0/1/2/3register
that are usually used with mmcsd for card detection.
This also stubs out the missing spi trigger function which is not
used on this platform.
The card detect was tested with the nRF52-feather board and a
modified KeyBoard FeatherWing.
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
and remove the special handling in the stack dump
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia1ef9a427bd4c7f6cee9838d0445f29cfaca3998
The current EasyDMA implementation will fail if a transfer of over
255 bytes is requested with no warning.
Also we do not set the RX and TX transfer lengths to 0 if the
buffer is NULL which can cause data to be written to the old
address as well as cause unexpected transaction lenghts.
Example:
transfer 1:
rx_len = 10
rx_buff != NULL
tx_len = 10
tx_buff != NULL
transfer 2:
rx_len = 2
rx_buff != NULL
tx_buff == NULL
Total transaction length for the second would be 10 because it
would still be using the old rx length of 10 and would
corrupt data in the old rx buffer.
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
EXTRAFLAGS is already applied to *FLAGS in board's Make.defs (and
it applies to whole build, not just arch-code). EXTRAFLAGS is passed
around each make call to the complete build.
KDEFINE is already added to EXTRAFLAGS in main Makefile so no need
to add it again in arch-level Makefile
1.Reduce the default size of task_group_s(~512B each task)
2.Scale better between simple and complex application
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia872137504fddcf64d89c48d6f0593d76d582710
This commit exends systimer options for nRF52 arch. It is possible
to use ARM SysTick either for tickless or non-tickless mode. Also,
it is possible to use the RTC peripheral for tickless mode. This
also re-enables support for WFI/WFE sleep if RTC is used, since
this counter continues to run in this mode (in contrast to SysTick).
Summary:
- I noticed that ldrex/strex on cxd56xx have an issue
- The issue is still under investigation
- This commit introduces a custom testset to avoid the issue
Impact:
- Affects cxd56xx in SMP mode if it is enabled
Testing:
- Tested with spresense:wifi_smp
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- I noticed that ostest sometimes stops with DEBUGASSERT
- Finally I found a bug that cpu1 can not disable interrupt
- This commit initializes nvic to fix this bug
Impact:
- Only affects cxd56 in SMP mode
Testing:
- spresense:smp and spresense:wifi_smp with DEBUG_ASSERTIONS=y
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
arch/arm/src/stm32/stm32_lowputc.c:
* stm32_lowsetup(): Ensure the USART is disabled before attempting
to configure it because some register bits cannot be modified
otherwise. This solves an issue that was encountered when a
serial bootloader did not perform a full teardown/cleanup before
launching NuttX.
Summary:
- ARCH_GLOBAL_IRQDISABLE was initially introduced for LC823450 SMP
- At that time, i.MX6 (quad Cortex-A9) did not use this config
- However, this option is now used for all CPUs which support SMP
- So it's good timing for refactoring the code
Impact:
- Should have no impact because the logic is the same for SMP
Testing:
- Tested with board: spresense:smp, spresense:wifi_smp
- Tested with qemu: esp32-core:smp, maix-bit:smp, sabre-6quad:smp
- Build only: lc823450-xgevk:rndis, sam4cmp-db:nsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
PR #1450 broke the Cygwin build. Refer to Issue #1672.
The use of of logic like:
EXTRA_LIBPATHS += -L "${dir ${shell $(CC) $(ARCHCPUFLAGS) --print-file-name=libgcc.a}}"
fails when the Toolchain $(CC) is a native Windows toolchain. That is because the returned path is a Windows-style patch which cannot be handled by the make 'dir' command. Commit 4910d43ab0 reorganized a lot of definitions and replaced the correct code with the use of the limit make 'dir' command. The original code used the Bash dirname command which does not suffer from this limitation; it can handle both POSIX and Windows paths.
This was verified using the stm32f4discover:nsh toolchain with the Windows native ARM Embedded toolchain. That toolchain returns:
arm-none-eabi-gcc --print-file-name=libgcc.a
c:/program files (x86)/gnu tools arm embedded/9 2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/libgcc.a
Comments only. No functional changes. See STM32G474 Reference Manual
(RM0440 Rev 4), section 3.4.1, Table 11, "Option byte organization."
arch/arm/src/stm32/hardware/stm32g47xxx_memorymap.h:
* STM32_OPTION_BASE: The comment incorrectly said the range was
0x1fff7800-0x1fff780f for a total of 16 Option Bytes. Corrected
this to 0x1fff7800-0x1fff782f, as the device has 48 Option Bytes
for this option block.
* STM32_OPTION_BASE2: The comment incorrectly said the range was
0x1ffff800-0x1ffff80f for a total of 16 Option Bytes. Corrected
this to 0x1ffff800-0x1ffff82f, as the device has 48 Option Bytes
for this option block.
Summary:
- This commit improves SPI performance.
- For small data, it does not use DMA.
Impact:
- All use cases which use SPI with DMA
Testing:
- Tested with spresense:wifi and spresense:example_lcd
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit fixes IRQ control for the following use case
- The gs2200m Wi-Fi driver requests SPI-DMA to receive a packet.
- cxd56_dma.c enables IRQ for the SPI-DMA and start transfer.
- Then LCD driver requests SPI-DMA to display an image.
- These SPI-DMAs use different DMA channels but share the DMA controller.
- Also, they share the same IRQ.
- When the first SPI-DMA finishes the transfer, it disables the IRQ.
- And if the second SPI-DMA finishes the transfer just after the IRQ disabled.
- The second SPI-DMA will be in a deadlock condition.
- To resolve this issue, do not control IRQ during DMA transfer.
- Instead, up_enable_irq() is called in up_dma_initialize()
Impact:
- All use cases which use DMA
Testing:
- Tested with spresense:wifi with LCD
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
boards: metro-m4 Add support for starting the watchdog timer on the metro-m4.
Testing:
- Build check only
Signed-off-by: Leomar Mateus Radke <leomar@falker.com.br>
Summary:
- This commit adds SMP support to cxd56_farapi.c
- nxplayer now works in SMP mode
Impact:
- Spresense in SMP mode only
Testing:
- Add the following configs to spresense:wifi
- +CONFIG_SCHED_INSTRUMENTATION=yy
- +CONFIG_SCHED_INSTRUMENTATION_BUFFER=y
- +CONFIG_SMP=y
- +CONFIG_SMP_NCPUS=2
- +CONFIG_SPINLOCK_IRQ=y
- Run nxplayer and play an WAV file on uSD card
- NOTE: http streaming playback would cause deadlocks
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Fixes:
##[error]net/tun.c:837:13: error: conflicting types for 'tun_poll_expiry'
837 | static void tun_poll_expiry(FAR void *arg)
| ^~~~~~~~~~~~~~~
net/tun.c:196:13: note: previous declaration of 'tun_poll_expiry' was here
196 | static void tun_poll_expiry(wdparm_t arg);
| ^~~~~~~~~~~~~~~
And
##[error]net/tun.c:881:57: error: passing argument 4 of 'wd_start' makes integer from pointer without a cast [-Werror=int-conversion]
881 | wd_start(&priv->txpoll, TUN_WDDELAY, tun_poll_expiry, priv);
| ^~~~
| |
| struct tun_device_s *
In file included from /github/workspace/sources/nuttx/include/nuttx/sched.h:41,
from /github/workspace/sources/nuttx/include/sched.h:34,
from /github/workspace/sources/nuttx/include/nuttx/arch.h:81,
from net/tun.c:60:
/github/workspace/sources/nuttx/include/nuttx/wdog.h:134:42: note: expected 'wdparm_t' {aka 'long unsigned int'} but argument is of type 'struct tun_device_s *'
134 | wdentry_t wdentry, wdparm_t arg);
| ~~~~~~~~~^~~
And
chip/cxd56_rtc.c: In function 'up_rtc_initialize':
##[error]chip/cxd56_rtc.c:358:3: error: too many arguments to function 'cxd56_rtc_initialize'
358 | cxd56_rtc_initialize(1, NULL);
| ^~~~~~~~~~~~~~~~~~~~
chip/cxd56_rtc.c:253:13: note: declared here
253 | static void cxd56_rtc_initialize(wdparm_t arg)
| ^~~~~~~~~~~~~~~~~~~~
boards: metro-m4 Add support for starting the watchdog timer on the metro-m4.
Testing:
- Build check only
Signed-off-by: Leomar Mateus Radke <leomar@falker.com.br>
to save the preserved space(1KB) and also avoid the heap overhead
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I694073f68e1bd63960cedeea1ddec441437be025
Interrups were blocked 1*n/baud Seconds. The former comment indicates
there was an asumption that the TXE would be set at DMA completion.
In reality this is not true. There can be 1 char in the TX Shift
register and one in the TX holding register, when DMA completes.
Waiting on TXE is not needed at all. The DMA will resume on the
DMA req when the TX holding register is written to the TX Shift
register.
boards: metro-m4 Add support for starting the watchdog timer on the metro-m4.
Testing:
- Build check only
Signed-off-by: Leomar Mateus Radke <leomar@falker.com.br>
Summary:
- Fix typo in Kconfig so that we can configure IMXRT_ENET_NRXBUFFERS.
Impact:
- imxrt family with ethernet configuration
Testing:
- imxrt1060-evk:netnsh
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
malloc() and free() should never be used within the OS. This will work in the FLAT build because there is only a single heap, but will cause problems in PROTECTED and KERNEL build modes where there are separate heaps for user and kernel memory.
Typically kmm_malloc(), kmm_zalloc(), and kmm_free() should be called within the kernel in those build modes to use the kernel heap.
Memory is never free. Possible memory leak:
./boards/arm/cxd56xx/common/src/cxd56_crashdump.c: pdump = malloc(sizeof(fullcontext_t));
Memory allocated with malloc(), but freed with kmm_free():
./drivers/usbhost/usbhost_composite.c: cfgbuffer = (FAR uint8_t *)malloc(CUSTOM_CONFIG_BUFSIZE);
Memory is never freed in these cases. It is allocated in the driver initialization logic, but there is no corresponding uninitialization logic; memory is not freed on error conditions:
./arch/arm/src/lc823450/lc823450_i2s.c: priv = (struct lc823450_i2s_s *)zalloc(sizeof(struct lc823450_i2s_s));
./arch/arm/src/sam34/sam_spi.c: spics = (struct sam_spics_s *)zalloc(sizeof(struct sam_spics_s));
./arch/arm/src/sama5/sam_spi.c: spics = (struct sam_spics_s *)zalloc(sizeof(struct sam_spics_s));
./arch/arm/src/samv7/sam_spi.c: spics = (struct sam_spics_s *)zalloc(sizeof(struct sam_spics_s));
Memory is allocated with zalloc() but freed on error conditions with kmm_free():
./arch/arm/src/sama5/sam_ssc.c: priv = (struct sam_ssc_s *)zalloc(sizeof(struct sam_ssc_s));
./arch/arm/src/samv7/sam_ssc.c: priv = (struct sam_ssc_s *)zalloc(sizeof(struct sam_ssc_s));
./arch/arm/src/stm32/stm32_i2s.c: priv = (struct stm32_i2s_s *)zalloc(sizeof(struct stm32_i2s_s));
Memory is never freed:
./drivers/spi/spi_bitbang.c: priv = (FAR struct spi_bitbang_s *)zalloc(sizeof(struct spi_bitbang_s));
arch/arm/src/cxd56xx/cxd56_gnss.c, arch/arm/src/xmc4/xmc4_spi.c,
crypto/blake2s.c, drivers/lcd/pcf8574_lcd_backpack.c, drivers/lcd/st7032.c
User space memory should not be used within the OS and, when it is absolutely necessary to use user-space memory, it should be allocated using kumm_malloc().
Summary:
- Fix style violations under lc823450
Impact:
- Some APIs were changed but all files are included
Testing:
- Build check only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Fix style violations under lc823450
- NOTE: still some files need to be fixed
Impact:
- Some register naming were changed but all files are included
Testing:
- Build check only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- Fix style violations in lc823450_syscontrol.h
Impact:
- This commit affects register naming in syscontrol.
- So some files such as lc823450_start.c lc823450_mux.c were also changed.
Testing:
- Build check only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
because nx_task_idle doesn't call sched_note_start. To avoid the
same error happen again in the furture, nx_task_idle is removed.
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Summary:
- This PR fixes style violations for lc823450.
- NOTE: I will fix more style violations in separate PR later.
Impact:
- No impacts.
Testing:
- I checked build test only.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Make.dep file should be updated by .config changed after first make.
There are 2 cases affected for this problem:
1) Add source files by config symbol
2) Include header files in #ifdef directive
These 2 cases may not be included in Make.dep and this may prevent the
differential build from working correctly.
- Add new functions of GNSS
- Support the lower PWM frequency
- Add CONFIG_CPUFREQ_RELEASE_LOCK
- Add high speed ADC support
- Add HPADC input gain configuration
- Add eMMC device
- Frame buffer support
- Fix SD/GNSS/sensor drivers not worked
- Build errors
- Fix nxstyle issues
Kinetis: Reworked USB driver for setup out data phase.
Freedom K28: New config nshsdusb, with RNDIS support
PL2303: Try to avoid clone detection.
General: various nxstyle fixes
General: license changed
1.It make sense to let Toolchain.defs give the default value
2.The board can still change if the default isn't suitable
3.Avoid the same definition spread more than 200 Make.defs
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic2649f1c7689bcf59c105ca8db61cad45b6e0e64
since libc++ declare these function in ctime by:
using ::localtime[_r];
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic0bb68b44c0cab838ab7cc34baee2aaa3ca8a9b5
since exit will be only callable from userspace and change
the 1st argument from "const uint8_t *" to "const char *"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I86487d57210ab63109148232da71dbc4d60a563b
- makes nsh reboot command work
Squashed commit of the following:
commit 5193f6ae9623bfb4d3bed4ecf3d0fb9ae1bfb6e8
Author: Adam Feuer <adam@starcat.io>
Date: Thu Jul 16 16:41:54 2020 -0700
removed conflict tag that was missed
- result of an incorrectly fixed bad merge
commit 731108ea7495655e96e516448887ca8c9ab354d1
Author: Adam Feuer <adam@starcat.io>
Date: Thu Jul 16 16:12:30 2020 -0700
implement system reset to make nsh reboot work
Squashed commit of the following:
commit 245d155cc58d31af412f2b832877736b2088b896
Author: Adam Feuer <adam@starcat.io>
Date: Thu Jul 16 16:10:10 2020 -0700
add Kconfig setting for system reset
commit e7d5def8151821bf359c55c05ba1f59421b2371a
Author: Adam Feuer <adam@starcat.io>
Date: Thu Jul 16 15:51:35 2020 -0700
implement system reset to make nsh reboot work
The QuickFeather board added as an initial target.
These featrues are minimally implemented:
* Clock Configuration -- All clocking registers are defined and
configuration is used to setup the HSO, M4 Core, and M4 Perif
clocks. Additionally some clock debugging is stubbed for
bringing out clock paths to IO pins.
* UART -- The lowputc as well as the serial driver is implemnted
for the single UART device. Currently the configuration is
hard coded, but uses the proper interfaces to later fill in.
* SysTick -- The system tick timer is implemented and clocking
properly. Tickless mode is not yet implemented.
* Interrupts -- The interrupt system is implemented and verified
using the UART and SysTick systems.
* GPIO -- GPIO and IOMUX systems are defined and implemented.
This is verified using the UART as well as the Arch LED
system. The GPIO interupt system is stubbed out but not
implemented.
* Arch LEDS -- The blue LED as part of the RGB LED is configured
and attached to the Arch LED system. This indicates the device
coming online as well as when a hardfault is triggered.
Applications and Testing:
* There is a nsh configuration implemented that includes debug
features as well as the ostest, getprime, and mem test.
All of these have been run and verified.
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
- Typos / wrong names in s32k14x_irq.h, s32k1xx_memorymap.h and s32k1xx_pcc.h
- Wrong base address for port input disable register in s32k1xx_pin.c
- up_* still had to be changed to arm_* in some places
When any error was detected the buffers descriptors were
blindly initialized. This caused the TX of the MAC to
be in a bad state. The correct thing to do, we disable
the MAC, init the bufffers and re-eanable the MAC.
The interrupts were being throlled at the NVIC. This been
cleaned up.
ASAN trace:
...
==32087==ERROR: AddressSanitizer: heap-buffer-overflow on address 0xf4502120 at pc 0x56673ca3 bp 0xff9b6a08 sp 0xff9b69f8
WRITE of size 1 at 0xf4502120 thread T0
#0 0x56673ca2 in strcpy string/lib_strcpy.c:64
0xf4502120 is located 0 bytes to the right of 8224-byte region [0xf4500100,0xf4502120)
allocated by thread T0 here:
#0 0xf7a60f54 in malloc (/usr/lib32/libasan.so.4+0xe5f54)
#1 0x5667725d in up_create_stack sim/up_createstack.c:135
#2 0x56657ed8 in nxthread_create task/task_create.c:125
#3 0x566580bb in kthread_create task/task_create.c:297
#4 0x5665935f in work_start_highpri wqueue/kwork_hpthread.c:149
#5 0x56656f31 in nx_workqueues init/nx_bringup.c:181
#6 0x56656fc6 in nx_bringup init/nx_bringup.c:436
#7 0x56656e95 in nx_start init/nx_start.c:809
#8 0x566548d4 in main sim/up_head.c:95
#9 0xf763ae80 in __libc_start_main (/lib/i386-linux-gnu/libc.so.6+0x18e80)
CALLSTACK:
#8 0xf79de7a5 in __asan_report_store1 () from /usr/lib32/libasan.so.4
#9 0x565fd4d7 in strcpy (dest=0xf4a02121 "", src=0xf5c00895 "k") at string/lib_strcpy.c:64
#10 0x565e4eb2 in nxtask_setup_stackargs (tcb=0xf5c00810, argv=0x0) at task/task_setup.c:570
#11 0x565e50ff in nxtask_setup_arguments (tcb=0xf5c00810, name=0x5679e580 "hpwork", argv=0x0) at task/task_setup.c:714
#12 0x565e414e in nxthread_create (name=0x5679e580 "hpwork", ttype=2 '\002', priority=224, stack=0x0, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:143
#13 0x565e42e3 in kthread_create (name=0x5679e580 "hpwork", priority=224, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:297
#14 0x565e5557 in work_start_highpri () at wqueue/kwork_hpthread.c:149
#15 0x565e3e32 in nx_workqueues () at init/nx_bringup.c:181
#16 0x565e3ec7 in nx_bringup () at init/nx_bringup.c:436
#17 0x565e3d96 in nx_start () at init/nx_start.c:809
#18 0x565e3195 in main (argc=1, argv=0xffe6b954, envp=0xffe6b95c) at sim/up_head.c:95
Change-Id: I096f7952aae67d055daa737e967242eb217ef8ac
Signed-off-by: chao.an <anchao@xiaomi.com>
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
stm32_i2sdev_initialize to stm32_i2sbus_initiliaze, to be consistent
with the way other buses are initialized.
The stm32_i2sdev_initiliaze (similar to stm32_spidev_initialize for
example) is a board specific function that does any necessary
initialization that's board depedent.
