Commit Graph

18352 Commits

Author SHA1 Message Date
Xiang Xiao
5fe51b923a mm: Simplify the semaphore handling
1.Move all special process to mm_takesemaphore
2.Remove the support of recurive lock
3.Remove mm_trysemaphore function

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ie216a6294ab67c5d427f31b089beb15c532f08fe
2021-07-10 16:10:32 -03:00
ligd
f5279f8583 sim: fix loop add delaylist when mm_free in IDLE thread
Change-Id: I1827c663275f47c9dc30d63e17e3d016b0000166
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-10 16:10:32 -03:00
Fotis Panagiotopoulos
61cb524fa2 lpc17_40: Fixed progmem driver. 2021-07-09 21:49:16 -07:00
Jerry_tang
1e3a985155 AmebaZ2: Add soc src code
Add soc src code for rtl8720c

Signed-off-by: Jerry_tang <jerry_tang@realsil.com.cn>
2021-07-09 14:29:06 -03:00
guowei15
95b5dc523e arm/setjmp.h:add c++ support
N/A

Change-Id: I619cc15570adeff10f3a9b69bf9a3cff83e625c1
Signed-off-by: guowei15 <guowei15@xiaomi.com>
2021-07-09 14:06:10 -03:00
David Sidrane
282ab797bf stm32h7:Ethernet Add some delays so that ifup() does not hog the CPU. 2021-07-08 21:14:29 -05:00
David Sidrane
70c9cd1508 stm32h7:ethernet add timeout on MAC reset 2021-07-08 21:14:29 -05:00
David Sidrane
bf4e97177a stm32h7:Ethernet fix formating 2021-07-08 21:14:29 -05:00
Xiang Xiao
e97ffb1f79 arch/armv7-a: Remove the special SMP SGI process
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Iaf7fe77a3ab7cbf145d907dafb0b7ca54cc4a012
2021-07-09 07:53:05 +09:00
Daniel P. Carvalho
2692b61a72 Fix newline at end of file. 2021-07-07 21:34:58 -03:00
Daniel P. Carvalho
ea701a84f2 Fix comments. 2021-07-07 21:34:58 -03:00
Daniel P. Carvalho
2a21c45e0a Add STM32G43XX Analog Comparator driver. 2021-07-07 21:34:58 -03:00
Xiang Xiao
76cdd5c329 mm: Remove mm_heap_impl_s struct
it's more simple to make mm_heap_s opaque outside of mm

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I5c8e435f6baba6d22b10c5f7e8d9191104fb5af2
2021-07-07 04:25:15 -07:00
cgeng
d656417917 Fix compilation error when CONFIG_DEBUG_PWM_INFO on stm32h7 2021-07-07 03:46:31 -05:00
Alexander Lunev
8fd64854f5 stm32,stm32f7,stm32h7: supported ETH MAC promiscuous mode 2021-07-06 19:11:56 -03:00
Fotis Panagiotopoulos
9976635390 lpc17_40: fixed compiler warnings. 2021-07-06 06:17:59 -05:00
Sara Souza
a5bf47b93e xtensa/esp32: Fixes issue with UART 2 2021-07-05 23:20:26 -05:00
Sara Souza
d67852da4b xtensa/esp32: Change default pins of UART2 2021-07-05 23:20:26 -05:00
Dong Heng
475becac37 risc-v/esp32c3: Add board_ioctl and board_uniqueid 2021-07-05 23:12:17 -05:00
Fotis Panagiotopoulos
2f0b4eb363 lpc17xx: Added WDT driver. 2021-07-05 11:25:51 -05:00
Xiang Xiao
75bfa4584c mm: Add kmm_malloc_size and mm_malloc_size
make malloc_size implementation align with malloc

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8d7781925f06e58a880437a16569dccbfd2ea035
2021-07-05 14:23:24 +09:00
Xiang Xiao
ddaa3e42b9 mm: Move the real implementation of mm_sbrk to sbrk
and remove mm_sbrk and kmm_sbrk since it's wrong to expose
sbrk to other heaps except the default userspace heap.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-05 08:02:08 +09:00
Xiang Xiao
b3f568c216 boards/sim: Add asan config to test the custom heap
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
4589c369be arch/sim: Implement mm_mallinfo for the custom heap
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
8ebf9c92cf arch/sim: Implement malloc_size for the custom heap
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
f240b2e631 arch/sim: Remove host_malloc and host_calloc
use host_realloc instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
97216c220b mm: Support malloc_size function
and rename malloc_usable_size to malloc_size

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:53:44 -03:00
Xiang Xiao
0941bad877 note: Move up_schednote.c to drivers/note folder
since it is general enough to work on other target

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 18:52:32 -03:00
Nathan Hartman
ce20211357 Fix various typos in comments and documentation
Fix typos in these files:
    * Documentation/components/drivers/character/foc.rst
    * Documentation/guides/cpp_cmake.rst
    * Kconfig
    * arch/arm/src/imxrt/imxrt_lpspi.c
    * arch/arm/src/kinetis/kinetis_spi.c
    * arch/arm/src/kl/kl_spi.c
    * arch/arm/src/lpc31xx/lpc31_spi.c
    * arch/arm/src/nrf52/nrf52_radio.h
    * arch/arm/src/s32k1xx/s32k1xx_lpspi.c
    * arch/arm/src/stm32/Kconfig
    * arch/arm/src/stm32/stm32_adc.c
    * arch/arm/src/stm32/stm32_foc.c
    * arch/arm/src/stm32/stm32_foc.h
    * arch/arm/src/stm32/stm32_pwm.c
    * arch/arm/src/stm32/stm32_spi.c
    * arch/arm/src/stm32f0l0g0/stm32_spi.c
    * arch/arm/src/stm32f7/Kconfig
    * arch/arm/src/stm32f7/stm32_spi.c
    * arch/arm/src/stm32h7/Kconfig
    * arch/arm/src/stm32h7/stm32_allocateheap.c
    * arch/arm/src/stm32h7/stm32_fmc.c
    * arch/arm/src/stm32h7/stm32_fmc.h
    * arch/arm/src/stm32h7/stm32_pwm.c
    * arch/arm/src/stm32h7/stm32_qspi.c
    * arch/arm/src/stm32h7/stm32_spi.c
    * arch/arm/src/stm32l4/stm32l4_pwm.c
    * arch/arm/src/stm32l4/stm32l4_spi.c
    * arch/arm/src/stm32l5/Kconfig
    * arch/arm/src/stm32l5/stm32l5_spi.c
    * arch/renesas/src/rx65n/rx65n_dtc.c
    * arch/renesas/src/rx65n/rx65n_usbdev.c
    * arch/risc-v/src/rv32m1/rv32m1_serial.c
    * boards/arm/stm32/b-g431b-esc1/src/stm32_foc.c
    * boards/arm/stm32/nucleo-f103rb/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32/nucleo-f302r8/src/stm32_foc_ihm07m1.c
    * boards/arm/stm32h7/nucleo-h743zi2/README.txt
    * boards/risc-v/rv32m1/rv32m1-vega/README.txt
    * boards/sim/sim/sim/scripts/Make.defs
    * drivers/1wire/1wire.c
    * drivers/1wire/1wire_internal.h
    * drivers/lcd/Kconfig
    * drivers/syslog/ramlog.c
    * fs/fat/Kconfig
    * libs/libc/debug/Kconfig
    * libs/libc/machine/Kconfig
    * libs/libc/stdio/lib_libvsprintf.c
    * libs/libc/stdlib/lib_div.c
    * libs/libc/stdlib/lib_ldiv.c
    * libs/libc/stdlib/lib_lldiv.c
    * libs/libdsp/lib_observer.c
2021-07-04 11:23:26 -05:00
SPRESENSE
b3389cf751 arch: cxd56x: Add support for power management debug output
Add support for power management debug output.
2021-07-04 00:36:07 -05:00
SPRESENSE
7af6b394de arch: cxd56x: Add Kconfig for power management debug output
Add configurations for power management debug output to Kconfig.
2021-07-04 00:36:07 -05:00
SPRESENSE
4738f69569 arch: cxd56x: pmic: Fix a compile error
Replace undefined logerr to _err function.
2021-07-04 00:36:07 -05:00
SPRESENSE
5c26d68f31 arch: cxd56x: Add a configuration for PMIC interrupts
Add a configuration for PMIC interrupts to Kconfig.
2021-07-04 00:36:07 -05:00
SPRESENSE
618661df93 arch: cxd56xx: Fix compile error when CONFIG_LIBM is disabled
It is no longer necessary to define CONFIG_ARCH_MATH_H when we would
like to link libm.a other than nuttx math library. So, this commit
removes the error condition.
2021-07-04 00:36:07 -05:00
SPRESENSE
d29db87bdc arch: cxd56xx: Add eMMC configuration for vendor-specific commands
The eMMC driver for cxd56xx has been implemented a vendor-specific command
for Toshiba eMMC device, and so add a new configuration to enable the code.
2021-07-04 00:36:07 -05:00
SPRESENSE
cd06fc9761 arch: cxd56x: sdhci: Minor fix configuration name
Modify the referenced CONFIG to CONFIG_DEBUG_MEMCARD_INFO.
2021-07-04 00:36:07 -05:00
SPRESENSE
6a2733dd05 arch: cxd56x: emmc: Minor fix undefined configuration name
Replace obsolete CONFIG_DEBUG_VERBOSE to CONFIG_DEBUG_FS_INFO.
2021-07-04 00:36:07 -05:00
SPRESENSE
fa12fe9df1 arch: cxd56x: scu: Fix some printf format warnings
Fix some printf format warnings by -Wformat.
2021-07-04 00:36:07 -05:00
SPRESENSE
845da344fd arch: cxd56xx: Fix compile warning
Fix warning by -Wimplicit-function-declaration
2021-07-04 00:36:07 -05:00
SPRESENSE
75b6a260e0 arch: cxd56xx: Rename to nxsem_set_protocol
nxsem_setprotocol function name was changed to nxsem_set_protocol.
Replace and fix hostif compile error.
2021-07-04 00:36:07 -05:00
SPRESENSE
4364a291f0 arch: cxd56xx: Use arm_arch.h instead of up_arch.h
Use arm_arch.h instead of up_arch.h and fix hostif compile error.
2021-07-04 00:36:07 -05:00
SPRESENSE
cb6ad9dfbd arch: cxd56xx: Fix getting stuck by nested spinlock in serial
Fix an issue the serial console gets stuck in SMP caused by nested
spin_lock_irqsave.
2021-07-04 00:36:07 -05:00
Xiang Xiao
a18b807fa9 arch/sim: Fix bt and audio simulation stop work in SMP mode
by removing the SMP up_idle and sim_timer_handler

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-04 10:16:12 +09:00
Xiang Xiao
b1f711f790 mm: Move procfs_register_meminfo into common place
to avoid the code duplication and ensure the consistent behaviour

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-03 09:39:32 -07:00
Masanari Iida
707404d415 rx65n: Add missing parameters in printf
Printf format string requires 2 parameters, but 0
parameter was given. Add these missing parameters.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2021-07-03 09:25:57 -05:00
Dong Heng
4f2df0311d risc-v/esp32c3: Fix some BLE driver issues
1. remove SMP functions because ESP32-C3 is singal core
2. disable phy_printf in ble adapter when enable Wi-Fi
3. fix BLE character device macro
2021-07-03 07:28:30 -05:00
Masayuki Ishikawa
6370c820ea arch: rp2040: Introduce setintstack macro for SMP
Summary:
- This commit introduces setintstack macro to rp2040
  which is used for SMP with interrupt stack

Impact:
- SMP with interrupt stack

Testing:
- Tested with raspberrypi-pico:smp
- NOTE: seed to set CONFIG_ARCH_INTERRUPTSTACK=2048

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-07-03 04:13:13 -05:00
Masayuki Ishikawa
9f206f2bb6 arch: armv6-m: Introduce setintstack macro
Summary:
- This commit introduces setintstack macro which can be
  overridden for SMP with interrupt stack

Impact:
- SMP only

Testing:
- Tested with raspberrypi-pico:smp
- NOTE: more commits will be added later

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-07-03 04:13:13 -05:00
Virus.V
5f67d65e9e risc-v/bl602: add efuse driver
Signed-off-by: Virus.V <virusv@live.com>
2021-07-02 13:17:39 -05:00
ligd
f479ca9096 sim/smp: fix smp can't start, caused by signal too busy
Change-Id: Ia9cad04759a869f9bed871fa0acd002115eefb0a
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 23:19:15 +09:00
ligd
2ab1dcf763 sim: add setitimer to nuttx-names.in
Change-Id: Id6d91d81b3d67cbe9215eb94f4ef394d61156fe8
2021-07-02 05:02:36 -05:00
ligd
a7a8c20083 sim: fix host_sleep unit error
Change-Id: Iaddd6381eb9870b709147d33b36482ae2e37c04d
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 05:02:36 -05:00
ligd
36c1bba88c sim/up_oneshot.c: take host time as current
Change-Id: I34625f3d3f9557a103017124388dba6104aba7cc
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 05:02:36 -05:00
ligd
92cd7628e0 sim: remove CONFIG_SIM_WALLTIME fast timing maybe harmful for IOs
Change-Id: Ic4ff5ec0aa99d2d229a07c4d1a9a4dae738d3cd9
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 05:02:36 -05:00
ligd
aa43a0215d mm: fix memory corruption when loop create/exit thread in SMP mode
Root casue:
when do thread exit, need add free stack operation to mm_delaylist,
but in SMP mode, CPU0 thread1 exit, at this time, CPU1 call malloc
and free mm_delaylist.

Fix:
Divide mm_delaylist for per CPU in SMP mode.

Change-Id: Ibf7d04614ea2f99fb5b506356b7346a0d94f0590
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-02 04:55:46 -05:00
ligd
50eee2f081 arm: fix enable interrupt too earlier caused system crash
reason:
	msr	cpsr, r2   /* Set the CPSR */

    // interrupt hanppend, context switch

	pop	{r0-r2, pc}

resolve:
    use SPSR instead, and recover with ldmia ^

Change-Id: Id7cee6452997ec19919eeecf6e7616164b3a0ab3
Signed-off-by: ligd <liguiding1@xiaomi.com>
(cherry picked from commit 6fa6c1676932d7babb7ff22ef556a17bb18f1c0d)
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-07-01 22:20:36 -05:00
Fotis Panagiotopoulos
de213401a7 lpc17_40_progmem: fixed compilation issues. 2021-07-01 09:11:12 -05:00
Masanari Iida
839414987c efm32: Fix missing closing bracket
This patch fixes missing closing bracket and semicolon.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
2021-07-01 06:37:17 -07:00
Sara Souza
b45ccad6a0 xtensa/esp32: Adds support for SERIAL_TXDMA. 2021-07-01 01:50:13 -05:00
David Sidrane
e659ae83b0 Kinetis:Serial No DMA Poll needed 2021-07-01 01:44:46 -05:00
David Sidrane
78584b4569 kinetis:Serial use eDMA
kinetis:serial mark priv->rxdma after use
2021-07-01 01:44:46 -05:00
David Sidrane
e5a1b2e797 kinetis:SPI use eDMA
Kinetis:SPI only allocate DMA once
2021-07-01 01:44:46 -05:00
David Sidrane
78bf264af0 kinetis:Replace DMA
Kinetis:DMAMUX use hex in mask
2021-07-01 01:44:46 -05:00
David Sidrane
3439c40044 stm32h7:SDMMC fix reset of do_gpio
For the case when the watchdog is triggering a timeout we did not
correctly reset the d0 GPIO.

Without this fix, the SD card can become inaccessible.
2021-07-01 01:37:58 -05:00
Julian Oes
6d6ca8f0b6 stm32:sdio: fix wrong ifdefs
This was wrong but presumably did not matter.
2021-07-01 01:37:58 -05:00
Julian Oes
2a86335055 stm32:sdio: fix reset of GPIO_SDIO_D0
For the case when the watchdog is triggering a timeout we did not
correctly reset the GPIO_SDIO_D0.

Without this fix, the SD card can become inaccessible.
2021-07-01 01:37:58 -05:00
Julian Oes
665f847760 stm32f7: fix reset of d0_gpio
For the case when the watchdog is triggering a timeout we did not
correctly reset the d0 GPIO.

Without this fix, the SD card can become inaccessible.
2021-07-01 01:37:58 -05:00
Julian Oes
154795a247 stm32f7: Removed bit that is reserved for f7 2021-07-01 01:37:58 -05:00
Julian Oes
87fd8903a0 stm32f7: whitespace fix 2021-07-01 01:37:58 -05:00
Julian Oes
804445fc15 stm32f7: unify identical sdmmc.h header files
It turns out there is no difference in these two files as well as the
reference manual for the registers between the two parts, so it probably
makes sense to unify them
2021-07-01 01:37:58 -05:00
chenwen
31a6da2343 risc-v/esp32c3: Notifies networking layer whether the carrier is available 2021-06-30 23:09:34 -05:00
McKay Ransom
863834057b Renesas/RX: add RX setjmp, ARCH_RENESAS_RX, and RX65N ioctl 2021-06-30 23:01:57 -05:00
Sara Souza
87fabb2bc7 xtensa/esp32: Support to select different clock source for RTC controller and close TODOs. 2021-06-30 21:27:27 -05:00
Virus.V
84100128b2 risc-v/bl602: update wifi firmware version
Signed-off-by: Virus.V <virusv@live.com>
2021-06-30 01:08:10 -05:00
xiewenxiang
5fd3eca9c9 riscv/esp32c3: Support BLE sleep mode 2021-06-28 23:14:30 -05:00
xiewenxiang
145d917587 riscv/esp32c3: Add Wi-Fi and BLE coexist 2021-06-28 23:14:30 -05:00
xiewenxiang
8b96edc3a5 riscv/esp32c3: Add esp32c3 BLE driver 2021-06-28 23:14:30 -05:00
Michal Lenc
b36171026e arch/arm/src/imxrt/imxrt_flexpwm.c: fix mistake in submodules address offset
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-28 09:03:06 -05:00
Virus.V
8452c571ec risc-v/bl602: BLE firmware adapts to the new framework
Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Virus.V
cd50650583 risc-v/bl602: Support AP and STA as independent network interface device
Signed-off-by: Virus.V <virusv@live.com>
2021-06-28 07:03:04 -05:00
Michal Lenc
addfe182ae arch/arm/src/imxrt: added support for FlexPWM driver
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-26 09:58:52 -05:00
Abdelatif Guettouche
553f070357 arch/xtensa/esp32: Remove up_textheap_init function since it's not
needed anymore.

Decouple the IRAM heap from the text allocator since that heap can
still be used as a generic pool of memory.

Implement the up_extraheaps_init function to initialize all of the
additional heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
add18b9592 arch/risc-v/esp32c3: Remove the up_textheap_init function since it's not
needed anymore.

Implement the up_extraheaps_init function to initialize all separate
heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
fc9c320bd8 arch/arm/cxd56xx: Remove the up_textheap_init function since it's not
needed anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Abdelatif Guettouche
0a4982a80e Introduce ARCH_HAVE_EXTRA_HEAPS, this config is going to be used for
chips that have multiple separate heaps.
For now it's used to enable APIs to initialize the different heaps
during the start sequence but can be extended for other purposes that
manage those heaps.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-26 09:52:43 -05:00
Gustavo Henrique Nihei
db18a12844 xtensa/esp32: Move RTC WDT deinit after initial setup
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Gustavo Henrique Nihei
8c70e4f1c1 xtensa/esp32: Fix RTC watchdog timer deinit at startup
Write protection must be disabled before performing changes to the WDT
registers. Furthermore, the routine was resetting the wrong field from
the RTC WDT register.
The RTC_CNTL_WDT_FLASHBOOT_MOD_EN field relates to Flash Boot Protection
and it is enabled by the 1st stage bootloader. The 2nd stage bootloader
takes care of disabling it.
Then the 2nd stage bootloader enables the RTC WDT for checking the
startup sequence of the application image.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-06-25 10:58:39 -03:00
Xiang Xiao
ae9b5fd306 Replace mktime with timegm in rtc and fs driver
since kernel component should use UTC instead local time

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Icf939e1ab0af8e577105f539d2553bc67b3b3d10
2021-06-23 13:43:32 -03:00
Abdelatif Guettouche
60da4317b9 arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for
consistency.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
bdbc9ef04f arch/risc-v/esp32c3_rtc_heap.c: Correct the name of the procfs info
variable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
55a210d305 arch/xtensa/esp32_textheap.c: When allocating text prioritize alloacting
from the RTC heap.  If that's not available fall back to the IRAM heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1e49f2929f arch/xtensa/src/esp32: Extract the IRAM region as a separate heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
1719e9df94 arch/xtensa/esp32: Add the RTC Slow memory as a separate heap.
This memory region can be accessed by both I & D buses, so the heap can
be used for data storage and code execution.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
6582c19904 arch/xtensa/src/esp32/hardware/esp32_soc.h: Add a function to check if a
buffer comes from the RTC Slow memory.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
a4289c4f84 xtensa/esp32_aes.c: Use the same output when testing the AES driver.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-21 06:23:55 -05:00
Masayuki Ishikawa
841fb02ac0 arch: esp32: Replace getcoreid with the latest esp-idf's
Summary:
- I noticed that the getcoreid macro in the latest esp-idf
  is much simpler than the current NuttX's.
- This commit replaces the macro with the latest esp-idf's

Impact:
- SMP only

Testing:
- Tested with esp32-devkitc:wapi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-21 06:21:39 -05:00
Alexander Lunev
f7c8875fd7 sdio,stm32h7: fixed an issue with not starting IDMA data transfer in case of IO_RW_EXTENDED command (CMD53);
corrected setting SDMMC_DCTRL.DTMODE field for block data transfers ending on block count
and for block data transfers ending with STOP_TRANSMISSION command;
stm32_sdio: added more debug messages
2021-06-21 02:47:46 -05:00
Liu Han
2dd081ed7d risc-v/esp32c3: Support ESP32-C3 SHA accelerator 2021-06-21 02:41:53 -05:00
chenwen
8648970994 esp32&esp32c3/wifi: Fix the issues of Wi-Fi configuration being overwritten 2021-06-19 08:00:35 -03:00
chenwen
ee3350ed1d risc-v/esp32c3: Disable Wi-Fi reconnect by default 2021-06-19 08:00:35 -03:00
chenwen
c3792f0aae xtensa/esp32: Support ESP32 RTC driver 2021-06-18 22:01:34 -05:00
Xiang Xiao
ab974edc84 sched: Identify the stack need to free by TCB_FLAG_FREE_STACK
instead calling kmm_heapmember or umm_heapmember because:
1.The stack supplied by caller may allocate from heap too
2.It's hard to implement these two function in ASan case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I196377822b7c4643ab4f29b7c1dc41dcd7c4dab1
2021-06-18 05:44:41 -07:00
Abdelatif Guettouche
af5e0c620f Rename MODULE_TEXT to TEXT_HEAP as the latter is more generic.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 07:14:17 -05:00
Abdelatif Guettouche
79e9347551 arch/risc-v/esp32c3/esp32c3_modtext.c: Prioritise allocation from the
RTC heap when available.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
f54804bafc arch/risc-v/esp32c3: Create a separate heap for the RTC memory.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
7198b3ef4b risc-v/esp32c3/esp32c3_soc.h: Add a function to check if a pointer is
within the RTC RAM range.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Daniel P. Carvalho
91e82d1597 Changed the STM32 Analog Comparator driver. 2021-06-18 00:50:24 -05:00
Sara Souza
00edeee1ff xtensa/esp32: Adds I2C Bit banging reset 2021-06-18 00:48:27 -05:00
Masayuki Ishikawa
83ac6cd399 arch: xtensa: Remove ISYNC from xtensa_compareset()
Summary:
- According to the Xtensa ISA document, this ISYNC instruction
  between WSR SCOMPARE1 and S32C1I is unnecessary

Impact:
- SMP only

Testing:
- Tested with esp32-devkitc:wapi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-17 09:58:29 -05:00
Masayuki Ishikawa
2d016f8d21 arch: xtensa: Fix the PS register handling
Summary:
- I noticed that DEBUGASSERT sometimes happens in nxsem_wait()
  when testing Wi-Fi with esp32-devkitc:wsifi_smp
- The call stack was not from an interrupt handler and actually
  g_current_regs[] were correct, even though asserted with
  (up_interrupt_handler() == false)
- Finally, I found that we need to call rsync after we set
  a new value to the PS register which is described in the
  Xtensa document.
- This commit fixes this issue

Impact:
- All xtensa architectures

Testing:
- Tested with esp32-devkitc:wifi_smp and esp32-devkitc:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-17 09:58:29 -05:00
Sara Souza
8f59054ef2 risc-v/esp32c3: Adds I2C RESET support via hardware. 2021-06-16 21:22:26 -05:00
Michal Lenc
6dc3c3d1b2 arch/arm/src/imxrt: fix nxstyle warnings and errors
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-16 21:22:03 -05:00
Michal Lenc
7bcd50955f arch/arm/src/imxrt: add missing clock to imxrt_xbar.c and fix usage of imxrt_enc.c while debug option is enable
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2021-06-16 21:22:03 -05:00
Janne Rosberg
673f9519eb risc-v/mpfs: add dma support 2021-06-16 12:22:54 -05:00
Eero Nurkkala
502210e98c riscv/mpfs: add i2c reset handler
Add reset functionality into the mpfs i2c driver.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-16 12:31:36 -03:00
Liu Han
04c805207a risc-v/esp32c3: Support ESP32-C3 efuse 2021-06-16 09:35:09 -03:00
retogaeh
f109a96ad2 Update arch/arm/src/stm32h7/stm32_adc.c
Co-authored-by: Gustavo Henrique Nihei <38959758+gustavonihei@users.noreply.github.com>
2021-06-16 04:58:06 -07:00
GAEHWILER Reto
b9fba3edae stm32h7 fix adc port to handle overrun and the DR's fifo, adapt adc driver
* port didn't know about data-register fifo
* port didn't handle overrun condition
* driver could get stuck if interrupts were skipped due to saturation
2021-06-16 04:58:06 -07:00
Virus.V
69fce77718 risc-v/bl602: update firmware to fix undefined up_irq_* symbols when linking
Signed-off-by: Virus.V <virusv@live.com>
2021-06-15 23:25:16 -05:00
Dong Heng
60fb1adaca riscv: Add inline IRQ process functions
Remove functions from RISC-V chips.
2021-06-15 23:25:16 -05:00
Xiang Xiao
2e49e1bc5c mtd: Add MTDIOC_FLUSH IOCTL like MTDIOC_XIPBASE
since the old design reuse BIOC_FLUSH for
MTD device which make some confusion

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-15 13:26:45 -03:00
Sara Souza
2a7b97c0cd risc-v/esp32-c3: Adds I2C polled support 2021-06-15 10:51:18 -05:00
Daniel P. Carvalho
4b351fc447 Adds PWM example to nucleo-g431kb board. 2021-06-14 18:45:04 -03:00
Liu Han
8eaaf6d462 risc-v/esp32c3: Support ESP32-C3 RSA accelerator 2021-06-14 15:03:11 -03:00
Yuichi Nakamura
9b8e81ebc1 arm/rp2040: Fix warnings when UART console is not used 2021-06-14 09:05:19 -03:00
Yuichi Nakamura
b860e3c4ad arm/rp2040:USB device controller support
Summary:
- Add Raspberry Pi Pico (RP2040) USB device controller support.
- Confirmed that CDC/ACM, MSC and these composite device are working.
- The current implementation have an unresolved issue and some workaround
  for USB MSC SCSI driver is required.
  See the comment in the patch "usbmsc: Add USBMSC_NOT_STALL_BULKEP for RP2040 workaround".

Impact:
- RP2040 only

Testing:
- Tested with Windows 10 and Ubuntu-18.04/20.04 as the USB host.
- Tested configurations:
  - raspberrypi-pico:usbnsh
  - raspberrypi-pico:usbmsc
  - raspberrypi-pico:composite
2021-06-14 09:05:19 -03:00
Sara Souza
7300bc8f1c xtensa/esp32: Adds I2C polled support. 2021-06-13 05:04:51 -05:00
Masayuki Ishikawa
bafac8b560 arch: k210: Fix stack coloring for the idle thread stack
Summary:
- I noticed that stack coloring for the idle thread stacks does
  not work due to the recent changes
- This commit fixes this issue

Impact:
- k210 only

Testing:
- Tested with both maix-bit (dev board) and QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-12 05:54:08 -05:00
Eero Nurkkala
1bce864ef7 mpfs: add i2c driver
This adds mpfs i2c driver.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 21:03:42 -05:00
Daniel P. Carvalho
361703a881 Added basic support for nucleo-g431kb board. 2021-06-11 20:51:56 -05:00
Eero Nurkkala
fad34e04c4 mpfs: add spi driver
This adds the SPI driver for the MPFS Icicle board.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 09:10:03 -05:00
Abdelatif Guettouche
96bcf7678b risc-v/esp32c3_wifi_adapter.c: Remove a config that's only used in
Xtensa chips.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-11 10:49:52 -03:00
Jiuzhu Dong
2fd25d7ea7 arch/armv7-a: Colorize the idle thread stack for other cpu(SMP)
Keep previous modification.

Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-06-11 01:26:50 -05:00
raiden00pl
d76f8ea04a arch/arm/src/stm32/stm32_foc.c: add workaround for an issue found in STM32G4 family
From G4 erratas: "ADC channel 0 converted instead of the required ADC channel"
2021-06-10 13:58:33 -03:00
raiden00pl
7c47f32a19 arch/arm/src/stm32/hardware/stm32g4xxc_pinmap.h: rename OPAMP pins to match the manual 2021-06-10 13:58:33 -03:00
raiden00pl
76824ba2a9 stm32g4xxxx_memorymap.h: remove invalid OPAMP1-6 definitions 2021-06-10 13:58:33 -03:00
raiden00pl
af0f2b4f37 stm32g4: add OPAMP defs 2021-06-10 13:58:33 -03:00
Alexander Vasiljev
9d0da9818c arch/arm/src/stm32h7: qspi use indirect write instead indirect read without data. 2021-06-10 10:46:34 -05:00
Virus.V
7c20199a61 riscv/bl602:replace syslog to debugging log macros 2021-06-10 08:59:16 -05:00
Fotis Panagiotopoulos
2ef90786c8 setjmp.h: Added missing include. 2021-06-10 08:58:52 -05:00
Xiang Xiao
c0fdddc5d7 arch: Remove all go_nx_start from chip specifc source
since the idle stack color is done in the common code now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-10 06:50:41 -07:00
Xiang Xiao
fa0d123f87 arch: Colorize the idle thread stack in an unified way
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Idae8da53e5a4799a8edc0e882f17fd515b70cb14
2021-06-10 06:50:41 -07:00
Chen Wen
dbf9c87a42 risc-v/esp32c3: Support ESP32-C3 RTC driver 2021-06-10 09:33:04 -03:00
Alexander Vasiljev
45672c269d Make: use gcc as LD 2021-06-10 03:43:18 -07:00
Peter van der Perk
3b94669b7f FlexCAN Fix TX abort process 2021-06-09 13:34:13 -05:00
Xiang Xiao
6576306bca arch: Rename xxx_getsp to up_getsp
All modern desgin support stack pointer and it's also an
important information, so let's standardize this interface.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-09 10:20:02 -07:00
Juha Niskanen
939e547ca8 arch/arm/src/stm32l4: fix some printf format errors and warnings
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2021-06-09 11:52:33 -05:00
Xiang Xiao
5b2a17b892 Include assert.h in necessary place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-08 13:06:08 -07:00
David Sidrane
131e2490c9 stm32f7:bbsram add assert header 2021-06-08 13:19:22 -05:00
David Sidrane
a1de902708 stm32h7:bbsram add assert header 2021-06-08 13:19:22 -05:00
unixjet
68f19a6290 risc-v/rv32m1: Basic port to rv32m1 ri5cy 2021-06-05 17:25:57 -03:00
Gustavo Henrique Nihei
0b3c2c7603 spi: Refactor SPI Slave interface prefix to sync with I2C Slave 2021-06-05 04:50:34 -07:00
Gustavo Henrique Nihei
27782aca19 risc-v/esp32c3: Include missing debug.h header 2021-06-05 04:50:34 -07:00
Gustavo Henrique Nihei
77dfb39260 risc-v/esp32c3: Uniformize references to CPU interrupt ID 2021-06-04 23:26:13 +01:00
Gustavo Henrique Nihei
f53306f9af risc-v/esp32c3: Ensure internal linkage of interrupt map 2021-06-04 23:26:13 +01:00
Gustavo Henrique Nihei
a2bcffde73 risc-v/esp32c3: Remove unused macros 2021-06-04 23:26:13 +01:00
Abdelatif Guettouche
2d55f2659e riscv/esp32c3: Add module text allocator.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 18:08:36 -03:00
Abdelatif Guettouche
778e3ed4ad arch/risc-v/rv32im/riscv_assert.c: Provide dummy definitions of dump
functions when ARCH_STACKDUMP is not enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 12:20:18 -05:00
Abdelatif Guettouche
94ded7a695 arch/riscv/rv32im/riscv_assert.c: Fix preprocessor condition.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-04 12:20:18 -05:00
Janne Rosberg
7b882c3588 risc-v/mpfs: fix ext irq 1-12
Handle irq numbers 1-12 correctly
2021-06-04 10:14:58 -05:00
Jani Paalijarvi
ebdc7a06b1 risc-v/mpfs: add MSTimer register offsets and bitmasks 2021-06-04 10:14:58 -05:00
Janne Rosberg
f7cbed0256 risc-v/mpfs: enable up_systemreset() 2021-06-04 10:14:58 -05:00
Janne Rosberg
ec11643394 risc-v/mpfs: add sysreg register defines
This adds minimal set of sysreg defines for MPFS
2021-06-04 10:14:58 -05:00
Masayuki Ishikawa
386946ee54 arch: cxd56xx: Fix address mapping in cxd56_modtext.c
Summary:
- I noticed that DEBUGASSERTION() happens when executing
  an ELF application
- This commit fixes this issue by re-mapping the address
  to SYSBUS in up_module_text_free()

Impact:
- None

Testing:
- Tested with spresense (both DEBUG_ASSERTIONS=n and y)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-04 01:40:37 -05:00
Masayuki Ishikawa
f0b689a063 arch: arm: Add select ARCH_HAVE_MODULE_TEXT to ARCH_CHIP_CXD56XX
Summary:
- I noticed that make savedefconfig shows warnings regarding
  'unmet direct dependencies (ARCH_HAVE_MODULE_TEXT)'
- This commit fixes this issue

Impact:
- None

Testing:
- Tested with spresense:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-04 01:40:37 -05:00
Jaroslav Beran
d13be4ea57 samv7/spi: Allow 16-bit word size in spi_send
Signed-off-by: Jaroslav Beran <jara.beran@gmail.com>
2021-06-03 21:33:52 -05:00
Xiang Xiao
2e54df0f35 Don't include assert.h from public header file
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-03 08:36:03 -07:00
Kazuya Hioki
038941b11d arch: cxd56xx: Fix a register name in cxd56_sdhci.c
Signed-off-by: Kazuya Hioki <Kazuya.Hioki@sony.com>
2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
cfe6e313fb arch: cxd56xx: Introduce up_testset2 in cxd56_testset.c
Summary:
- In cxd56xx, ldrex/strex behavior is slightly different from
  other Arm architectures. Dummy strex must be issued to release
  the exclusive load & store unit.

Impact:
- SMP only

Testing:
- Tested with spresense:smp
- Tested with spresese:wifi_smp, spresense:rndis_smp
- NOTE: CONFIG_CXD56_TESTSET=y must be removed from defconfigs

Signed-off-by: Kazuya Hioki <Kazuya.Hioki@sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
2fc6361231 arch: cxd56xx: Introduce CXD56_PHYSADDR
Summary:
- This commit converts data to the physical address for DMA transfer.

Impact:
- cxd56_dmac.c, cxd56_sdhci.c, cxd56_usbdev.c
- cxd56_cisif.c, cxd56_emmc.c, cxd56_ge2d.c, cxd56_udmac.c

Testing:
- Tested with following configurations
- spresense:wifi, spresense:wifi_smp, spresense_rndis, spresense_rndis_smp
- NOTE: additional commits are needed for the test
- NOTE: cxd56_cisif.c, cxd56_emmc.c, cxd56_ge2d.c, cxd56_udmac.c are not tested

Signed-off-by: Kazuya Hioki <Kazuya.Hioki@sony.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
a6572fc8c9 arch: cxd56xx: Use uintptr_t for srcend/dstend in dma_descriptor_s
Summary:
- This commit uses uintptr_t for srcend/dstend in dma_descriptor_s

Impact:
- None

Testing:
- N/A

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
4ba5740c6e arch: cxd56xx: Introduce CONFIG_CXD56_USE_SYSBUS in Kconfig
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
8c97db37e0 arch: cxd56xx: Introduce cxd56_modtext.c
Summary:
- This commit introduces cxd56_modtext.c to allocate a separate
  text memory for ELF

Impact:
- None

Testing:
- Tested with spresense:elf

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-02 22:13:10 -05:00
Masayuki Ishikawa
588deffb6c arch: cxd56xx: Adjust loops per msec for the new memory map
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-06-02 22:13:10 -05:00
Xiang Xiao
281921bcf9 arch: Flush syslog buffer for sim and x86_64 arch
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-03 08:27:24 +09:00
David Sidrane
9b29641bf5 s32k1xx:eeprom fix missing debug.h 2021-06-02 17:36:06 -03:00
Sara Souza
7dd131b4c1 xtensa/esp32: Fixes support for HW flow control 2021-06-02 09:55:50 -05:00
Sara Souza
a54fe4ee1e xtensa/esp32-s2: Add support for serial HW flow control. 2021-06-01 21:37:37 -05:00
Sara Souza
b54be4e946 risc-v/esp32-c3: Add support for HW flow control. 2021-06-01 21:37:27 -05:00
Gustavo Henrique Nihei
24c206b3f8 risc-v/esp32c3: Add DMA support for the SPI Slave controller 2021-06-01 21:37:09 -05:00
Gustavo Henrique Nihei
15a93ae974 risc-v/esp32c3: Remove Master-only settings on SPI Slave driver 2021-06-01 21:37:09 -05:00
Alan C. Assis
929a4a7278 Fix dangling whitespace at the end of line 2021-06-01 07:49:54 +02:00
Sara Souza
f1d653c08c xtensa/esp32-s2: Adds support for serial driver, lowputc and termios. 2021-06-01 07:49:54 +02:00
Alan C. Assis
06795a221a Clean ESP32S2 Xtensa files 2021-06-01 07:49:54 +02:00
Abdelatif Guettouche
fccd5fbdd2 esp32s2_allocateheap.c: Use the address of the ROM data from the ROM linker script. 2021-06-01 07:49:54 +02:00
Alan C. Assis
7767acd24a Add initial ESP32S2 Xtensa support 2021-06-01 07:49:54 +02:00
Xiang Xiao
d7f96003cf Don't include debug.h from public header file
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-06-01 06:42:02 +09:00
Gustavo Henrique Nihei
1530b0f639 risc-v/esp32c3: Fix overwriting of registered-but-disabled interrupts 2021-05-31 09:15:40 -05:00
Gustavo Henrique Nihei
da78cf78eb risc-v/esp32c3: Remove useless parameter from DMA macro 2021-05-31 09:14:14 -05:00
chao.an
99bfd355c7 serial/uart/h4: add bt h4 uart serial driver
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-05-31 09:50:54 -03:00
chao.an
6c69b12000 wireless/bluetooth: decoupling bt_driver_s and bt_buf_s
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-05-31 09:50:54 -03:00
chao.an
6837d4e1ba arch/sim: remove BT uart implement
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-05-31 09:50:54 -03:00
Gustavo Henrique Nihei
7e15d897bd risc-v/esp32c3: Add driver for SPI Slave controller 2021-05-31 12:54:15 +01:00
chenwen
1d1dd8512f esp32&esp32c3/wifi: Support specific channel and bssid scan 2021-05-31 11:09:19 +01:00
Alin Jerpelea
02b244cb6f arch: arm: update licenses to Apache
Sebastien Lorquet has submitted the CLA

Uros Platise has submitted the CLA

Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-05-31 01:37:27 -05:00
Alin Jerpelea
7e84ea3104 arch: renesas: update licenses to Apache
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-05-31 01:37:27 -05:00
Alin Jerpelea
3b87c32bcc arch: or1k: update licenses to Apache
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-05-31 01:37:27 -05:00
Alin Jerpelea
5a37ddfbe6 arch: misoc: update licenses to Apache
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-05-31 01:37:27 -05:00
Jiuzhu Dong
dab99acfe3 sim/rptun: support multi(>2) core interactive by share memory
N/A

Change-Id: Ia8254bfe369e40a04ed54adfa64afa38974b165c
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-05-30 23:28:40 -05:00
Abdelatif Guettouche
45d01ae2a8 arch/xtensa/esp32_emac.c: Call phy_enable_interrupt correctly. 2021-05-28 20:46:27 -03:00
Han Raaijmakers
04d81b24e3 S32K1XX LSPI Double word up to 64 bits support 2021-05-27 11:37:46 -07:00
Abdelatif Guettouche
e29da149e3 arch/riscv/src/esp32c3/esp32c3_rt_timer: Fix typos and re-word some
comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
08aa9ce540 arch/xtensa/src/esp32/esp32_rt_timer: Fix typos and re-word some
comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
0f3d94e8e8 arch/risc-v/src/esp32c3/esp32c3_rt_timer.h: Add section headers.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Abdelatif Guettouche
f24a687f8e arch/xtensa/src/esp32/esp32_rt_timer.h: Add section headers.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-27 05:01:54 -07:00
Virus.V
c6317650f9 risc-v/bl602: Add RTC support 2021-05-26 20:03:19 -03:00
Gustavo Henrique Nihei
1d940b2982 risc-v/esp32c3: Constify DMA descriptor pointer to buffer 2021-05-26 14:05:27 -03:00
Gustavo Henrique Nihei
29cae80533 risc-v/esp32c3: Fix DMA TX Burst being set to input register 2021-05-26 14:05:27 -03:00
Dong Heng
73dcbac09d riscv/esp32c3: Add ESP32-C3 AES driver 2021-05-25 11:02:59 -03:00
Masayuki Ishikawa
88c6524d7c arch: imx6: Add termios support to imx6
Summary:
- This commit adds termios support to imx6

Impact:
- None

Testing:
- Tested with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-05-25 07:17:29 -05:00
Govind Singh
2975050c96 arch/riscv/bl602: Fix typo in i2c driver
Signed-off-by: Govind Singh <govind.sk85@gmail.com>
2021-05-25 01:37:28 -05:00
Janne Rosberg
d6205642ab add support for PolarFire SoC and icicle board
Co-authored-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-05-24 22:55:44 -05:00
Sara Souza
3144a5a272 xtensa: Fixes names of serial functions 2021-05-24 10:04:50 -05:00
Xiang Xiao
001e7c3e76 sched: Don't include nuttx/sched.h inside sched.h
But let nuttx/sched.h include sched.h instead to
avoid expose nuttx kernel API to userspace.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-05-24 12:11:53 +09:00
Dong Heng
76df958e34 riscv/esp32c3: Support SPI Flash encryption read/write 2021-05-23 08:37:25 -03:00
David Sidrane
86523318fc stm32f7:i2c use inttypes 2021-05-22 08:53:07 -05:00
David Sidrane
8596fdd0bf stm32h7:i2c use inttypes 2021-05-22 08:53:07 -05:00
Alan C. Assis
1a84314f5d xtensa: #ifdef SYMBOL is always true if SYMBOL defined as 0 2021-05-22 08:35:12 -05:00
Huang Qi
f4a0b7aedd libc: Call pthread_exit in user-space by up_pthread_exit
Drop to user-space in kernel/protected build with up_pthread_exit,
now all pthread_cleanup functions executed in user mode.

* A new syscall SYS_pthread_exit added
* A new tcb flag TCB_FLAG_CANCEL_DOING added
* up_pthread_exit implemented for riscv/arm arch

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-05-21 22:46:52 -06:00
Huang Qi
81a01d089b libc/pthread: Fix comment and document issue
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-05-21 22:46:52 -06:00
Gregory Nutt
bb9b58bdde libc: Move pthread_create to user space
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
Change-Id: I5c447d94077debc79158686935f288e4c8e51e01
2021-05-21 22:46:52 -06:00
chao.an
6c40185985 arm/v7-a/fpu: add VFP-v3 D32 support
Signed-off-by: chao.an <anchao@xiaomi.com>
2021-05-21 09:55:00 -03:00
Jukka Laitinen
e4fd99682e rv64gc: use PRIx64 format for alert and assert
This fixes compilation warnings caused by number formatting

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-05-20 05:42:01 -05:00
Jukka Laitinen
e79a45bb93 rv64gc/riscv_assert.c: Fix compilation without CONFIG_DEBUG_ALERT
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-05-20 05:42:01 -05:00
Anthony Merlino
c9ccbb9e03 stm32h7xxxx_rcc.c: Fixes typo in comment 2021-05-20 00:53:49 -07:00
Anthony Merlino
35553147ba stm32h7 rcc: Sync h7x7xx and h7x3xx. Changes are relevant to both 2021-05-20 00:53:49 -07:00
SPRESENSE
6b5a4cbfd3 arch: cxd56xx: Fix parameter check of hostif buffer
Fix a parameter check of the buffer attribute in opening hostif driver.
2021-05-20 07:23:48 +02:00
SPRESENSE
db9c94962b arch: cxd56xx: Add host interface driver
Add host interface driver which supports I2C or SPI slave feature.
2021-05-20 07:23:48 +02:00
SPRESENSE
5a7a118320 arch: cxd56xx: Fix uninitialized variable for gnss driver
Fix uninitialized variable in gnss driver.
CodeSonar Warning 518288 - 518292
2021-05-20 07:23:48 +02:00
SPRESENSE
151fec4e98 arch: cxd56xx: Do not re-initialize the console for subcore
If the subcore configuration, which is mainly used in the Spresense
Arduino environment, is enabled, the serial console has been already
initialized by maincore. Then, don't need to re-initialize the UART1
serial driver.
2021-05-20 07:23:48 +02:00
SPRESENSE
efd4789b72 arch: cxd56xx: gauge: Use the dedicated debug macro
Replace to the battery dedicated debug macro instead of standard one.
2021-05-20 07:23:48 +02:00
SPRESENSE
50cb0306b6 arch: cxd56xx: charger: Use the dedicated debug macro
Replace to the battery dedicated debug macro instead of standard one.
2021-05-20 07:23:48 +02:00
SPRESENSE
bb348cc464 arch: cxd56xx: gnss: Fix compile error in debug log
Fix compile error when debug log is enabled.
Replace debug message from obsolete logerr() to _err().
2021-05-20 07:23:48 +02:00
SPRESENSE
6d3fb9ee81 arch: cxd56xx: wdt: Fix compile error in debug log
Fix compile error when CXD56_WDT_REGDEBUG is enabled.
2021-05-20 07:23:48 +02:00
SPRESENSE
f0cae6cdf3 arch: cxd56xx: Fix multiple open and close ADC driver
ADC driver does not support multiple open and close. It causes the memory
corruption by multiple free. This commit fixes this problem by introducing
the reference counter.
2021-05-20 07:23:48 +02:00
SPRESENSE
98871e58af arch: cxd56xx: Fix gnss open error by clock change
If the system clock is changed during loading gnssfw, gnss open may be
failed. So this commit prohibits clock change until loading gnssfw is
completed.
2021-05-20 07:23:48 +02:00
SPRESENSE
e26da5f564 arch: cxd56xx: Update isop firmware
Update isop firmware which supports for the error handling and i2c
multi-master environment.
2021-05-20 07:23:48 +02:00
SPRESENSE
f548ffa7a7 arch: cxd56xx: Support execution error by SCU sequencer
Enable interrupt by SCU sequencer execution error. If the interrupt
occurs, then it stops the sequencer and returns the error code.
2021-05-20 07:23:48 +02:00
SPRESENSE
ba6201401f arch: cxd56xx: Remove unnecessary i2c settings
Remove slave address register setting that is unnecessary for the
transfer by SCU sequencer.
2021-05-20 07:23:48 +02:00
SPRESENSE
ade26c17d2 arch: cxd56xx: Update i2c register initialization
Enable RX_FIFO_FULL_HLD_CTRL and RESTART of i2c control register in
i2c initial settings for transfer by SCU sequencer.
2021-05-20 07:23:48 +02:00
SPRESENSE
a10a4c483f arch: cxd56xx: Add SCU register definitions
Add SCU register definitions.
2021-05-20 07:23:48 +02:00
SPRESENSE
09cc6b780b arch: cxd56xx: update loader and gnssfw version
Update loader and gnssfw to version 2.2.20175
2021-05-20 07:23:48 +02:00
SPRESENSE
a276de741f arch: cxd56xx: Fix SPI setmode function
When SSP mode is changed, SSE bit of SSPCR1 register must be disabled.
2021-05-20 07:23:48 +02:00
SPRESENSE
89fd987a1a arch: cxd56xx: Fix RTC alarm cancellation process
There is an issue that the next alarm is expired immediately after
canceling a RTC alarm. Fixed alarm settings to be completely cleared
when canceling an RTC alarm.
2021-05-20 07:23:48 +02:00
SPRESENSE
67a56410ee arch: cxd56xx: Prohibit clock change during SPI transfer
If the system clock is changed during the SPI transfer, the SPI data can
be corrupted. So this commit prohibits the clock change during SPI transfer,
and keep the clock until the transfer is completed.
2021-05-20 07:23:48 +02:00
SPRESENSE
db340a8941 arch: cxd56xx: Support for suppresion of clock change
Introduce PM_CPUFREQLOCK_FLAG_HOLD into the frequency lock mechanism in
power manager, which is used to keep the current frequency without clock
change, for example, during the transfer of a periphral.
2021-05-20 07:23:48 +02:00
SPRESENSE
9b3a80cc37 arch: cxd56xx: Fix uart getting stuck during a clock change
UART driver is stopped and re-started during a clock change. When a UART
interrupt is generated in each process, the unexpected behavior will
occur and a console will get stuck with UART driver. This commit fixed
each process is performed atomically.
2021-05-20 07:23:48 +02:00
jordi
ccc8c078f9 xtensa/esp32: Fix warning "is not defined"
Detected with "-Werror" flag
2021-05-19 20:03:03 +01:00
Anthony Merlino
e37ce7677b Try to address CI build error and a few macro fixes. 2021-05-19 10:41:18 -07:00
Anthony Merlino
b54a4c7788 Replace more ATIM_/BTIM_ macros with GTIM_ macros 2021-05-19 10:41:18 -07:00
Anthony Merlino
58c92be39c stm32 timers: Make some register operations more readable. 2021-05-19 10:41:18 -07:00
chenwen
9a99d813fa risc-v/esp32c3: Support ESP32-C3 auto-sleep 2021-05-19 07:00:40 -03:00
Chen Wen
e44ec9e48e xtensa/esp32: Fix code nxstyle issue 2021-05-19 06:45:42 -03:00
chenwen
f7db743152 xtensa/esp32: Support auto-sleep 2021-05-19 06:45:42 -03:00
chenwen
f50160f0e1 xtensa/esp32: Support tick-less OS 2021-05-19 06:45:42 -03:00
Abdelatif Guettouche
65e9ff5a48 xtensa/esp32/esp32_start.c: Remove an old and unnecessary piece of code.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-19 03:05:52 -05:00
Dong Heng
f12de4f7d9 riscv/esp32c3: Add ESP32-C3 ADC driver 2021-05-18 09:20:46 -03:00
Gustavo Henrique Nihei
26a5cb2094 risc-v/esp32c3: Add support for DMA transfers on SPI driver 2021-05-17 13:21:12 +01:00
Gustavo Henrique Nihei
132ffdd28d risc-v/esp32c3: Add burst transfer support for GDMA 2021-05-17 13:21:12 +01:00
Dong Heng
4a7f998c33 riscv/esp32c3: Fix RT timer issues
1. Enable alarm if there is timer active
2. Wake up main thread to delete timer
3. Wake up main thread when timer is timeout in ISR
2021-05-16 13:23:43 -05:00
Anthony Merlino
fa2b9ca43b stm32/stm32f7 tickless: Fix up_timer_getmask to be correct for the width of the timer. 2021-05-16 13:04:31 -05:00
Anthony Merlino
99a9d75cdd stm32f7: Remove references to BOARD_ENABLE_USBOTG_HSULPI. Prefer Kconfig option instead. 2021-05-16 01:02:51 -07:00
Jiuzhu Dong
73cc1f8884 driver/rtc: add config CONFIG_RTC_RPMSG_SERVER to
N/A
select rtc rpmsg role.

Change-Id: I7f9053b070593573caa5d988c6a2e13593da6bc5
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-05-15 14:33:52 -03:00
Jiuzhu Dong
f082893b9a driver/rtc: add config RTC_RPMSG_SERVER_NAME to
specified the name of remote proc(rpmsg server)

Change-Id: I0086bb43727a2bbb5e68f88907b5e4608182ef9c
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-05-15 14:33:52 -03:00
Jiuzhu Dong
ff567124d3 driver/syslog: add config SYSLOG_RPMSG_SERVER_NAME to
N/A

specified the name of remote proc(rpmsg server)

Change-Id: Ie270d651071e87a40a80ab489597ae18db9814f0
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-05-15 09:39:57 -03:00
Dong Heng
beed26b6bf riscv/esp32c3: Add ESP32-C3 LEDC(PWM) driver 2021-05-15 08:38:37 -03:00
chenwen
16667930cb risc-v/esp32c3: Support ESP32-C3 PM standby and sleep 2021-05-12 10:15:06 -03:00
Juha Niskanen
abcb67a292 Remove final remaining CONFIG_DISABLE_SIGNALS and CONFIG_DISABLE_SIGNAL 2021-05-10 17:04:38 -03:00
Nathan Hartman
8af9d39667 Documentation, comments: Minor improvements and typos fixed 2021-05-09 19:12:13 -07:00
David Sidrane
17b786399c stm32:SDIO:Use 250 Ms Data path timeout, regardless of Card Clock frequency 2021-05-07 17:39:08 -04:00
David Sidrane
3e49d49cd9 stm32h7:SDMMC:Use 250 Ms Data path timeout, regardless of Card Clock frequency 2021-05-07 17:39:08 -04:00
David Sidrane
c45e03b75f stm32f7:SDMMC:Use 250 Ms Data path timeout, regardless of Card Clock frequency 2021-05-07 17:39:08 -04:00
Gustavo Henrique Nihei
90a4e8d718 risc-v/esp32c3: Fix DMA channels' interrupt IDs 2021-05-07 16:46:41 -03:00
Dong Heng
bd8e37bb4b risc-v/esp32c3: Add ESP32-C3 (G)DMA driver and testing 2021-05-07 16:46:41 -03:00
Harri Luhtala
e5f1069654 arch/arm/src/stm32l4/hardware/stm32l4xrxx: pinmap alternative function for SPI2 2021-05-07 05:08:05 -07:00
Raman Gopalan
9044594545 at32uc3_gpioirq.c: Fix typo: contex -> context 2021-05-06 11:25:38 -03:00
Gustavo Henrique Nihei
534c058d93 spi: Adopt CPHA as the abbreviation for clock phase 2021-05-05 16:56:07 -03:00
David Sidrane
92dba32c8c stm32h7:Allow for reuse of the OTG_ID GPIO
Currently Nuttx doesn't seem to be any real support for OTG.
    In the future when OTG is supported. This Knob can be removed
    and drivers can enable their pin sets based on CONFIG_OTG.
    (Adding CONFIG_OTG at this time would be misleading.)
2021-05-05 12:22:11 -04:00
David Sidrane
cd603af958 stm32f7:Allow for reuse of the OTG_ID GPIO 2021-05-05 12:22:11 -04:00
David Sidrane
8624f9a444 s32k1xx:flexcan Use inttypes in printing macro 2021-05-05 06:07:50 -07:00
David Sidrane
7fb59e4f36 kinetis:flexcan Use inttypes in printing macro 2021-05-05 06:07:50 -07:00
David Sidrane
e5ceb062f9 stm32f7:Use inttypes in printing macro
stm32f7:SDMMC Use inttypes in printing macro

stm32f7:CAN Use inttypes in printing macro

stm32f7:DMA Use inttypes in printing macro

stm32f7:serial fix compile error from UNUSED() change
2021-05-05 06:07:50 -07:00
David Sidrane
cbe3e120d5 stm32h7:Use inttypes in printing macros 2021-05-05 06:07:50 -07:00
raiden00pl
b721ba05aa stm32_pwm.c: fix compilation warnings 2021-05-05 09:32:58 -03:00
raiden00pl
7cb7fe3f38 stm32_pwm: fixes for PULSECOUNT support
1. generate an indefinite number of pulses when info->count = 0
2. timers that don't support pulse-count shouldn't use pulse-count logic
2021-05-05 09:32:58 -03:00
Sara Souza
873293cc3f xtensa/esp32: Applies REG_MASK to extract a field value 2021-05-05 01:30:03 -07:00
Sara Souza
50daf24242 esp32/esp32-c3: Adds two helpers to extract and include a field value 2021-05-05 01:30:03 -07:00
Sara Souza
cce42d5f74 xtensa/esp32: Reorganize the pins initialization and adds showprogress in __start 2021-05-05 01:30:03 -07:00
Sara Souza
afd6b26232 xtensa/esp32: Replace serialout/in and fixes the fifo counter issue 2021-05-05 01:30:03 -07:00
Abdelatif Guettouche
f3a6d80c95 esp32c3/hardware: Include files of the same level by their names only and
remove unnecessary includes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-05 01:28:22 -07:00
Abdelatif Guettouche
e24af207f8 esp32/hardware: Include files of the same level by their names only and
remove unnecessary includes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-05 01:28:22 -07:00
raiden00pl
7b53a5fe1c stm32_adc.c: rename a struct member in struct adccmn_data_s from 'initialized' to 'refcount' 2021-05-05 01:27:56 -07:00
Sara Souza
b01ddef61b risc-v/esp32-c3: Adds freerun wrapper 2021-05-04 15:22:26 -03:00
Gustavo Henrique Nihei
7ded22fb1a risc-v/k210: Fix SMP interrupt stack size calculation 2021-04-29 19:39:17 -07:00
Gustavo Henrique Nihei
e0da0bf6bd arch/risc-v: Fix interrupt stack alignment 2021-04-29 19:39:17 -07:00
Gustavo Henrique Nihei
f8a36f10c3 arch: Uniformize optimization flag setting across architectures 2021-04-29 19:17:16 -07:00
Gustavo Henrique Nihei
abf039b744 risc-v/rv32im: Set MAXOPTIMIZATION regardless of any debug options 2021-04-29 19:17:16 -07:00
Alan C. Assis
0a0a034a3f esp32: replace EPS32 typo with ESP32 2021-04-29 18:03:05 -03:00
Juha Niskanen
07cde736bd arch: fix some printf format errors 2021-04-29 19:16:56 +01:00
Alexander Vasiljev
940c5b69c3 stm32h7: serial: use dma tx semaphore as resource holder 2021-04-29 03:19:44 -07:00
Dong Heng
fcd5648bca riscv/esp32c3: Fix SPI Flash driver internal chip data address error
"g_rom_flashchip" is not in fixed address between all ESP32-C3's different versions.
2021-04-28 09:58:16 -05:00
Gustavo Henrique Nihei
edeb16123b risc-v/esp32c3: Uniformize alignment for assembly instructions 2021-04-28 09:55:57 -05:00
Gustavo Henrique Nihei
9e7d3cff92 risc-v/esp32c3: Improve interrupt handler documentation 2021-04-28 09:55:57 -05:00
Gustavo Henrique Nihei
27d32f4309 risc-v/esp32c3: Reorder register restoration on interrupt handler epiloque 2021-04-28 09:55:57 -05:00
Gustavo Henrique Nihei
66a15a6f83 risc-v/esp32c3: Fix wrong references to ESP32 2021-04-28 15:41:30 +01:00
Gustavo Henrique Nihei
7caebdd50f arch/risc-v: Fix stack alignment according to calling convention
The RISC-V Integer Calling Convention states that the stack pointer
shall always be aligned to a 128-bit boundary upon procedure entry, both
for RV32* and RV64* ISAs (exception to the RV32E ISA, which must follow a
specific convention)
2021-04-27 23:12:20 -05:00
Gustavo Henrique Nihei
91955be0e1 xtensa/esp32: Change ESP32_RT_TIMER_TASK_PRIORITY comment into help text 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
2b179c5ab3 xtensa/esp32: Add missing default value for CONFIG_ESP32_GPIO_IRQ 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
95a76adc90 xtensa/esp32: Uniformize Kconfig alignment and styling 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
03c8e2d5c7 xtensa/esp32: Remove inconsistent usage of comment command 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
4d3fa83d7a xtensa/esp32: Remove redundant dependency 2021-04-27 20:45:28 -06:00
Gustavo Henrique Nihei
016652f7d7 risc-v/esp32c3: Change ESP32C3_RT_TIMER_TASK_PRIORITY comment into help text 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
9df2179562 risc-v/esp32c3: Uniformize Kconfig alignment and styling 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
1e45a9329b risc-v/esp32c3: Remove inconsistent usage of comment command 2021-04-27 20:43:07 -06:00
Gustavo Henrique Nihei
cd6c29a126 risc-v/esp32c3: Remove redundant dependency 2021-04-27 20:43:07 -06:00
Byron Ellacott
9d4742af00 Add experimental support for an eZ80 toolchain using llvm and GNU binutils.
An additional fix for the RTC driver to lock the RTC after setting values instead of unlocking it is included.
2021-04-27 21:18:48 -03:00
chenwen
666d718302 xtensa/esp32: Fix crash issue caused by null pointer operation 2021-04-27 11:00:16 +01:00
Gustavo Henrique Nihei
beefd51296 risc-v/esp32c3: Add driver for General Purpose SPI Master 2021-04-26 20:50:32 -03:00
Masayuki Ishikawa
8e161bc992 arch: rp2040: Add stack coloration for the idle task
Summary:
- This commit adds stack coloration for the idle task

Impact:
- rp2040 with CONFIG_STACK_COLORATION=y

Testing:
- Tested with nsh, nshsram and smp configurations
- NOTE: CONFIG_STACK_COLORATION=y needs to be added
2021-04-25 03:19:24 -05:00
Masayuki Ishikawa
dc9223f4cf arch: rp2040: Fix the initial stack pointer
Summary:
- The NuttX for raspberrypi-pico boots via the boot_stage2 provided
  by the pico-sdk which sets the MSP at the end of the SRAM.
- However, the NuttX expects the MSP is set to the top of the idle stack.
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with nsh, nshsram and smp configrations
2021-04-25 03:19:24 -05:00
Sara Souza
5c562c1068 risc-v/esp32-c3: Reorganize the timer logic for wireless use 2021-04-22 21:38:16 -05:00
Sara Souza
0c440cfdfe xtensa/esp32: Reorganize the timer logic for wireless use 2021-04-22 21:38:16 -05:00
Dong Heng
fecdd27df3 esp32 & esp32c3: Update Wi-Fi BT and Wi-Fi libraries to fix some issues 2021-04-22 07:34:06 -03:00
Sara Souza
7a80cbf93f risc-v/esp32-c3: Adds oneshot timer driver. 2021-04-22 09:13:58 +01:00
Sara Souza
f696364b6a xtensa/esp32: Adds freerun wrapper 2021-04-21 16:37:39 -03:00
Masayuki Ishikawa
1b00e5d518 spinlock: Remove SP_SECTION
Summary:
- SP_SECTION was introduced to allocate spinlock in non-cachable
  region mainly for Cortex-A to stabilize the NuttX SMP kernel
- However, all spinlocks are now allocated in cachable area and
  works without any problems
- So SP_SECTION should be removed to simplify the kernel code

Impact:
- None

Testing:
- Build test only

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-20 22:41:44 -05:00
Masayuki Ishikawa
1a9e7efde5 smp: Remove CONFIG_SMP_IDLETHREAD_STACKSIZE
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
  the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code

Impact:
- All SMP configurations

Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)

Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
2021-04-19 21:46:39 -05:00
Anthony Merlino
14db894caf stm32h7: Allow selection of SDMMC clock source. 2021-04-19 08:57:49 -07:00
Abdelatif Guettouche
c1b0ee436c arch/xtensa/src/esp32/Kconfig: Make bank switching default to disabled.
This config is only useful when there is a > 4MB PSRAM and thus needs to
be selected by the user explicitly.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-04-19 07:48:35 -05:00
YAMAMOTO Takashi
7f307f9765 sim: Restore stack alignemnt
Reapply the following commit [1], which has been reverted by
the recent change [2] with no obvious reasons.

Also, add a comment block to explain the calculation.

[1]
```
commit 298c2e5e4f
Author: YAMAMOTO Takashi <yamamoto@midokura.com>
Date:   Wed Jan 29 03:26:43 2020 +0900

    sim: Fix stack alignment

    The recent x86-64 convention requires 16-byte alignment before
    (not after) calling a function.

    This fixes snprintf crash I observed on macOS while saving XMM registers.
```

[2]
```
commit 2335b69120
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Mon Apr 12 23:44:08 2021 +0800

    arch: Allocate the space from the beginning in up_stack_frame

    arch: Allocate the space from the beginning in up_stack_frame

    and modify the affected portion:
    1.Correct the stack dump and check
    2.Allocate tls_info_s by up_stack_frame too
    3.Move the stack fork allocation from arch to sched

    Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
```
2021-04-19 01:29:38 -05:00
Masayuki Ishikawa
64f46b7f7e arch: k210: Add coloration for the idle stacks
Summary:
- This commit adds coloration for the idle stacks

Impact:
- k210 only

Testing:
- Tested with smp and nsh configs with QEMU and dev board

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-19 01:09:22 -05:00
Masayuki Ishikawa
44bc681daa arch: fe310: Add coloration for the idle stack
Summary:
- This commit adds coloration for the idle stack
- Also, apply la pseudo-instruction instead of lui and addi

Impact:
- fe310 only

Testing:
- Tested with nsh with QEMU and dev board

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-19 01:05:40 -05:00
Yuichi Nakamura
048802bcd2 arm/rp2040: Add RP2040 I2S driver 2021-04-19 09:39:51 +09:00
Yuichi Nakamura
41b193e07f arm/rp2040: Add RP2040 PIO APIs 2021-04-19 09:39:51 +09:00
David Sidrane
c801de4201 stm32h7:Serial Add RX and TX DMA
stm32h7:Serial Use Idel to poll RX DMA

stm32h7:Serial Do not loop in an ISR!

stm32h7:Serial signal txdma completion with semaphore

stm32h7:Serial Apply formatting suggestions from code review

Co-authored-by: Mateusz Szafoni <raiden00pl@gmail.com>

stm32h7: Serail Add Power Managment (Untested)
2021-04-17 09:56:41 +02:00
Xiang Xiao
2335b69120 arch: Allocate the space from the beginning in up_stack_frame
arch: Allocate the space from the beginning in up_stack_frame

and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
Xiang Xiao
8640d82ce0 arch: Rename g_intstackbase to g_intstacktop
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-16 12:41:41 +09:00
David Sidrane
3feb3a247d stm32:Serial DMA config USART{4578} -> UART{4578} 2021-04-15 21:26:32 -05:00
raiden00pl
82ce1de7cd stm32/stm32_foc: remove the debug message before the calibration start
For unknown reasons this message may interferre with the calibration
procedure and result in invalid calibariton data.
We leave only a message informing about the end of the the calibration.
The problem was observed for STM32G4 + IHM16M1.
2021-04-15 06:37:15 -05:00
raiden00pl
13f62d15cc stm32/stm32_foc: do not enable PWM outputs that are not in use 2021-04-15 06:37:15 -05:00
YAMAMOTO Takashi
3806803a7a arch/xtensa/src/esp32/esp32_user.c: Implement L16SI emulation
I don't know why this was not necessary before.
Probably I was just lucky about the combination of configs.
Or maybe some of recent changes happened to make the compiler
to use the instruction.

```
400d38f0 <mm_givesemaphore>:
400d38f0:       004136          entry   a1, 32
400d38f3:       228c            beqz.n  a2, 400d38f9 <mm_givesemaphore+0x9>
400d38f5:       0228            l32i.n  a2, a2, 0
400d38f7:       52cc            bnez.n  a2, 400d3900 <mm_givesemaphore+0x10>
400d38f9:       fea0b2          movi    a11, 254
400d38fc:       000306          j       400d390c <mm_givesemaphore+0x1c>
400d38ff:       00              .byte 00
400d3900:       019232          l16si   a3, a2, 2
400d3903:       feebe5          call8   400d27c0 <getpid>
400d3906:       0813a7          beq     a3, a10, 400d3912 <mm_givesemaphore+0x22>
400d3909:       05a1b2          movi    a11, 0x105
400d390c:       f241a1          l32r    a10, 400d0210 <_stext+0x1f0>
400d390f:       ff23e5          call8   400d2b4c <_assert>
400d3912:       1288            l32i.n  a8, a2, 4
400d3914:       0828a6          blti    a8, 2, 400d3920 <mm_givesemaphore+0x30>
400d3917:       880b            addi.n  a8, a8, -1
400d3919:       1289            s32i.n  a8, a2, 4
400d391b:       000606          j       400d3937 <mm_givesemaphore+0x47>
400d391e:       00              .byte 00
400d391f:       00              .byte 00
400d3920:       ffaf82          movi    a8, -1
400d3923:       015282          s16i    a8, a2, 2
400d3926:       00a082          movi    a8, 0
400d3929:       016282          s32i    a8, a2, 4
400d392c:       02ad            mov.n   a10, a2
400d392e:       feb125          call8   400d2440 <sem_post>
400d3931:       19a1b2          movi    a11, 0x119
400d3934:       fd4a96          bltz    a10, 400d390c <mm_givesemaphore+0x1c>
400d3937:       f01d            retw.n
400d3939:       000000          ill
```
2021-04-15 12:18:52 +01:00
YAMAMOTO Takashi
a28de1d681 arch/xtensa/src/esp32/esp32_user.c: Fix S16I/L16LU emulation
I misunderstood how imm8 is used to calculate the address.
2021-04-15 12:18:52 +01:00
Anthony Merlino
b1f637a6ea stm32h7: Don't automatically select HSI48 as it may depend on USBSEL.
Add preprocessor logic that can catch the condition where the board is selecting the HSI48 as the USBSEL source, but the HSI48 isn't enabled.
2021-04-15 02:00:37 -07:00
Anthony Merlino
4c8d70dd2e stm32h7: Initialize CSI and HSI48 clocks as needed based on enabled peripherals. 2021-04-15 02:00:37 -07:00
YAMAMOTO Takashi
51490bad55 modlib: Implement sh_addralign handling
I've seen a module with 16 bytes .rodata alignment for xmm operations.
It was getting SEGV on sim/Linux because of the alignment issue.
The same module binary seems working fine after applying this patch.

Also, tested on sim/macOS and esp32 on qemu,
using a module with an artificially large alignment. (64 bytes)
2021-04-14 21:17:07 -05:00
jturnsek
33b071ecb9 MIMXRT1064-EVK support 2021-04-14 14:57:26 -07:00
raiden00pl
ad8c09d0a1 stm32: include support for TIMERS_V3 2021-04-14 10:53:50 -04:00
raiden00pl
7c11397469 stm32: add definitions for TIMERS_V3. All credit goes to Nathan Hartman (hartmannathan) 2021-04-14 10:53:50 -04:00
raiden00pl
6d69600905 stm32/Kconfig: move configuration common for G4 under STM32_STM32G4XXX option 2021-04-14 10:53:50 -04:00
Marco Krahl
8456f3615e drivers/1wire: Moves header and adjusts include paths
Moves header to 1wire include sub directory.
Moves over common crc definitions to new interface.

Signed-off-by: Marco Krahl <ocram.lhark@gmail.com>
2021-04-14 02:49:28 -05:00
raiden00pl
beebb57445 stm32g4xx: add support for FOC 2021-04-13 14:38:28 -05:00
raiden00pl
835b129c94 stm32g4xx: add DBGMCU definitions 2021-04-13 14:38:28 -05:00
Anthony Merlino
9c8c2b0db2 Separate CLOCK_TIMEKEEPING and SCHED_TICKLESS. 2021-04-13 11:42:31 -05:00
raiden00pl
c90a6bdf2b stm32/Kconfig: enable ADCx DMA support if DMAMUX enabled 2021-04-13 12:08:17 -03:00
raiden00pl
bf04ef9a3c stm32g4: add support for DMA (DMAMUX) 2021-04-13 12:08:17 -03:00
raiden00pl
fbb7e95ebf stm32g4xxxx_dmamux.h: rename defs to match other chips and add DMAMAP defs 2021-04-13 09:20:18 -05:00
raiden00pl
a735252d78 stm32h7,stm32g0: fix typos in DMAMUX 2021-04-13 09:20:18 -05:00
raiden00pl
62001bff3b stm32g4xx: add support for PWM 2021-04-13 09:19:52 -05:00
raiden00pl
4c741bc9a5 stm32/Kconfig: G4 chips use TIMERS_V2 2021-04-13 09:19:52 -05:00
raiden00pl
ff2ae3e894 stm32g4xx: add support for ADC 2021-04-13 09:29:09 -03:00
Alin Jerpelea
20d315abfe NuttX: Falker Atomacao Agrícola Ltda: update licenses to Apache
Falker Atomacao Agrícola Ltda has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-13 05:28:28 -05:00
Anthony Merlino
1a5a7a1b63 stm32h7: Allow OTGHS to use internal FS PHY 2021-04-12 23:21:34 -05:00
Jukka Laitinen
3f6bb76e01 arch/arm/src/stm32f7/stm32_allocateheap.c: Fix MPU alignments
Change the logic for allocating user heap for PROTECTED_BUILD:
- Don't rely on SRAM1_END alignment
- Make better use of MPU subregions when allocating the heap
- Don't duplicate the calculation of user heap start in kernel heap
  allocation; use the previous calculation directly

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-04-12 23:20:18 -05:00
Jukka Laitinen
ea36c2c7ea Remove MPU_RASR_S bit from stm32f7 MPU user mode intsram configration
For some reason, setting the "shareable" bit makes the SRAM not writable

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-04-12 23:20:18 -05:00
Xiang Xiao
3f9908f7d1 Remove the unnecessary math.h inclusion
or move from header file to source file since math.h doesn't always exist

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-12 22:58:23 -04:00
Anthony Merlino
2b46a0fdde stm32h7: Adds guards around stm32_iocompensation. 2021-04-12 15:08:52 -07:00
Anthony Merlino
a45b8cc17c stm32h7: Add support for IO compensation. 2021-04-12 15:08:52 -07:00
jturnsek
bbe875876d Modified FlexSPI driver 2021-04-12 17:22:14 -03:00
jturnsek
7453e76d98 FlexSPI NOR driver 2021-04-12 11:35:44 -03:00
Dong Heng
31854ca135 riscv/esp32c3: Fix heap end address 2021-04-12 01:36:11 -05:00
Masayuki Ishikawa
7ce1033aa2 arch: k210: Fix interrupt stack corruption in SMP mode
Summary:
- I noticed that stack corruption happens due to recent refactoring
- This commit fixes this issue

Impact:
- SMP only

Testing:
- Tested with maix-bit:smp (QMU and dev board)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-11 13:00:40 -05:00
Alan Carvalho
ac5fb7d701 esp32: Fix GPIO Pull-Up/Pull-Down using RTC GPIO
Some ESP32 GPIO pins (2, 4, 12, 13, 25, 27, 32) weren't accepting
pull-up/pull-down resistors. These pins are RTC GPIO pins and need
to have pull-up/pull-down configured in the RTC registers.

Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-04-11 14:36:02 +01:00
raiden00pl
cf645fc9ba arch/arm/src/stm32/stm32_foc.c: add modifications to support STM32F1
- generalize DBGMCU for PWM timer
- use ADC common data only if coupled ADC present
- rename some ADC definitions that collide with stm32_adc.h
2021-04-11 03:52:21 -05:00
raiden00pl
021a89569d arch/arm/src/stm32: introduce DBGMCU IP core versions 2021-04-11 03:52:21 -05:00
raiden00pl
3caf26fe3e arch/arm/src/stm32/stm32_adc.c: support adc_inj_startconv also for STM32F1 2021-04-11 03:52:21 -05:00
Anthony Merlino
2aa2b7669f stm32f7 tickless: Fix handling of overflow for different width timers. 2021-04-10 23:38:16 -05:00
Anthony Merlino
f979dd72c1 stm32/stm32f7 tickless: Fix clearing and checking of interrupts. 2021-04-10 23:38:16 -05:00
Anthony Merlino
dd00c6427e stm32 tickless: Fixes printf warnings 2021-04-10 23:38:16 -05:00
Xiang Xiao
3f67c67aaf arch: Fix the stack boundary calculation and check
All supported arch uses a push-down stack:
The stack grows toward lower addresses in memory. The stack pointer
register points to the lowest, valid working address (the "top" of
the stack). Items on the stack are referenced as positive(include zero)
word offsets from sp.
Which means that for stack in the [begin, begin + size):
1.The initial SP point to begin + size
2.push equals sub and then store
3.pop equals load and then add

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-10 08:39:54 -07:00
Alin Jerpelea
7424683d29 arch: lpc17xx_40xx: Mixed Case Identifier fix
Fix for Mixed Case Identifier reported by nxstyle.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:46:32 -05:00
Alin Jerpelea
6f5537eae2 arch: lpc2378: Fix for Mixed Case Identifier errors
Fix for Mixed Case Identifier errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:46:32 -05:00
Alin Jerpelea
08612337f6 NuttX: nxstyle fixes
nxstyle fixes to pass CI.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Alin Jerpelea
eac1d28aae NuttX: Janne Rosberg: update licenses to Apache
Janne Rosberg has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Ivan Ucherdzhiev has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Alin Jerpelea
a2813b142f NuttX: Jose Pablo Carballo: update licenses to Apache
Jose Pablo Carballo has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Alin Jerpelea
231b8518b7 NuttX: Ken Pettit: update licenses to Apache
Ken Pettit has submitted the ICLA and we can migrate the licenses
 to Apache.

Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-10 06:42:19 -05:00
Xiang Xiao
0fdde5be26 arch/esp32: Fix error: Mixed case identifier found
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-10 12:00:06 +01:00
Alin Jerpelea
3c939c42fb arch: x86: Mixed Case Identifier fix
Fix for Mixed Case Identifier reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-09 08:04:41 -05:00
Alin Jerpelea
3b576758f1 arch: z80: nxstyle fixes
Fix for TABs and Mixed Case identifiers reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-09 08:04:41 -05:00
chenwen
4ca34ac5b5 risc-v/esp32c3: Fix the issue of getting wrong Wi-Fi password 2021-04-09 03:44:29 -05:00
Anthony Merlino
d37275f348 stm32f7: Freeze tickless timer during debug halt. 2021-04-08 23:38:00 -05:00
Gustavo Henrique Nihei
4d4250fcca xtensa/esp32: Improve SPI polling to use the entire HW buffer 2021-04-08 23:36:28 -05:00
chenwen
a41d37cffd arch/risc-v/src/common/riscv_initialize.c: Add telnet_initialize to riscv's up_initialize 2021-04-08 23:18:32 -05:00
Alin Jerpelea
e1d8b62209 arch: lpc43xx: spifilib_fam_standard_cmd.c: fix nxstyle errors
fix errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:49:09 -05:00
Alin Jerpelea
42d17dcaf4 arch: lpc43xx: Mixed Case Identifier fix
Fix for Mixed Case Identifier reported by nxstyle tool.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
602d384325 arch: tms570: fix Mixed Case Identifier
Fix Mixed Case Identifier reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
37b314f29f LICENSE: add 3rd party license for Texas Instruments Incorporated
Add 3rd party licenses for Texas Instruments Incorporated to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
12aebdf1a6 LICENSE: add 3rd party license for Infineon Technologies AG
Add 3rd party licenses for Infineon Technologies AG to the LICENSE file.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
8dcd16d5a6 arch: arm: nxstyle fixes
Fixes for nxstyle warnigs

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
d2e7ea05c6 NuttX: typo fix
Yype fix for Public Functions reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 22:48:46 -05:00
Alin Jerpelea
628d8ca9e1 arch: mips: nxstyle fixes
fixes for errors reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-08 11:41:02 -03:00
Xiang Xiao
27425f3035 arch/z80: Remove the temporary file ez80_serial.c.SAVE
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-08 11:07:12 +02:00
Masayuki Ishikawa
445770a600 arch: sim: Refactor signal handling
Summary:
- This commit refactors signal handling logic

Impact:
- None

Testing:
- Tested with sim:smp and sim:ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-04-08 01:59:31 -05:00
Matias N
ab206687bb Replace wrong inclusion of sys/errno.h (toolchain provided) with errno.h 2021-04-07 21:27:06 -05:00
Alin Jerpelea
cb2ecefbf1 arch: xtensa: fix nxstyle errors
Fix for errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 21:21:51 -05:00
Alin Jerpelea
bc5f0092f1 arch: x86: fix Mixed Case errors
Fix for Mixed Case errors reported by the nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 21:21:51 -05:00
Gregory Nutt
a9e2195e65 Remove unused 'running' field from freerun lower half drivers.
That field is never used and, in most cases, is never initialized correctly.

This should have no impact to anything with the possible exception of free-running drivers.

Verified using CI builds only.
2021-04-07 20:35:50 -03:00
Matias N
d88b5aac97 esp32: move common XTAL and RUN_IRAM configs to ESP32 KConfig 2021-04-07 21:45:48 +01:00
Alin Jerpelea
2c4e9e7664 arch: x86_64: fix Mixed Case errors
Fix for Mixed Case errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 10:48:26 -05:00
Alin Jerpelea
72fb895d41 arch: x86_64: fix nxstyle errors
Fix for errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 10:48:26 -05:00
Alin Jerpelea
abdc60e72f arch: samXX: Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
9be2db897d arch: sam: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
74cde4f9bf arch: armv7-r: Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
68cd957c62 arch: armv7-r: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Alin Jerpelea
ce08e0ca6c arch: armv7-a: move references from License header
for compliance references should be moved after the license header

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-07 06:43:20 -05:00
Xiang Xiao
bfbe705e3f arch/arm: Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 16:18:27 +09:00
Xiang Xiao
eeb8931c04 arch/arm: align arm vector related code with armv7-a
commit 3c30c8b90b
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date:   Tue Apr 6 15:47:27 2021 +0800

    arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp

    to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 16:18:27 +09:00
Xiang Xiao
0779f34390 arch/arm: Add PSR_ prefix to the mode state like armv7-a
no real function change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 16:18:27 +09:00
Anthony Merlino
01fabe6c67 stm32h7: Actually use the AXI SRAM as the main heap as the documentation describes.
The comments at the top of the file say this:
```
This will be automatically registered
 * - AXI SRAM is a 512kb memory area. This will be automatically registered
 *      with the system heap in up_allocate_heap, all the other memory
 *      regions will be registered in arm_addregion().
```

but the implementation was using SRAM123 instead. Furthermore, arm_addregion then re-adds SRAM123 again.
2021-04-06 22:47:20 -05:00
Anthony Merlino
d69cd4ba03 stm32h7: Adds stm32_dbgmcu.h to match stm32f7 port. 2021-04-06 22:44:07 -05:00
Anthony Merlino
3a10f88bdf stm32h7: Fixes bug in stm32_sdmmc.c where DCACHE guards were blocking a needed variable. 2021-04-06 22:43:27 -05:00
Anthony Merlino
068e71d0c6 stm32h7: Expose flash lock, unlock, and write protect functions to boards. 2021-04-06 22:42:52 -05:00
Anthony Merlino
8c73ea68d6 stm32f7: Remove the one and only reference to STM32_BOARD_HCLK. 2021-04-06 22:42:06 -05:00
Xiang Xiao
a7f7796db1 arch/arm: Change all spsr_cxsf to spsr
unify the SPSR register usage

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-07 06:44:37 +09:00
Alin Jerpelea
72041911ce NuttX: Marco Krahl: update licenses to Apache
Marco Krahl has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt, S.A has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-06 12:50:41 -05:00
Sara Souza
0926e7c578 risc-v/esp32-c3: Fixes gargabe UART issue, refactors serial driver, changes default pins of UART 1 and fixes low baud rate issue. 2021-04-06 11:44:06 -03:00
Xiang Xiao
3c30c8b90b arch/arm: Remove g_irqtmp, g_undeftmp and g_aborttmp
to avoid multiple CPU access them concurrently in SMP case

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 22:45:51 +09:00
Xiang Xiao
822bb3ff78 arch/armv7-r: Add FIQ stack CONFIG_ARCH_INTERRUPTSTACK > 7
just like what has done on armv7-a

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 22:45:51 +09:00
Fotis Panagiotopoulos
1dee243e29 syslog: Added multi device support in syslog_device. 2021-04-06 07:32:23 -05:00
Xiang Xiao
7d3266461b arch/armv7-a: Remove the special process of the nest level
it shouldn't need anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-06 17:07:46 +09:00
Anthony Merlino
b21cb3308a Fixes race condition in event wait logic of SDMMC driver.
This change makes it so that the timeout is set as part of the SDIO_WAITENABLE call instead of the SDIO_EVENTWAIT call. By doing so, you eliminate all opportunity for a race condition.

stm32h7:sdmmc Check if busy ended early
2021-04-05 23:08:45 -05:00
Xiang Xiao
807d4490da arch/arm: Minor style fix
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 13:19:20 -07:00
Xiang Xiao
39fc9325cf arch/arm: Replace "b lr" or "mov pc, lr" with "bx lr"
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:50:14 -07:00
Xiang Xiao
be50a24e3d arch/arm: Clear .bss section after copying .data section
to avoid batch copy(32 bytes) overwrite the zeroed .bss section

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:48:20 -07:00
Xiang Xiao
d1e06b4c09 arch/arm: Call arm_lowputc after SP setup
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 05:48:20 -07:00
Xiang Xiao
dd1d980c3a arch/sim: Move setjmp/longjmp to libc/machine/sim
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 09:00:42 -03:00
Xiang Xiao
9097244cb8 build: Makefile should reference CONFIG_HOST_xxx
instead to detect the host through uname

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 23:20:35 -07:00
Xiang Xiao
e91a737310 arch/arm: Remove .cpu directive from assemble file
1.To support the different MCU in series(e.g. cortex-m0+)
2.It's redundant since we already specify in compliler option

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 17:29:42 -07:00
Xiang Xiao
b7ad0b3d0d arch/armv6-m: Remove cpsid and cpsie from exception_common
since the hardware do the action automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 17:26:49 -07:00
Xiang Xiao
3cf070e173 arch/armv8-m: Merge ite instruction to the previous one
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 17:26:07 -07:00
Xiang Xiao
d62ae03bf8 arch: Move setjmp/longjmp to libc/machine
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 16:30:37 -07:00
Nathan Hartman
92c61058c1 arch/stm32h7: Fix syntax error
arch/arm/src/stm32h7/stm32_dma.c:

     * stm32_bdma_residual(): Fix missing semicolon.
2021-04-04 22:32:09 +01:00
Xiang Xiao
e7dffdf06f arch/arm: Replace the hardcode syscall number with macro
and change SYS_context_[save|restore] to SYS_[save|restore]_context

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 16:18:10 -03:00
Xiang Xiao
2268c19171 arch/arm: Fix the style issue in assemble files
remove the unused header file and mimic the difference between sub arch

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 14:39:16 +01:00
Alan C. Assis
4064e33bd4 stm32l4: Fix small typo on stm32l4_adc.h
Co-authored-by: Xiang Xiao <xiaoxiang781216@gmail.com>
2021-04-03 23:33:51 -05:00
Xiang Xiao
5f3a98b5a8 libc/assert: Reference the expression in all case
to avoid the warning "defined but not used"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I55b7c092d0f2e5882fc1784987657c10cdf2d90b
2021-04-03 21:00:41 +01:00
Alin Jerpelea
015a205ec6 arch: arm: David Sidrane: update licenses to Apache
David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Mateusz Szafoni has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
675bd7d97e arch: arm: stm32: Uros Platise : update licenses to Apache
Uros Platise has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sdidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
f75c6cc7e4 arch: arm: Nicholas Chin: update licenses to Apache
Nicholas Chin has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
51be18433d arch: arm: stm32: Paul A. Patience: update licenses to Apache
Paul A. Patience has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
b89f67459d arch: arm: stm32: Max Holtzberg: update licenses to Apache
Max Holtzberg has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alin Jerpelea
6ceb0d8d9b arch: arm: imxrt: Actia Nordic AB: update licenses to Apache
Actia Nordic AB has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 09:36:43 -05:00
Alan Carvalho de Assis
bac84de45f esp32c3: Add support to RNG driver
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-04-03 07:20:03 -05:00
Alin Jerpelea
26fef3f6a1 NuttX: Fix nxtyle errors
Fix errors reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 04:20:31 -07:00
Alin Jerpelea
08e5378b11 NuttX: Gregory Nutt: update licenses to Apache
Several licenses were missed in the initial work

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-03 04:20:31 -07:00
hotislandn
b4b175cb7f arch:rv64:add memory clobber to inline asm for syscall.
Signed-off-by: hotislandn <hotislandn@hotmail.com>
2021-04-03 00:54:23 -05:00
Alan C. Assis
18f88c35fc esp32: Fix small typo that will trigger an error when IPv6 is enabled 2021-04-03 00:53:02 -05:00
Alin Jerpelea
778f050102 arch: xtensa: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-02 03:14:31 -05:00
Gustavo Henrique Nihei
2d0e690803 xtensa/esp32: Refactor register access functions on SPI driver 2021-04-01 17:13:55 -03:00
raiden00pl
5bff5dc971 motor/foc: use motor debug messages in FOC files 2021-04-01 15:43:49 -03:00
Alin Jerpelea
7a29e1f5fb drivers: Nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
3d96d5f2ce arch: esp32: Mixed Case identifier fix
Fix Mixed Case Identifier reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
b07780d13d arch: Nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
9b53451e42 arch: arm: cxd56: update licenses to Apache
Sony has submitted the SGA and we can migrate the licensed to Apacahe

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
190582c764 boards: stm32: Laurent Latil: update licenses to Apache
Laurent Latil has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
447d22da84 NuttX: Bob Feretich: update licenses to Apache
Bob Feretich has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
0f41c3c555 NuttX: Pierre-Noel Bouteville: update licenses to Apache
Pierre-Noel Bouteville has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
b4a33b5ec0 NuttX: Uros Platise: update licenses to Apache
Uros Platise has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Bob Feretich has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
a9bc5732bc NuttX: Ivan Petrov Ucherdzhiev: update licenses to Apache
Ivan Petrov Ucherdzhiev has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
8f3ed4e25d arch: arm: am335x: Petro Karashchenko: update licenses to Apache
Petro Karashchenko has submitted the ICLA and we can migrate the licenses
 to Apache.

Ivan Petrov Ucherdzhiev has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
8cb5c535b9 NuttX: Sebastien Lorquet: update licenses to Apache
Sebastien Lorquet has submitted the ICLA and we can migrate the licenses
 to Apache.

Alan Carvalho de Assis has submitted the ICLA and we can migrate the licenses
 to Apache.

Uros Platise has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
78ccf7cb91 NuttX: Neil Hancock: update licenses to Apache
Neil Hancock has submitted the ICLA and we can migrate the licenses
 to Apache.

Mateusz Szafoni has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
5f9e7d6b33 NuttX: Actia Nordic AB: update licenses to Apache
Actia Nordic AB has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
4037e1d47a NuttX: 2G Engineering: update licenses to Apache
2G Engineering has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
f8aed9864d NuttX: Max Holtzberg: update licenses to Apache
Max Holtzberg has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
4e26e39ffe arch: xtensa: Espressif Systems: update licenses to Apache
Espressif Systems has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
1631ad25c1 arm: stm32xx: Michael Jung: update licenses to Apache
Michael Jung has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
08a1ba3a2b arch: arm: stm32h7: Jukka Laitinen: update licenses to Apache
Jukka Laitinen has submitted the ICLA and we can migrate the licenses
 to Apache.

David Sidrane has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
ce66f7b081 NuttX: Johannes Schock: update licenses to Apache
Johannes Schock has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
dade0c36ca NuttX: Mateusz Tomasz Szafoni: update licenses to Apache
Mateusz Tomasz Szafoni has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
b84f45812e NuttX: Abdelatif Guettouche: update licenses to Apache
Abdelatif Guettouche has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
642701639d arch: arm: samd2l2: update license to Apache
Vasilijev Alexand Anatoljevich has submitted the ICLA and we can migrate the licenses
 to Apache.

Alan Carvalho de Assis has submitted the ICLA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
22eebf3edf arch: misoc: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
6035e838da arch: misoc: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
8c1456da6b arch: x86: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
32339d55c6 arch: x86: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
80ee1864df arch: sim: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
41342c0a12 arch: sim: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:25 -05:00
Alin Jerpelea
b8db0014db arhc: avr: nxstyle fixes
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:05 -05:00
Alin Jerpelea
3e76370919 arch: avr: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:05 -05:00
Alin Jerpelea
28f593d7cf arch: hc: nxstyle fixes
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:05 -05:00
Alin Jerpelea
3bd4fe62e7 arch: hc: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 21:12:05 -05:00
raiden00pl
c1c4ca4ffd stm32/stm32_foc.c: add the lower-half FOC device support 2021-03-31 18:23:53 -03:00
Alin Jerpelea
106a471ef1 arch: z80: nxstyle fixes
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 09:17:54 -07:00
Alin Jerpelea
4802b096c5 arch: z80: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 09:17:54 -07:00
Alin Jerpelea
67bd7824e4 arch: z16: nxstyle fixes
nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 09:17:54 -07:00
Alin Jerpelea
7f19d910ef arch: z16: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 09:17:54 -07:00
Alin Jerpelea
7e2ee8b9bb arch: or1k: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:51 -07:00
Alin Jerpelea
fd512dcc4b arch: or1k: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:51 -07:00
Alin Jerpelea
5d633d7e0b arch: risc-V: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:51 -07:00
Alin Jerpelea
fe0ee48c69 arch: renesas: nxstyle fixes
Nxstyle fixes to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-31 08:48:51 -07:00