Commit Graph

1472 Commits

Author SHA1 Message Date
liaoao
c31e869fac cpuinfo: show cpufreq when hardware perfermance counting enabled
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-08-19 01:40:10 +08:00
Lucas Saavedra Vaz
e02b203311 arch/xtensa/esp32s3: Update MCUboot build process
Change the MCUboot build process to, in the future, deprecate the esp-nuttx-bootloaders repository.
2023-08-18 14:44:11 +08:00
Lucas Saavedra Vaz
4bcc930535 arch/xtensa/esp32s2: Update MCUboot build process
Change the MCUboot build process to, in the future, deprecate the esp-nuttx-bootloaders repository.
2023-08-18 14:44:11 +08:00
Lucas Saavedra Vaz
60fdc9cb72 arch/xtensa/esp32: Update MCUboot build process
Change the MCUboot build process to, in the future, deprecate the esp-nuttx-bootloaders repository.
2023-08-18 14:44:11 +08:00
Tiago Medicci Serrano
5adb9de00b espressif: Update esp-hal-3rdparty version
The newest version of the esp-hal-3rdparty includes general
bugfixes and includes components necessary to build the IDFboot.
2023-08-15 13:39:22 -03:00
yinshengkai
88f3bc77f1 toolchain: detect use of large stack variables
partition/fs_gpt.c:384:5: warning: stack usage might be 288 bytes [-Wstack-usage=]
  384 | int parse_gpt_partition(FAR struct partition_state_s *state,

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-08-15 14:50:27 +03:00
Tiago Medicci Serrano
281ab83309 esp32s3: Use PANIC() instead of assert(0)
Considering kernel code, it's reasonable to use `PANIC()` instead
of `assert(0)` to handle with situations that require abort. Unlike
`assert`, `PANIC()` doesn't dependent on `NDEBUG`.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
01b6c87b15 esp32s3: Implement the Wi-Fi/BLE coexistence
ESP32-S3 has only one 2.4 GHz ISM band RF module, which is shared
by Bluetooth and Wi-Fi, so Bluetooth can’t receive or transmit data
while Wi-Fi is receiving or transmitting data and vice versa.
Under such circumstances, ESP32-S3 uses the time-division
multiplexing method to receive and transmit packets.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
7d605551cd esp32s3/wifi: Enable peripheral interrupt to the same CPU interrupt
The low-level Wi-Fi driver registers two peripheral interrupts to
the same CPU interrupt. Although the registered ISR is the same for
both peripherals interrupt, it's needed to call `up_enable_irq` to
ensure that the interrupt matrix is being set accordingly.

Please note that the current implementation of the  ESP32-S3's IRQ
driver - although allow us to set a callback for each IRQ, which
represents the peripherals interrupt - doesn't allow us to call
both callbacks when these IRQs refers to a same CPU interrupt.
`g_cpu0_intmap` (or `g_cpu1_intmap`) associates each CPU interrupt
to a single IRQ/peripheral and, then, when a CPU interrupt is
triggered, only the last registered IRQ's callback will be called.
This isn't a problem here because 1) the registered callback is the
same for both IRQ's (in fact, it considers the CPU interrupt) and
2) we know in advance which peripheral interrupts will be attached
to which CPU interrupt and, then, we can set them directly.
2023-08-14 16:29:21 -03:00
Petro Karashchenko
655d00b1e7 arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
33f03fc98c esp32s3/wlan: Always run wlan_rxpoll work queue
Even if we were unable to get a free IOB, trigger the work queue
to make sure that no old packet is waiting to be handled by the
network upper layers.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
012dddf7c9 esp32s3/wlan: check for all connections on wlan_txpoll
This prevents us from getting stuck while polling the different
network structures in `devif_poll_connections`. This is useful for
Wi-Fi/Bluetooth coexistence, specifically.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
6589887284 esp32s3/wlan: check if the network device's IOB isn't null
Before adding the upper layer network device's IOB to the TX queue
of the wireless driver, check if it isn't null.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
ec4149c61d esp32s3/hardware: Update regi2c_ctrl.h functions name 2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
6089f58f00 esp32s3/irq: Enhance IRQ subsystem
- Fix macro values from `arch/xtensa/include/esp32s3/irq.h`
- Remove references to unexisting edge-triggered CPU interrupts
- Add `esp32s3_getirq` to get IRQ based on core and the `cpuint`
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
31476bcb34 esp32s3/rtc: Initialize RTC subsystem
RTC subsystem controls not only the RTC itself but functions that
use RTC-enabled features like Bluetooth and Wi-Fi. Initialization
must be performed during the system start-up.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
7dafbb05a1 esp32s3/peripherals: Add initialization routine for the peripherals
It provides an initialization function that performs the
peripherals' initialization routine during the chip startup.
2023-08-14 16:29:21 -03:00
wangming9
c928acc9ff perf: The new configuration supports hardware performance counting
Adding the CONFIG_ARCH_PERF_EVENTS configuration to enable
hardware performance counting,solve the problem that some platform
hardware counting support is not perfect, you can choose to use
software interface.

This is configured using CONFIG_ARCH_PERF_EVENTS, so weak_functions
are removed to prevent confusion

To use hardware performance counting, must:
1. Configure CONFIG_ARCH_PERF_EVENTS, default selection
2. Call up_perf_init for initialization

Signed-off-by: wangming9 <wangming9@xiaomi.com>
2023-08-12 02:20:44 +08:00
Petro Karashchenko
2c346c4c89 arch/esp32: use kernel internal API for libc stubs
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-08-08 11:58:29 -03:00
ligd
452211586e xtensa: fix compile miss file
comiple xtensa_mpu.c

Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-08-05 12:40:16 -07:00
ligd
af3600436e perf: avoid div zero if up_perf_init() hasn't init
Signed-off-by: ligd <liguiding1@xiaomi.com>
2023-08-03 10:42:00 -07:00
yanghuatao
51240c658f fix warning: [-Wunknown-pragmas]
/mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/hidl/HidlSupport.h:33: warning: ignoring #pragma clang diagnostic [-Wunknown-pragmas]
   33 | #pragma clang diagnostic push
      |
/mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/hidl/HidlSupport.h:34: warning: ignoring #pragma clang diagnostic [-Wunknown-pragmas]
   34 | #pragma clang diagnostic ignored "-Wpadded"
      |
In file included from /mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/android/hidl/base/1.0/types.h:4,
                 from /mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/android/hidl/base/1.0/IBase.h:4,
                 from android/hidl/base/1.0/BaseAll.cpp:1:
/mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/hidl/HidlSupport.h:40: warning: ignoring #pragma clang diagnostic [-Wunknown-pragmas]
   40 | #pragma clang diagnostic pop
      |
In file included from /mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/android/hidl/base/1.0/IBase.h:4,
                 from android/hidl/base/1.0/BaseAll.cpp:1:
/mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/android/hidl/base/1.0/types.h:188: warning: ignoring #pragma clang diagnostic [-Wunknown-pragmas]
  188 | #pragma clang diagnostic push
      |
/mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/android/hidl/base/1.0/types.h:189: warning: ignoring #pragma clang diagnostic [-Wunknown-pragmas]
  189 | #pragma clang diagnostic ignored "-Wc++17-extensions"
      |
/mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/android/hidl/base/1.0/types.h:195: warning: ignoring #pragma clang diagnostic [-Wunknown-pragmas]
  195 | #pragma clang diagnostic pop
      |
CXX:  LightRefBase.cpp In file included from base/HidlSupport.cpp:18:
/mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/hidl/HidlSupport.h:33: warning: ignoring #pragma clang diagnostic [-Wunknown-pragmas]
   33 | #pragma clang diagnostic push
      |
/mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/hidl/HidlSupport.h:34: warning: ignoring #pragma clang diagnostic [-Wunknown-pragmas]
   34 | #pragma clang diagnostic ignored "-Wpadded"
      |
In file included from base/HidlSupport.cpp:18:
/mnt/yang/vela_keystore_waring/apps/external/android/system/libhidl/base/include/hidl/HidlSupport.h:40: warning: ignoring #pragma clang diagnostic [-Wunknown-pragmas]
   40 | #pragma clang diagnostic pop

Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2023-08-03 00:52:53 -07:00
Tiago Medicci Serrano
17447622bf esp32s3/wifi: support the Wi-Fi to work with protected build
- Added Wi-Fi related symbols to the kernel-space linker;
- Allocate more RAM to the kernel (to be useb by the Wi-Fi driver).
- Create a specific defconfig.
2023-08-02 21:38:44 +02:00
Tiago Medicci Serrano
1197a80741 esp32s3: Enhance protected build linker scripts and memory layout
Instead of setting kernel/user space instruction and data ROM as
hard-coded values on linker, set them according to the max size
of the kernel image set by CONFIG_ESP32S3_KERNEL_IMAGE_SIZE. This
is done by making KIROM, UIROM, KDROM and UDROM dependent on the
kernel size value. Also, override CONFIG_NUTTX_USERSPACE config
according to CONFIG_ESP32S3_KERNEL_IMAGE_SIZE by using a custom
PREBUILD definition.
2023-08-02 21:38:44 +02:00
Alan Carvalho de Assis
bace5e9b59 Fix some ESP32 Peripheral help comments 2023-08-02 05:40:42 -07:00
zhangyuan21
8f39ba6ae4 arch: update g_running_tasks when context switch occurred
When supporting high-priority interrupts, updating the
g_running_tasks within a high-priority interrupt may be
cause problems. The g_running_tasks should only be updated
when it is determined that a task context switch has occurred.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-08-01 09:35:18 -07:00
Tiago Medicci Serrano
8673e659b4 espressif: quiet git commands and improve build logging
Add `--quiet` to git commands to avoid unnecessary logging during
the operation and add summarized logs to show progress.
2023-07-27 19:43:48 -07:00
Tiago Medicci Serrano
8e343405a2 espressif: update esp-hal-3rdparty
The esp-hal-3rdparty release include general bugfixes.
2023-07-27 19:43:48 -07:00
hujun5
68187b68af arch: move [enter|leave]_critical_section
move [enter|leave]_critical_section to the same place for easy to understand
and call matching

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-07-27 11:34:09 +02:00
Xiang Xiao
46b25b3849 arch: Compute the array size by nitems
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Xiang Xiao
f3269a6caa sched: Rename DEBUG_TCBINFO to ARCH_HAVE_TCBINFO
and select if the arch support to define g_tcbinfo variable

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-26 09:33:38 +02:00
Tiago Medicci Serrano
dacb4e87b6 espressif: get esp-hal-3rdparty sources based on its version
Clone the esp-hal-3rdparty repository and, then, checkout to a
specific version (usually indicated by the commit SHA) instead of
using a branch as the HEAD.
2023-07-25 09:44:59 -07:00
zhangyuan21
9792211b96 sched/tcbinfo: add stack info to tcbinfo
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-07-24 09:47:12 -07:00
Victor Benso
0c5145b7d1 New implementation of the ESP32's RMT driver. 2023-07-23 16:17:57 -03:00
chao an
4b94dc3092 toolchain/gcc: fix linker error if enable STACK_CANARIES/LTO at same time
If -fstack-protector-all is enabled, gcc linker will need GCC
SSP(Stack Smashing Protector) support, Since the implement of SSP
is related to the OS, most of embedded toolchain does not provide
ssp support, so an error will be reported when linking:

enable CONFIG_LTO_FULL && CONFIG_STACK_CANARIES

arm-none-eabi/bin/ld: cannot find -lssp_nonshared: No such file or directory
arm-none-eabi/bin/ld: cannot find -lssp: No such file or directory

https://github.com/gcc-mirror/gcc/blob/master/gcc/gcc.cc#L983-L985

Since nuttx has already implemented SSP related hook functions,
so in this PR, we filter out this option in the link phase to ensure that
the implementation of lssp/lssp_nonshared will not be referenced

Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-21 01:13:34 +08:00
Xiang Xiao
abfe082a6f Kconfig: Simplify the conditional default statement
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-07-16 14:39:20 -03:00
simbit18
b0965ab963 Fix nuttx coding style
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.
2023-07-14 01:16:06 +08:00
simbit18
1b1ac6f3b7 Fix nuttx coding style
Remove TABs
Fix indentation
Fix Multi-line comments
Fix Comments to the Right of Statements.

Fix nuttx coding style

Fix Comments to the Right of Statements.
2023-07-13 19:30:56 +08:00
chenrun1
4d285cb14d xtensa_saveusercontext:Leave the context information empty
In the current implementation of other architectures, it is not really implemented to preserve the context, so it is emulated from other architectures to clear the context.
If this behavior is not implemented, it will cause the xtensa architecture processor to loop assert in the active assert case

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-07-13 09:48:46 +08:00
rongyichang
5d7864fbcb drivers/spi: add support for qspi hwfeatures
add QSPI_BITORDER and QSPI_WORD_REVERSE hwfeatures

Signed-off-by: rongyichang <rongyichang@xiaomi.com>
2023-07-12 01:42:25 +08:00
Alan Carvalho de Assis
1d88d5a370 ESP32S2: Add support to SPI Flash 2023-07-10 17:56:46 +08:00
Roy Feng
8f66b033db change free to kmm_free as it was allocated via kmm_alloc 2023-07-05 16:40:23 +08:00
Alan Carvalho de Assis
245db6742c esp32s2: Fix UART1 default pins
The default pins to UART1 should be 17 (TXD) and 18 (RXD).
2023-07-01 13:11:39 +08:00
Xiang Xiao
0eeca0f375 build: Replace "$(shell $(INCDIR) $(CC) ...)" with $(INCDIR_PREFIX)
to unify the way to get include directories

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-23 00:11:25 +03:00
simbit18
f0a74eb492 Fix Kconfig style
Remove spaces from Kconfig files
2023-06-22 11:46:09 +09:00
simbit18
f930b4f6f5 Fix Kconfig style
Remove TABs from Kconfig files
Replace help => ---help---
Add comments
2023-06-20 12:54:50 -03:00
simbit18
3f4151525d Fix Kconfig style
Remove TABs from Kconfig files
Add comments
2023-06-19 20:05:57 +03:00
Dong Heng
8f25329260 xtensa/esp32s3: SPI support quad I/O mode 2023-06-16 16:07:05 -03:00
Tiago Medicci Serrano
368b6cb489 esp32s3/wifi: update Wi-Fi driver to the newest esp-hal-3rdparty 2023-06-16 11:14:36 +08:00
Dong Heng
d492823128 xtensa/esp32s3: Add USB OTG device driver 2023-06-14 18:04:27 -03:00
Lucas Saavedra Vaz
4bcf454ae5 arch/xtensa/esp32s2: Fix SPI DMA implementation 2023-06-15 03:29:30 +08:00
Dong Heng
b24f931aca xtensa/esp32s3: Support 32MB SPI flash 2023-06-12 21:05:33 +08:00
Xiang Xiao
da5e978341 mm: Correct the callsite of mm_mallinfo
forget to update in https://github.com/apache/nuttx/pull/9488

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-11 19:37:04 +03:00
Xiang Xiao
d920bfba10 mm: include malloc.h in mm/mm.h
to remove the forward declaration of mallinfo and mallinfo_task

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-06-11 19:37:04 +03:00
Petro Karashchenko
2a38c38b03 style: fix style issues found during code review
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-06-11 12:54:52 +08:00
anjiahao
7732791cd6 mempool:Add mail_info support for multiple pools
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-06-08 23:56:40 +08:00
chenwen@espressif.com
617927f27c xtensa/esp32: Support multiple PHY init data bin
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-06-07 16:44:26 +08:00
Tiago Medicci Serrano
118a127771 esp32_start: use up_putc instead up_puts in showprogress define
During initialization it isn't possible to use up_puts once it's
protected against concurrent access through a mutex lock. Instead,
using up_putc makes it similar to ESP32S2 and ESP32S3 and perfectly
fits for showprogress usage.
2023-06-02 10:17:54 +08:00
Roy Feng
bcd776b2a7 Fix build issues for ESP32 SoftAP mode 2023-05-27 23:54:55 +09:00
Dong Heng
97d2d6376d xtensa/esp32s3: SPI slave driver 2023-05-27 14:11:36 +08:00
liaoao
6424b5322f procfs:add xtensa cpuinfo
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-05-27 03:29:41 +08:00
Lucas Saavedra Vaz
5f1dca63ae arch/xtensa/esp32: Add missing SPI Flash ROM functions
Add missing ROM functions and clear source files
2023-05-27 03:16:20 +08:00
Dong Heng
4a279b4b9b xtensa/esp32s3: Support 32MB PSRAM 2023-05-25 13:46:11 +08:00
Tiago Medicci Serrano
63364a52ff esp32s3/spiflash: pause other CPU before SPI flash operations
Whenever a SPI flash operation is going to take place, it's
necessary to disable both the instruction and data cache. In order
to avoid the other CPU (if SMP is enabled) to retrieve data from
the SPI flash, it needs to be paused until the current SPI flash
operation finishes. All the code that "pauses" the other CPU (in
fact, the CPU spins until `up_cpu_resume` is called) needs to run
from the instruction RAM.
2023-05-24 00:37:46 +08:00
hujun5
35b597ec2c arch/all: in smp pthread_cancel occasionally deadlock except for arm64
please reference the issue here for more information:
https://github.com/apache/nuttx/pull/9065

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-23 15:48:35 +09:00
Xiang Xiao
7990f90915 Indent the define statement by two spaces
follow the code style convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-21 09:52:08 -03:00
zhangyuan21
077c16fc71 arch/xtensa: only cmp fpu coprocessor for fpu test
Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-18 17:30:38 +08:00
Xiang Xiao
7dc0d70092 arch: Save sigdeliver into xcp in the case of signal self delevery
to avoid the infinite recusive dispatch:
*0  myhandler (signo=27, info=0xf3e38b9c, context=0x0) at ltp/testcases/open_posix_testsuite/conformance/interfaces/sigqueue/7-1.c:39
*1  0x58f1c39e in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:167
*2  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*3  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:115
*4  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049334) at signal/sig_dispatch.c:435
*5  0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*6  0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*7  0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*8  0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:115
*9  0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049304) at signal/sig_dispatch.c:435
*10 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*11 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*12 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*13 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:115
*14 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492d4) at signal/sig_dispatch.c:435
*15 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*16 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*17 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*18 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:115
*19 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf40492a4) at signal/sig_dispatch.c:435
*20 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*21 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*22 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*23 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:115
*24 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049274) at signal/sig_dispatch.c:435
*25 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*26 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199
*27 0x58fa0664 in up_schedule_sigaction (tcb=0xf4e20f40, sigdeliver=0x58f1bab5 <nxsig_deliver>) at sim/sim_schedulesigaction.c:88
*28 0x58f19907 in nxsig_queue_action (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:115
*29 0x58f1b089 in nxsig_tcbdispatch (stcb=0xf4e20f40, info=0xf4049244) at signal/sig_dispatch.c:435
*30 0x58f31853 in nxsig_unmask_pendingsignal () at signal/sig_unmaskpendingsignal.c:104
*31 0x58f1ca09 in nxsig_deliver (stcb=0xf4e20f40) at signal/sig_deliver.c:199

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-17 11:53:18 -06:00
Tiago Medicci Serrano
496a77653a arch/xtensa/esp32_esp32s3: prevent arch's libc in the userspace
ESP32 and ESP32-S3 should use the ROM-defined versions of the libc
in flat build and, when building the protected mode, in the kernel.

The ROM-defined version of the libc functions can't be used in the
userspace, however, because it isn't allowed to access the memory
region in flash directly from the userspace. That being said,
`LIBC_PREVENT_STRING_KERNEL` should be selected to avoid building
any implementation of the libc, being the ROM-defined versions
linked instead.

NuttX's software implemented version of the libc will be built in
the userspace. Also, the assembly-defined version of some of the
libc functions (`XTENSA_xxx`) may also be selected to be used in
the userspace.
2023-05-17 13:58:48 +08:00
Alan Carvalho de Assis
694e6f550b esp32xx: Workaround to avoid printing serial trash character
During the serial reconfiguration from bootloader to the
NuttX a trash character "?" (Unicode replacement U+FFFD)
was printed in the screen.

This fix was discovered by Sylvio Alves from Espressif!
2023-05-12 06:30:35 +03:00
Tiago Medicci Serrano
3e07477c85 esp32/wifi: use wapis init config to save Wi-Fi data
Instead of using Espressif's emulated NVS to save Wi-Fi data, use
`wapi`s wireless configure initialization mechanism for saving
Wi-Fi data. It 1) avoids creating a specific storage partition
just to save Wi-Fi data (ESP32's storage partition is used
instead); 2) avoids initialization problems of the emulated NVS
when SMP is enabled (the Wi-Fi driver tries to initialize it before
the actual partition is initialized); and 3) enables reconnecting
using `wapi reconnect` command and connect the device automatically
on bringup if `CONFIG_NETUTILS_NETINIT` is selected.
2023-05-12 01:09:09 +08:00
Tiago Medicci Serrano
b680abd04b esp32s3/wifi: use wapis init config to save Wi-Fi data
Instead of using Espressif's emulated NVS to save Wi-Fi data, use
`wapi`s wireless configure initialization mechanism for saving
Wi-Fi data. It 1) avoids creating a specific storage partition
just to save Wi-Fi data (ESP32-S3's storage partition is used
instead); 2) avoids initialization problems of the emulated NVS
when SMP is enabled (the Wi-Fi driver tries to initialize it before
the actual partition is initialized); and 3) enables reconnecting
using `wapi reconnect` command and connect the device automatically
on bringup if `CONFIG_NETUTILS_NETINIT` is selected.
2023-05-12 01:09:09 +08:00
Lucas Saavedra Vaz
a895cd4854 arch/xtensa/esp32s2: Define syscall table to enable using ROM functions
This commit aims to enable the use of ROM functions on ESP32-S2.
This is done by creating the required syscall stubs table and adding the missing symbols to the linker script.
2023-05-10 15:39:44 -03:00
Lucas Saavedra Vaz
274a79fd34 arch/xtensa/esp32: Define syscall table to enable using ROM functions
This commit aims to enable the use of ROM functions on ESP32.
This is done by creating the required syscall stubs table and adding the missing symbols to the linker script.
2023-05-10 15:39:44 -03:00
simbit18
f5514a1113 arch/xtensa/src/esp32/Kconfig: Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
2023-05-10 22:51:11 +08:00
Dong Heng
9ae2fa2b54 xtensa/esp32s3: Fix code style of esp32s3_psram_octal.c 2023-05-10 10:55:20 -03:00
Dong Heng
3161005c40 xtensa/esp32: Fix himem driver crash in SMP mode 2023-05-10 17:56:38 +08:00
simbit18
0fd32d8149 arch/xtensa/src/esp32s3/Kconfig: Fix indentation and help attribute
Replace help => ---help---
Remove spaces from Kconfig
Add TABs
2023-05-08 12:42:54 -03:00
simbit18
999ac5d5bb arch/xtensa/src/esp32/kconfig: Fix indentation
Remove spaces from Kconfig
Add TABs
2023-05-08 12:42:54 -03:00
Xiang Xiao
325f395300 Replace all strncpy with strlcpy
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-05-08 09:57:01 +02:00
hujun5
0f243bde33 arch: fix the issue of asynchronous signal processing
in SMP, signal processing cannot be nested, we use xcp.sigdeliver to identify whether there is currently a signal being processed, but this state does not match the actual situation
One possible scenario is that signal processing has already been completed, but an interrupt occurs, resulting in xcp.sigdeliver not being correctly set to NULL,
At this point, a new signal arrives, which can only be placed in the queue and cannot be processed immediately
Our solution is that signal processing and signal complete status are set in the same critical section, which can ensure status synchronization

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-05-08 09:11:14 +02:00
Alan Carvalho de Assis
276d1c8f48 esp32s3: Add support to RTC 2023-05-06 11:43:01 +08:00
Dong Heng
bd122915f0 xtensa/esp32s3: Support octal lines mode SPIRAM 2023-05-05 18:38:12 +08:00
zhangyuan21
841b178782 assert: show stacks with the sp from regs
1. Get the value of sp from dump regs when an exception occurs,
   to avoid getting the value of fp from up_getsp and causing
   incomplete stack printing.
2. Determine which stack the value belongs to based on the value
   of SP to avoid false reports of stack overflow

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-05 13:40:04 +08:00
Lucas Saavedra Vaz
58f59fe9dc arch/xtensa/esp32s2: Fix SPIRAM compilation warnings
This commit aims to fix compilation warnings that happens when enabling SPIRAM for ESP32-S2
2023-05-04 18:41:54 -03:00
Lucas Saavedra Vaz
a5a3b919a0 audio: Add i2s_getmclkfrequency function
Rename i2s_mclkfrequency to i2s_setmclkfrequency and add i2s_getmclkfrequency for getting the current MCLK frequency from the I2S interface
2023-05-04 18:41:54 -03:00
Tiago Medicci Serrano
28361a295d esp32/wifi: add support to WPA3 on Station Mode
Add support to select WPA3-SAE while connecting to an AP. Please
note that STA mode sets a security threshold, i.e, it was able to
connect to a WPA3-SAE network prior to this change because it
connects to an equally or more secure network than the set
threshold. Considering this patch, the device is now able to
ignore WPA2-PSK APs when WPA3 is set.
2023-05-03 23:23:31 +08:00
Tiago Medicci Serrano
9ede7d4650 esp32s3/wifi: add support to WPA3 on Station Mode
Add support to select WPA3-SAE while connecting to an AP. Please
note that STA mode sets a security threshold, i.e, it was able to
connect to a WPA3-SAE network prior to this change because it
connects to an equally or more secure network than the set
threshold. Considering this patch, the device is now able to
ignore WPA2-PSK APs when WPA3 is set.
2023-05-03 23:23:31 +08:00
zhangyuan21
884be2bdb9 assert: Distinguish between assert and exception
CURRENT_REGS may change during assert handling, so pass
in the 'regs' parameter at the entry point of _assert.

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
2023-05-03 14:49:32 +08:00
simbit18
79574c18d8 arch: Fix nxstyle errors
error: Long line found
2023-05-02 18:31:40 -06:00
Robert-Ionut Alexa
f2530c53a5 esp32: port support for I2C_M_NOSTART and I2C_M_NOSTOP
Signed-off-by: Robert-Ionut Alexa <robertalexa2000@gmail.com>
2023-04-25 20:35:55 +08:00
Ville Juven
20623d7369 sem/sem_init: Change sem_xxx -> nxsem_xxx in kernel modules
Use the kernel space api nxsem_xxx when inside the kernel.
2023-04-25 13:41:51 +02:00
Petro Karashchenko
3e3670af77 arch/xtensa/esp32: fix wrong enabled BLE interrupts
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-04-24 09:35:58 -07:00
Petro Karashchenko
0c28094059 arch/xtensa/esp32: fix crash in BLE startup
ROM symbols provided by linker are placeholders for addresses
and not a pure addresses, so we need to read data pointed by
ROM symbols instead of using those as pure addresses.

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-04-24 09:35:58 -07:00
chao an
b8780fe906 arch/arm: relax compiler check for workaround with "GCC 12.2"
1. relax compiler check for workaround with "GCC 12.2"
2. export GCCVER to environment

Signed-off-by: chao an <anchao@xiaomi.com>
2023-04-24 19:00:52 +03:00
Xiang Xiao
51dc67ad5f fs: Add g_ prefix for all global file_operations instances
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-04-24 16:13:29 +02:00
YAMAMOTO Takashi
0066bf80d2 esp32: enable LIBC_ARCH_ATOMIC
fixes a build issue in https://github.com/apache/nuttx-apps/pull/1723
2023-04-24 10:12:57 +08:00
Lucas Saavedra Vaz
bdfe31e850 boards/xtensa/esp32: Add ESP32-PICO-KIT support 2023-04-22 01:23:13 +08:00
Dong Heng
45bba6e761 xtensa/esp32: ESP32 not use IMEM in user heap mode 2023-04-18 11:03:55 -03:00
Tiago Medicci Serrano
869aee6a78 xtensa/sigdeliver: fix signal deliver when task is running
The Inter-Processor Interrupt that pauses the other CPU generates
a level-1 interrupt which sets the PS.EXCM. This level-1 interrupt
is treated as an Exception and the bit PS.EXCM bit is automatically
reset on return from Exception. However, this is not the case here
because we are changing the execution to the signal trampoline.
Restoring the PS register with the PS.EXCM bit set would cause any
other exception to deviate execution to the DEC (double exception
vector), avoiding it to be treated correctly. According to the
xtensa ISA: "The process of taking an interrupt does not clear
the interrupt request. The process does set PS.EXCM to 1, which
disables level-1 interrupts in the interrupt handler. Typically,
the PS.EXCM is reset to 0 by the handler, after it has set up the
stack frame and masked the interrupt." Clean the saved PS.EXCM to
1) avoid an exception from being properly treated and 2) avoid
interrupts to be masked while delivering the signal.
2023-04-15 08:19:30 +09:00