Gregory Nutt
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ea7b673174
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Merged in david_s5/nuttx/upstream_sdio_1bit_dma (pull request #188)
Allow dma in 1 bit mode in STM32F4xxx
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2016-12-24 20:21:03 -06:00 |
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Gregory Nutt
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12148f0e33
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Merged in paulpatience/nuttx/stm32 (pull request #180)
STM32: Forgot to update chip.h for STM32F303x[BC]'s 4 ADCs
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2016-12-24 20:20:39 -06:00 |
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Gregory Nutt
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efb86382c3
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SMP: Back out deferred IRQ locking. This was accidentally merged into master and it looks like it is going to be more work than I thought to get it working again. Changes will go to the irqlock branch.
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2016-12-24 19:53:37 -06:00 |
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Gregory Nutt
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3af6b2a9a6
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Update a comment
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2016-12-24 19:01:07 -06:00 |
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Gregory Nutt
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f55bad863b
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SMP: Fix logic error in last change: Deferred restoration of IRQ lock only applies if the context switch was on this CPU.
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2016-12-24 18:52:58 -06:00 |
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Gregory Nutt
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9e8b1f32d2
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sched note: record ID enumeration now results on constant values; ID values do not change with configuration. This makes writing post-processing software much easier
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2016-12-24 15:44:21 -06:00 |
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Gregory Nutt
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36b676eea6
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SMP sched_unlock: Should merging depend on g_cpu_irqlock or not? Let's at least be consistent. And don't use irqcount; use g_cpu_irqlock.
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2016-12-24 13:45:11 -06:00 |
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Gregory Nutt
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c5bb717976
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Update README
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2016-12-24 10:25:54 -06:00 |
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Gregory Nutt
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4f4242ef27
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Xtensa ESP32: Update some stack sizes
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2016-12-24 08:55:24 -06:00 |
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Gregory Nutt
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1b790a61cd
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Xtensa ESP32: Add stack checking logic.
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2016-12-23 15:51:33 -06:00 |
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Gregory Nutt
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b262c6be91
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Merge remote-tracking branch 'origin/master' into irqlock
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2016-12-23 13:09:11 -06:00 |
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Gregory Nutt
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f3d755c16f
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Some trivial, cosmetic changes for irqlock branch
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2016-12-23 13:04:33 -06:00 |
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Gregory Nutt
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d75a7643d0
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Fix a trivial typo
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2016-12-23 13:01:20 -06:00 |
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Gregory Nutt
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c7f5435637
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Implement deferred IRQ locking. The rest of the support for Xtensa. Untested.
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2016-12-23 11:56:45 -06:00 |
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Frank Benkert
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29cf2eb342
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AMV7: CAN: Make delete_filter functions more robust
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2016-12-23 11:45:21 -06:00 |
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Gregory Nutt
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cb1cc66d81
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Implement deferred IRQ locking. Adds partial support for Xtensa. More is needed.
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2016-12-23 11:39:44 -06:00 |
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Gregory Nutt
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9f7ba21f8a
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Implement deferred IRQ locking. Adds support for simulator.
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2016-12-23 11:28:43 -06:00 |
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Gregory Nutt
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729ee7c099
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ARMv7-A: Small improvement to some register handling in context restoration.
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2016-12-23 11:13:18 -06:00 |
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Gregory Nutt
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d9ef0e86fb
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Fix a couple of errors in the last commit
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2016-12-23 10:45:13 -06:00 |
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Gregory Nutt
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c00a1870d7
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Implement deferred IRQ locking. Adds support for ARMv7-A.
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2016-12-23 10:17:36 -06:00 |
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Gregory Nutt
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e6fff09ef8
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Implement deferred IRQ locking. So far only form ARMv7-M.
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2016-12-23 07:55:41 -06:00 |
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David Sidrane
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76ceb37553
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Allow dma in 1 bit mode in STM32F4xxx
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2016-12-22 09:19:37 -10:00 |
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Gregory Nutt
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5f9caad078
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Xtensa ESP32: Correct copyright info; update some comments
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2016-12-22 12:34:55 -06:00 |
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Gregory Nutt
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714e6f80ca
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Xtensa ESP32: Corrects a problem with dispatching to signal handlers: Cannot vector directly to the signal handling function as in other ABIs under the Xtensa Window ABI. In that case, we need to go through a tiny hook when performs the correct window call (call4) otherwise registers will be scrambled in the signal handler
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2016-12-22 11:19:38 -06:00 |
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Gregory Nutt
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d9a64b9ca9
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Xtensa ESP32: Some fixes from integration of ostest configuration. Almost works: There are some assertions in xtensa_sigdeliver()
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2016-12-22 09:34:39 -06:00 |
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Gregory Nutt
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2b5235e937
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Xtensa ESP32: Add an OS test to verify the port.
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2016-12-22 08:20:05 -06:00 |
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Gregory Nutt
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fb146abee0
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All CMP platforms: Apply same fix verified on other platforms found on Xtensa.
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2016-12-21 14:04:09 -06:00 |
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Gregory Nutt
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733a57b4df
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Xtensa SMP: Avoid a nasty situation in SMP by assuring that up_release_pending() is not re-entered.
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2016-12-21 13:34:01 -06:00 |
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Gregory Nutt
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c1e2606526
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Olimex STM32 P407: Has only 128KiB of contiguous RAM. Exclude CCM memory for now.
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2016-12-21 12:49:03 -06:00 |
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Gregory Nutt
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81c1466d93
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Olimex STM32 P407: Hmmm.. board does not boot. Simplifying the configuration does not help.
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2016-12-21 11:38:45 -06:00 |
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Gregory Nutt
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7e075bab36
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Merge in support for the Olimex STM32 P407 board
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2016-12-21 10:47:50 -06:00 |
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Gregory Nutt
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f8f2c00415
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Olimex STM32 P407: Update clocking using STM3250G; Verify GPIOs.
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2016-12-21 10:45:36 -06:00 |
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Gregory Nutt
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588d2b506f
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Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem.
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2016-12-21 08:04:48 -06:00 |
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Gregory Nutt
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1b7162a0db
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Eliminate a warning
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2016-12-21 08:04:48 -06:00 |
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Gregory Nutt
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41eda13c9f
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Olimex STM32-P407: Add an stm32_bringup.c file like most newer configurations.
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2016-12-20 18:05:28 -06:00 |
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Gregory Nutt
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764b9f46cc
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Olimex STM32-P407: Initial clone from Olimex STM32-P207
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2016-12-20 17:49:46 -06:00 |
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Geoffrey
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89c33e9799
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Xtensa ESP32: Clock frequency is different if running from IRAM or is booting from FLASH. This is a booltloader issue.
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2016-12-20 16:14:38 -06:00 |
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Gregory Nutt
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59c5ae3eae
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Refresh some configurations
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2016-12-20 15:42:31 -06:00 |
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Gregory Nutt
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57d8a437ef
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Fix procfs status for SMP case.
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2016-12-20 11:51:39 -06:00 |
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Gregory Nutt
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81697f2285
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Xtensa ESP32: Fix APP CPU startup... Can't use semaphores on the IDLE thread.
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2016-12-20 11:26:37 -06:00 |
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Gregory Nutt
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6d5a718b98
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Xtensa ESP32: A few fixes for APP CPU start-up
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2016-12-20 10:38:27 -06:00 |
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Gregory Nutt
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404925d93e
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Update README
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2016-12-20 10:03:48 -06:00 |
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Gregory Nutt
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4e9a0ffea5
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Xtensa ESP32: Update APP CPU startup logic to match current Expressif example code.
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2016-12-20 09:00:04 -06:00 |
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Gregory Nutt
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3b681586c0
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Xtensa ESP32: Missing prologue/epilogue macros on C callable function
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2016-12-20 08:31:36 -06:00 |
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Gregory Nutt
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5666bf30a7
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Review of last PR
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2016-12-20 07:08:46 -06:00 |
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Gregory Nutt
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1ed25c0d73
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Merged in young-mu/nuttx (pull request #187)
Support PWM_PULSECOUNT feature for TI tiva
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2016-12-20 07:00:35 -06:00 |
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Young
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07b70fcc20
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Improve the PWM logs
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2016-12-20 17:05:51 +08:00 |
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Young
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9d355e12d5
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Support indefinite number of pulses generation in PULSECOUNT mode
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2016-12-20 14:08:31 +08:00 |
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Young
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e35406f7d6
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Support PWM_PULSECOUNT feature for TI tiva
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2016-12-20 13:20:04 +08:00 |
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Young
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b737f0e156
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Merged nuttx/nuttx into master
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2016-12-20 11:40:23 +08:00 |
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