Commit Graph

3583 Commits

Author SHA1 Message Date
chenwen@espressif.com
b6e09955dd xtensa/esp32s3: Support multiple PHY init data bin
1. If CONFIG_ESP32S3_PHY_INIT_DATA_IN_PARTITION and CONFIG_ESP32S3_SUPPORT_MULTIPLE_PHY_INIT_DATA are enabled,
PHY initialization data (PHY initialization data is used for RF calibration) will be loaded from a partition.

2. The corresponding PHY init data type can be automatically switched according to the country code,
China's PHY init data bin is used by default, country code can be modified through the wapi command: wapi country <ifname> <country code>.

Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-11-10 15:55:14 -03:00
chenwen@espressif.com
cc10c54f6c xtensa/esp32s3: Support partition and OTA device
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-11-10 15:55:14 -03:00
Tiago Medicci Serrano
18718316dc esp32/ble: enable the BLE interrupt during a SPI flash operation
This commit sets the BLE's interrupt as a IRAM-enabled interrupt,
which enables it to run during a SPI flash operation. This enables
us to create a cache to off-load semaphores and message queues
operations and treat them when the SPI flash operation is finished.
By doing that, we avoid packet losses during a SPI flash operation.
2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
b25793ebac esp32/spiflash: Make it similar to ESP32-S3 by removing cache state 2023-11-10 09:11:35 +08:00
Tiago Medicci Serrano
57b8fc9954 esp32/irq: Allow IRAM ISRs to run during SPI flash operation
This commit provides an interface to register ISRs that run from
IRAM and keeps track of the non-IRAM interrupts. It enables, for
instance, to avoid disabling all the interrupts during a SPI flash
operation: IRAM-enabled ISRs are, then, able to run during these
operations.

It also makes the code look more similar to the ESP32-S3 SPI flash
implementation by creating a common `esp32_spiflash_init` that is
responsible to create the SPI flash operation tasks. The function
intended to initialize the SPI flash partions was, then, renamed to
`board_spiflash_init`.
2023-11-10 09:11:35 +08:00
Eren Terzioglu
9997a858e2 xtensa/esp32s2: Add SPI slave support 2023-11-10 00:34:39 +08:00
Janne Rosberg
7f48c185c8 sama5d2-xult: add support for QSPI flash and nxffs
Add support for onboard qspi flash with nxffs fs
Signed-off-by: Janne Rosberg <janne.rosberg@offcode.fi>
2023-11-09 23:59:33 +08:00
Eren Terzioglu
77df430f30 xtensa/esp32s2: Add rtc heap support 2023-11-09 23:58:30 +08:00
Dong Heng
c655870b22 boards/esp32s3: Link stack checking function and data to SRAM when enable flash or PSRAM driver
During PSRAM initialization and flash operations, the Cache needs to be disabled.
So all data and code for the aforementioned scope is required to be placed in Internal RAM.
2023-11-09 13:27:31 +01:00
chenwen@espressif.com
5239d01dba xtensa/esp32s3: Disable psram as task stack
1. Disable psram as task stack to avoid system blocking.
2. Add some function comments.
2023-11-08 16:25:57 -03:00
chenwen@espressif.com
8d94c1b3cb xtensa/esp32s3: Support malloc from external RAM and internal RAM
Enables the allocation of the entire Userspace heap into SPI RAM and reserving the Internal RAM exclusively for the Kernel heap.
2023-11-08 16:25:57 -03:00
simbit18
8fa6a29503 Fix Kconfig style
Remove extra TABs
Remove spaces from Kconfig
Add comments
2023-11-08 22:58:26 +08:00
Tiago Medicci Serrano
59107e5573 esp32s3: Fix issue regarding IRAM-enabled ISRs by fixing the linker
After https://github.com/apache/nuttx/pull/11007/ was merged, the
path for some files changed, requiring the linker to be fixed to
make it run from the internal memory once again.
2023-11-06 18:41:34 -03:00
raiden00pl
ede4b6b0ab boards/b-g431b-esc1: rework board to not use CONFIG_STM32_USE_LEGACY_PINMAP=y 2023-11-03 22:25:46 +08:00
yinshengkai
d0a5489ac5 sched: explicitly select the cpuload clock source configuration
Different configurations require different dependencies.
Explicitly select dependencies to avoid automatically selecting inappropriate configurations.

Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-11-01 09:27:56 +08:00
SPRESENSE
2f1b4a49ce boards: cxd56xx: Register cxd5610 gnss driver
Register device file for cxd5610 gnss driver.
2023-10-31 09:18:18 +01:00
SPRESENSE
0ee2bb51b8 boards: cxd56xx: Add cxd5610 gnss lowerhalf driver
Add cxd5610 gnss lowerhalf driver with i2c interface.
2023-10-31 09:18:18 +01:00
SPRESENSE
f49fa466b6 boards: cxd56xx: Add cxd5610 gnss driver
Add cxd5610 gnss driver as board-specific sensor driver.
2023-10-31 09:18:18 +01:00
Jorge Guzman
66df15b965 boards/stm32: add support to LINUM-STM32H753BI board
The LINUM-STM32H753BI is a board with RS485, RS232, SD Card, CAN,
SD Card, USB, Ethernet, LCD, etc.

Signed-off-by" Jorge Guzman jorge.gzm@gmail.com

ci: correction in nsh defconfig file of LINUM-STM32H753BI
2023-10-30 13:56:40 -03:00
dongjiuzhu1
8ad88a3fc5 qemu/arm64: implement up_textheap_align and support sotest
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-10-30 18:20:22 +08:00
raiden00pl
f9d088590a Documentation: migrate boards/{z16|z80}/xxx/configs/README.txt 2023-10-28 13:55:22 +08:00
SPRESENSE
f3fabc5d32 Revert "make/archive: Use the full path name when matching or storing names in the archive"
This reverts commit 563125fde3.
2023-10-27 22:26:18 +08:00
dongjiuzhu1
4068f11129 binfmt/elf: Select ARCH_USE_TEXT_HEAP if ARCH_HAVE_TEXT_HEAP
Using up_textheap_memalign to allocate memory if arch support textheap
for loading section.

The default system heap does not support execution permissions,
so up_textheap_memalign allocation is required.

this patch can fix issue about #11043

update esp32 elf config:
remove -CONFIG_ARCH_USE_TEXT_HEAP=y becuase ARCH_CHIP_ESP32 select
ARCH_HAVE_TEXT_HEAP

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-10-27 15:42:02 +09:00
Michal Lenc
51bae917b7 ci: add fmemopen test and merge fopencookie and fmemopen to stdio test
CI test for fmemopen() function was added. The test was merged with
fopencookie interface test and merged into single test_stdio.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-10-27 08:55:24 +08:00
raiden00pl
56529d2944 Documentation: migrate the rest boards
- migrated /README are removed from /boards

- there are a lot of READMEs that should be further converted to rst.
  At the moment they are moved to Documentation/platforms and included in rst files
2023-10-26 18:13:34 -03:00
raiden00pl
d77dff786b fix broken CI
rename missing CONFIG_SYSTEM_RAMTEST to CONFIG_TESTING_RAMTEST
2023-10-26 14:51:01 -03:00
xuxin19
e3003f691b cmake:init RISC-V cmake qemu-rv build
cmake currently does not support non-FlatBuild,
need disable ELF and LOADABLE when compiling other defconfigs

```
 cmake -B build -DBOARD_CONFIG=rv-virt/smp64 -GNinja # for rv32:rv-virt/smp
 cmake --build build -t menuconfig
 cmake --build build
 qemu-system-riscv64 -semihosting -M virt,aclint=on -cpu rv64 -smp 8 -bios none -kernel nuttx -nographic
```

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-10-26 21:01:46 +08:00
chenrun1
de17f43481 boards:Modify test "ramtest" path
Based on the PR#2161 change, we need to modify the macro switch in most boards to configure ramtest.

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2023-10-26 13:17:35 +02:00
simbit18
37729540c0 Fix Kconfig style
Remove spaces from Kconfig
Add comments
2023-10-26 01:53:58 +08:00
chao an
3cadf6642a kernel: replace all usleep to nxsig_usleep in kernel space
syscall cannot be called from kernel space

Signed-off-by: chao an <anchao@xiaomi.com>
2023-10-25 15:46:03 +08:00
Tiago Medicci Serrano
0616796185 esp32-devkitc/ble: Enable SMP for BLE defconfig
This defconfig also pins the HCI TX thread to the same core of the
BLE task.
2023-10-24 22:41:44 +08:00
Alan Carvalho de Assis
95800a7f54 boards: Rename shiftgame to brickmatch
This patch will rename the shiftgame to brickmatch and will add
support to initialize brickmatch automatically on esp32-devkitc.
2023-10-24 13:54:32 +08:00
Alan Carvalho de Assis
41a6adf93f esp32: Add support to gesture and APA102 as LCD 2023-10-24 13:54:32 +08:00
Rodrigo Sim
21ba49408c boards/stm32: add support to STM32F401RC-RS485 board
The STM32F401RC-RS485 is a board with RS485 support, SD Card, buttons,
leds, temperature sensor, adc and etc.

Signed-off-by: Rodrigo Sim rcsim10@gmail.com
2023-10-23 14:28:27 +08:00
halyssonJr
48a878fd06 Adding initial support to board esp32-2432S028, is a board with SD Card, RGB LED, output for speak and display LCD
Signed-off-by: halyssonJr <halysson1007@gmail.com>
2023-10-22 00:57:36 +08:00
GD32-MCU
6e94f7432f add gd32f470i board support 2023-10-21 11:45:03 -03:00
chao an
fa943c11b3 cmake: correct cmake rule file name
The rule of cmake file name should be CMakeLists.txt not CMakeList.txt

Signed-off-by: chao an <anchao@xiaomi.com>
2023-10-21 11:00:27 +08:00
Alan Carvalho de Assis
b95fd6a573 esp32: Add wifishare board config and documentation
Signed-off-by: Alan C. Assis <acassis@gmail.com>
2023-10-20 09:46:21 +08:00
Michal Lenc
f43701c7c9 ci: fix file system CI test
File system CI test was not testing the correct behavior of scanf and just
checked whether program did not end with hard fault. This adds
functionality check and required configuration options to run FS test.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-10-19 21:39:24 +08:00
Michal Lenc
7463052c8e ci: fix scanf CI test
Scanf CI test was not testing the correct behavior of scanf and just
checked whether program did not end with hard fault. This adds
functionality check and required configuration options to run scanf
test.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-10-19 21:39:24 +08:00
cuiziwei
c164fc9b21 nuttx:generate nuttx.map file when enable debug link map.
Signed-off-by: cuiziwei <cuiziwei@xiaomi.com>
2023-10-19 19:19:22 +08:00
Xiang Xiao
04f834290c ucans32k146/se05x: Refresh defconfig after https://github.com/apache/nuttx-apps/pull/2131
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-10-19 12:37:42 +08:00
makejian
7d6c529e88 sim/crypto: Use mbedtls default configuration without special check
depends on patch https://github.com/apache/nuttx-apps/pull/2131
Signed-off-by: makejian <makejian@xiaomi.com>
2023-10-18 21:18:42 +08:00
Michal Lenc
6e4ffb9ea1 ci: add fopencookie test
This adds fopencookie test for simulator CI.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
2023-10-18 21:13:01 +08:00
simbit18
b5d640acc5 fix Cygwin/MSYS2 ld: unrecognized option '-z'
The '-z' options don't supported for Windows versions of ld.
2023-10-18 01:23:39 +08:00
Dong Heng
1cb17b8a6a boards/esp32s3-box: Support hardware version 3
config/lvgl: For old ESP32-S3-BOX board
config/lvgl-3: For new ESP32-S3-BOX-3 board
2023-10-17 17:32:32 +08:00
Alan Carvalho de Assis
444b6d9635 boards: Update all boards that were using CONFIG_NET_LL_GUARDSIZE=50 2023-10-16 08:55:21 +08:00
Marco Casaroli
0f56d3428b feat(esp32s3-eye): lcd defconfig 2023-10-12 16:57:04 -04:00
Marco Casaroli
e5b4b58f96 feat(esp32s3-eye): i2c defconfig 2023-10-12 16:57:04 -04:00
Marco Casaroli
effab1bd61 feat(esp32s3-eye): SPI and LCD
LCD is connected to SPI2 and uses DC signalling.
2023-10-12 16:57:04 -04:00