Gustavo Henrique Nihei
47e804b167
risc-v/esp32c3: Make BLE adapter code compliant to nxstyle
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-05 08:45:40 -03:00
Gustavo Henrique Nihei
3c63cb522c
risc-v/esp32c3: Enable booting from MCUboot bootloader
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-09-27 18:22:29 -07:00
Abdelatif Guettouche
eb403bc996
boards/riscv/esp32c3: Rename the iram_0_2 segment to irom_0_0 to avoid
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confusions.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-24 07:00:51 -05:00
Abdelatif Guettouche
60da4317b9
arch/risc-v/esp32c3: Use the same naming for the RTC heap as ESP32 for
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consistency.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-23 08:37:01 +09:00
Abdelatif Guettouche
f54804bafc
arch/risc-v/esp32c3: Create a separate heap for the RTC memory.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Abdelatif Guettouche
61f7bc6e2a
boards/risc-v/esp32c3-devkit/scripts: Drop the "iram" in the name of the RTC
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section.
The RTC region is accessed by both I and D buses. The old name of
`rtc_iram_seg` is a bit confusing.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-06-18 00:53:42 -05:00
Dong Heng
31854ca135
riscv/esp32c3: Fix heap end address
2021-04-12 01:36:11 -05:00
Abdelatif Guettouche
5562f08369
boards: Add the ESP32-C3 DevKit board
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-18 01:21:53 -08:00
