Summary:
- SP_SECTION was introduced to allocate spinlock in non-cachable
region mainly for Cortex-A to stabilize the NuttX SMP kernel
- However, all spinlocks are now allocated in cachable area and
works without any problems
- So SP_SECTION should be removed to simplify the kernel code
Impact:
- None
Testing:
- Build test only
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- The CONFIG_SMP_IDLETHREAD_STACKSIZE was introduced to optimize
the idle stack size for other than CPU0
- However, there are no big differences between the idle stacks.
- This commit removes the config to simplify the kernel code
Impact:
- All SMP configurations
Testing:
- Tested with ostest with the following configs
- spresense:smp, spresense:rndis_smp
- esp32-devkitc:smp (QEMU), maix-bit:smp (QEMU)
- sabre-6quad:smp (QEMU), sabre-6quad:netnsh_smp (QEMU)
- raspberrypi-pico:smp, sim:smp (x86_64)
Signed-off-by: Masayuki Ishikawa <asayuki.Ishikawa@jp.sony.com>
This config is only useful when there is a > 4MB PSRAM and thus needs to
be selected by the user explicitly.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Reapply the following commit [1], which has been reverted by
the recent change [2] with no obvious reasons.
Also, add a comment block to explain the calculation.
[1]
```
commit 298c2e5e4f
Author: YAMAMOTO Takashi <yamamoto@midokura.com>
Date: Wed Jan 29 03:26:43 2020 +0900
sim: Fix stack alignment
The recent x86-64 convention requires 16-byte alignment before
(not after) calling a function.
This fixes snprintf crash I observed on macOS while saving XMM registers.
```
[2]
```
commit 2335b69120
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date: Mon Apr 12 23:44:08 2021 +0800
arch: Allocate the space from the beginning in up_stack_frame
arch: Allocate the space from the beginning in up_stack_frame
and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
```
Summary:
- This commit adds coloration for the idle stacks
Impact:
- k210 only
Testing:
- Tested with smp and nsh configs with QEMU and dev board
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Summary:
- This commit adds coloration for the idle stack
- Also, apply la pseudo-instruction instead of lui and addi
Impact:
- fe310 only
Testing:
- Tested with nsh with QEMU and dev board
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
stm32h7:Serial Use Idel to poll RX DMA
stm32h7:Serial Do not loop in an ISR!
stm32h7:Serial signal txdma completion with semaphore
stm32h7:Serial Apply formatting suggestions from code review
Co-authored-by: Mateusz Szafoni <raiden00pl@gmail.com>
stm32h7: Serail Add Power Managment (Untested)
arch: Allocate the space from the beginning in up_stack_frame
and modify the affected portion:
1.Correct the stack dump and check
2.Allocate tls_info_s by up_stack_frame too
3.Move the stack fork allocation from arch to sched
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
For unknown reasons this message may interferre with the calibration
procedure and result in invalid calibariton data.
We leave only a message informing about the end of the the calibration.
The problem was observed for STM32G4 + IHM16M1.
I've seen a module with 16 bytes .rodata alignment for xmm operations.
It was getting SEGV on sim/Linux because of the alignment issue.
The same module binary seems working fine after applying this patch.
Also, tested on sim/macOS and esp32 on qemu,
using a module with an artificially large alignment. (64 bytes)
Change the logic for allocating user heap for PROTECTED_BUILD:
- Don't rely on SRAM1_END alignment
- Make better use of MPU subregions when allocating the heap
- Don't duplicate the calculation of user heap start in kernel heap
allocation; use the previous calculation directly
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Summary:
- I noticed that stack corruption happens due to recent refactoring
- This commit fixes this issue
Impact:
- SMP only
Testing:
- Tested with maix-bit:smp (QMU and dev board)
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
