Following warnings were caused by incorrect naming of few defines.
chip/sam_mcan.c:415:7: warning: "MCAN1_NTSEG1" is not defined, evaluates to 0 [-Wundef]
415 | # if MCAN1_NTSEG1 > 63
| ^~~~~~~~~~~~
chip/sam_mcan.c:418:7: warning: "MCAN1_NTSEG2" is not defined, evaluates to 0 [-Wundef]
418 | # if MCAN1_NTSEG2 > 15
| ^~~~~~~~~~~~
chip/sam_mcan.c:421:7: warning: "MCAN1_NSJW" is not defined, evaluates to 0 [-Wundef]
421 | # if MCAN1_NSJW > 15
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This compilation flag was added in the same way as done for esp32
in order to avoid unexpected behaviors when accessing registers
using struct bitfields.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32 targets and removes the need
for running 'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
Move and unify map_rom_segments function called when starting
Simple Boot and MCUboot compatible images.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
sometimes ubsan work with asan trigger a mistake report, make it
possible to export library with ubsan, and bypass runtime feature.
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
This current driver does not handle well netpkts used in the
write buffers.
I learned about this document:
https://github.com/apache/nuttx/blob/master/Documentation/components/net/netdriver.rst
After I ported and contributed the original driver.
However from the document, I understand these types of drivers are
simpler to implement and I could simplify the driver and handle
correctly the TCP write buffers.
Add addrenv support for x86_64.
For now we support mapping on PT level, so PD, PDT and PML4 are static
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
use new MMU api to implement up_map_region().
The new implementation support maping over 0xffffffff but requires CONFIG_MM_PGALLOC=y
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
During the boot phase, when we transition from tee smp to ap smp, we can use a busy waitflag to wait for the completion of the initialization of ap's core0
test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Only in the non-critical region， nuttx can the respond to the irq and not hold the lock
When returning from the irq, there is no need to check whether the lock needs to be restored
test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
When the PSRAM is enabled, we should not allocate the TX/RX
buffers there, so we use kmm_calloc here, to make it into IRAM,
so the ethernet controller can read bytes from it.
Add support for XSAVE/XRSTOR to handle x86_64 procesor extended states.
Support for these instructions is required to support AVX instruction set
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Use 32bit operations for id field in intel64_cpu_s which is int type.
This fixes an error that appears when enabling some debug options:
`Error: operand size mismatch for `movq'``
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Intel64 can now boot application cores which is needed for SMP
IMPORTANT: CONFIG_BOARD_LOOPSPERMSEC must be properly configured,
otherwise AP boot sequence can fail due too short delays during the AP startup
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Add support for inter-processor signaling in x86_64 based on up_trigger_irq() interface.
Preparations for SMP.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
reduce the time consumed by function call
test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Use GS base regsiter to store reference to CPU private data.
Then we can easily refer to private CPU data using the GS segment.
Required for SMP support.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
It turns out that the D0 core of the BL808 has an IRQ that represents all interrupt sources for the M0 core. This change uses this IRQ to access these sources, eliminating the need for IPC between M0 and D0.
fix missing reference to comm_region->tsc_khz and
fix 'defined but not used' warnings in arch/x86_64/intel64_rtc.c
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Hide --whole-archive behind Kconfig option for x86.
This option is not needed and breaks ELF modules build.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
on ACRN hypervisor obtaining frequency from CPUID seems to be broken,
so we have to specify this value from Kconfig.
If frequency autodetection is enabled but the returned data are
incorrect - crash early.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
- This PR adds the GPIO Driver for BL808 SoC. This will be used by the upcoming LED Driver for Ox64 Board.
- The BL808 GPIO Driver was derived from the NuttX Driver for BL602 GPIO
Co-Authored-By: Lup Yuen Lee <luppy@appkaki.com>
Squashed:
Initial settings for MCPWM Capture on board level
Created lower half files - compilation ok
Using capture debug features. Simple example on fops works
Successful duty and freq calculation
Documentation update
Fixed and added interupt capabilities for all 3 capture channels
Cleaned defconfig
Renamed macros, added S3 options and moved arch source to common dir
Added support for ESP32S3
Added capture example to defconfig and renamed
