Port STM32F7 I2C to STM32F3 and STM32F0L0
arch/arm/src/stm32: port I2C IPv2 driver from F7 (only F3 chips)
arch/arm/src/stm32f0l0: port I2C IPv2 driver from F7
configs/b-l072z-lrwan1: nxlines_oled example (ssd1306)
configs/b-l072z-lrwan1: support for the I2C tool
configs/nucleo-f303ze: nxlines_oled example (ssd1306)
arch/arm/src/stm32h7/chip.h: cosmetics
arch/arm/src/stm32/chip/stm32_tim.h: cosmetics
Approved-by: Gregory Nutt <gnutt@nuttx.org>
libs/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
syscall/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
wireless/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
Documentation/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
include/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
drivers/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
sched/: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
configs: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/xtensa: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/z80: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/x86: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/renesas and arch/risc-v: Remove references to CONFIG_DISABLE_SIGNALS. Signals can no longer be disabled.
arch/or1k: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/misoc: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/mips: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/avr: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/arm: Remove all references to CONFIG_DISABLE_SIGNALS. Signals are always enabled.
arch/arm/src/stm32/stm32_i2s.c: In debug assertions, it on a sample rate of 0, but based on other code comments this value implies disabling the i2s master clock.
arch/arm/src/stm32/stm32_usbhost.h and arch/arm/src/stm32/Kconfig: Allow vbus monitoring for the OTG_HS host driver.
Fixed coding standard error in several files. Use of while( is incorrect; a space is required between while and (. Also ran tools/nxstyle and fix thoses complaints as well in most files.
Changes to comply with coding standard. Mostly focused on files with missing space after keyword in if(, switch(, and for(. Offending files also got changes to comply with tools nxstyle. If there were logs of nxstyle complaints, the file also got a taste of tools/indent.sh. Still need to fix occurrences of while( with missing space. There are a lot of them.
sched/init/nx_bringup.c: Fix a naming collision.
sched/init: Rename os_start() to nx_start()
sched/init: Rename os_smp* to nx_smp*
sched/init: Rename os_bringup to nx_bringup
sched/init: rename all internal static functions to begin with nx_ vs os_
Improvements in STM32 ADC, PWM and TIM
arch/arm/src/stm32/chip/stm32_adc_v2.h: missing T1TRGO2 for JEXTSEL
arch/arm/src/stm32/stm32_adc: configure injected channels external trigger when ADC enabled
arch/arm/src/stm32/stm32_adc: update injected conversion queue of context after configuration
arch/arm/src/stm32/stm32_adc: fix sample time configuration for channels. The array index for channels was missing
arch/arm/src/stm32/stm32_adc: support for offset configuration
arch/arm/src/stm32/stm32_pwm: fix TRGO/TRGO2 configuration
arch/arm/src/stm32/stm32_pwm: support for advanced timers channel 5 and 6
Approved-by: GregoryN <gnutt@nuttx.org>
Improvements for STM32 PWM
arch/arm/src/stm32/stm32_pwm: fix polarity and IDLE state configuration for advanced timer PWM
include/dsp.h: raise error if math.h not present
Approved-by: GregoryN <gnutt@nuttx.org>
Squashed commit of the following:
arch/arm/src/stm32f0l0: Various changes for a clean compilation. Still does not compile correctly due to missing FLASH latency definitions.
arch/arm/src/stm32f0l0/hardware: Add framework for the STM32 L0. Currently set to same as the STM32F0.
arch/arm/src/stm32f0l0/hardware: Very fragmentary FLASH header register definitions for the STM32 L0.
arch/arm/src/stm32f0l0: Bring in DMA v1. Cannot possibly be functionaly yet due to the limited number for M0 interrupts.
arch/arm/src/stm32f0l0: Add STM32 F0/L0 LSE and backup power domain controls.
arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h: Add STM32L0 PWR header file.
arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.
arch/arm/include/stm32f0l0/chip.h: WIP.
arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.
arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.
nuttx/arch/arm/include/stm32f0l0: Add STM32L0 IRQ number definition file.
arch/arm/src/stm32f0l0: Add STM32L0 RCC driver.
arch/arm/src/stm32f0l0/hardware: Adds basic STM32L0 header files.
arch/arm/src/stm32f0l0: Add STM32L0 chip selections.
configs/: Hook new STM32L0 boards into the configuration system.
configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled
configs: add basic support for nucleo-l073rz
configs: add basic support for b-l072z-lrwan1
- Avoids the use of up_aesinitialize() entirely, which resolves dependency problems, because this function does not make sure that an actual hardware aes implementation was made available: each SoC is now responsible to ensure the AES hardware is initialized before first use. This applies to lpc43xx, stm32 and sam34.
- Remove definitions of the NEVER used aes_init and aes_update operations. The new AES API will be more suitable.
- Change the unusual naming in stm32 (avoiding possible naming clashes)
- Change the unusual naming in sam34 (avoiding possible naming clashes)
- Add some FAR to pointers and enforce the 80 col limit in stm32 and sam
