Commit Graph

44 Commits

Author SHA1 Message Date
fangxinyong
5d40882d4c Documentation: update doc for etc romfs
as apache/nuttx#11498, need update documentation for etc romfs,
that mount etc romfs from nsh to sched/init.
2024-01-21 06:11:46 -08:00
Yanfeng Liu
27137113f1 risc-v/k230: update documents
added brief features list for K230 chip
updated CanMV230 board docs for NUTTSBI config usage

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-19 19:33:21 -08:00
Yanfeng Liu
dd1365ef85 risc-v/canmv230: add PROTECTED build support
Additions:

- In arch/risc-v/src/k230/
  - k230_userspace.c      add user space initialization
  - k230_userspace.h      headers for user space initialization
- In boards/risc-v/k230/canmv230/kernel/
  - k230_userspace.c      userspace_s const data definition
  - Makefile              pass1 Makefile
- In boards/risc-v/k230/canmv230/scripts/
  - ld-protected.script   linker script for protected build kernel
  - ld-userland.script    linker script for protected build userspace
- In boards/risc-v/k230/canmv230/configs
  - pnsh/defconfig        defconfig for protected build

Changes:

- In arch/risc-v/src/k230/
  - k230_start.c          add protected build handling logic
  - Make.defs             add protected build support
- In boards/risc-v/k230/canmv230/scripts/
  - Make.defs             add protected build support
- In Documentation/platforms/risc-v/k230/boards/canmv230/
  - index.rst             add protected build usage

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-08 19:46:42 -03:00
Yanfeng Liu
31f9dcdaa4 risc-v/k230: revise canmv230 docmentations
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-01 04:01:28 -08:00
Yanfeng Liu
7cb8e590a1 risc-v/k230: kernel build for CanMV-K230 board
Changes:

- Documentation/platforms/risc-v/k230  revised for both modes
- arch/risc-v/include/k230/irq.h       add S-mode IRQs
- under arch/risc-v/src/k230 folder:
  - Make.defs                          drop use of k230_exception_m.S
  - hardware/k230_clint.h              add S-mode defs, revised freq
  - k230_head.S                        unified flat/kernel mode support
  - k230_irq.c                         add S-mode support with debug dump
  - k230_mm_init.c                     revised for K230 S-mode
  - k230_start.c                       revised for flat/s-mode,
- arch/risc-v/src/k230/k230_timerisr.c unified flat/s-mode support.
- under boards/risc-v/k230/canmv230 folder:
  - configs/nsh/defconfig              fix RAM size
  - include/board_memorymap.h          cleanup for S-mode
  - src/.gitignore                     ignore romfs_boot.c
  - src/Makefile                       add romfs support

Renames:

- under boards/risc-v/k230/canmv230/src/ folder:
  - canmv_init.c from k230_appinit.c   making room for more k230 devices

Dropped:

- under arch/risc-v/src/k230/
  - k230_exception_m.S                 as hybrid mode not ready yet.

New files in boards/riscv/k230/canmv230:

- configs/knsh/defconfig                S-mode config
- scripts/ld-kernel.script              S-mode linker script
- src/romfs.h                           User space ROMFS defs needed in S-mode
- src/romfs_stub.c                      Stub ROMFS image

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2023-12-31 07:26:45 -08:00
Yanfeng Liu
75d0c2946d risc-v: Initial support for CanMV-k230 board and K230 chip
The code is mainly derived from the NuttX qemu-rv/rv-virt codebase.

Major changes:

- boards/Kconfig:       add new BOARD_K230_CANMV
- arch/risc-v/Kconfig:  add new CHIP_K230 chip and ARCH_RV_MMIO_BITS
- arch/risc-v/src/common/riscv_mtimer.c: use ARCH_RV_MMIO_BITS to
                        select MMIO access width

New additions:

- arch/risc-v/include/k230/: k230 SoC definitions
- arch/risc-v/src/k230/:     k230 SoC sources
- boards/risc-v/k230/canmv230/:  CanMV-K230 board sources and configs
- Documentation/platforms/risc-v/k230/: simple doc

Note that only FLAT build works for canmv230 now.

This PR has changes in RiscV common layer thus may affect other RiscV ports
It changes the mtime/mtimecmp access control from using config ARCH_RV64 to
newly intorduced config ARCH_RV_MMIO_BITS.

Original design uses ARCH_RV64 to select 64bit MMIO in riscv_mtimer.c, this
can't cope with the situation with K230 --- it has ARCH_RV64 but only can do
32bit MMIO. So a new ARCH_RV_MMIO_BITS config has been introduced. Its value
depicts the MMIO width in bits. The MMIO_BITS defaults to 32/64 for RV32/
RV64 respectively. This allows the macro to replace current use of ARCH_RV64
in riscv_mtimer.c.

The new MMIO_BITS config is a derived one, and for RiscV chips with
equal CPU and MMIO widths there is no need to explicitly set it as the
default rule will do that. Only chips with different CPU and MMIO widths
need set it in Kconfig.

So by design this change should be safe but RiscV ports should be checked.

"ostest" verification has been done for:

- canmv230/nsh
- rv-vivt/nsh
- rv-virt/nsh64

configuration generation and manual check of derived RV_MMIO_BITS has been
done for:

- star64/nsh
- arty_a7/nsh
- bl602evb/nsh

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2023-12-17 01:10:57 -08:00
Lee Lup Yuen
87c1b81857 boards/riscv: Add support for PINE64 Ox64 BL808 SBC
This PR adds support for PINE64 Ox64 64-bit RISC-V SBC, based on Bouffalo Lab BL808 SoC (T-Head C906 Core). Most of the code is derived from NuttX for Star64 JH7110. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-ox64

### Modified Files

`boards/Kconfig`: Added Ox64 board

### New Files in boards/risc-v/bl808/ox64

`src/bl808_appinit.c`: Startup Code

`include/board.h`: Ox64 Definitions

`include/board_memorymap.h`: Memory Map

`src/etc/init.d/rc.sysinit`, `rcS`: Startup Script

`src/.gitignore`: Ignore the tmp filesystem

`scripts/ld.script`: Linker Script

`scripts/Make.defs`: Ox64 Makefile

`src/Makefile`: Ox64 Makefile

`Kconfig`: Ox64 Config

`configs/nsh/defconfig`: Build Config for `ox64:nsh`

### Updated Documentation

`platforms/risc-v/bl808/index.rst`: New page for Bouffalo Lab BL808 SoC

`platforms/risc-v/bl808/boards/ox64/index.rst`: Building and booting NuttX for Ox64

`platforms/risc-v/jh7110/boards/star64/index.rst`: Fix typo
2023-12-15 18:52:16 -08:00
Nathan Hartman
26e4dd5638 Documentation: Fix various typos 2023-11-23 16:38:19 -08:00
Masayuki Ishikawa
5f15c73219 Documentation, tools: Bump xpack-riscv-none-elf-gcc to 12.3.0-2
Summary:
- Upgraded to xpack-riscv-none-elf-gcc-12.3.0-2 to resolve symbol recognition
  issues in riscv-none-elf-gdb, as reported in
  https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/issues/22.

Impact:
- Expected to enhance toolchain stability with no negative side effects.

Testing:
- Verified with rv-virt:netnsh and rv-virt:netnsh64 configurations

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2023-11-14 12:33:36 +01:00
Alan Carvalho de Assis
468e9fcde5 Documentation: Fix typos
I used codespell to find typos in the documentation.

Signed-off-by: Alan C. Assis <acassis@gmail.com>
2023-10-29 10:35:51 +08:00
raiden00pl
56529d2944 Documentation: migrate the rest boards
- migrated /README are removed from /boards

- there are a lot of READMEs that should be further converted to rst.
  At the moment they are moved to Documentation/platforms and included in rst files
2023-10-26 18:13:34 -03:00
raiden00pl
88b7ce80a0 Documentation: add missing platforms to platforms/ and remove introduction/platforms 2023-10-22 19:06:44 +08:00
Tiago Medicci Serrano
997b3422a3 Documentation: Update the recommended toolchain for ESP32-C3/C6/H2
Currently, this toolchain is being used for NuttX CI testing and
provide features that weren't available in the old toolchain based
on GCC 10.2.
2023-10-05 19:18:05 -04:00
Lee Lup Yuen
a59673b526 boards/risc-v: Add support for PINE64 Star64 JH7110 SBC
This PR adds support for PINE64 Star64 64-bit RISC-V SBC, based on StarFive JH7110 SoC. Most of the code is derived from NuttX for QEMU RISC-V (Kernel Mode). [The source files are explained in the articles here](https://github.com/lupyuen/nuttx-star64)

Modified Files:

boards/Kconfig: Added Star64 board

New Files in boards/risc-v/jh7110/star64:

src/jh7110_appinit.c: Startup Code

include/board.h: Star64 Definitions

include/board_memorymap.h: Memory Map

src/etc/init.d/rc.sysinit, rcS: Startup Script

src/.gitignore: Ignore the tmp filesystem

scripts/ld.script: Linker Script

scripts/Make.defs: Star64 Makefile

src/Makefile: Star64 Makefile

Kconfig: Star64 Config

configs/nsh/defconfig: NSH Build Config

Updated Documentation:

introduction/detailed_support.rst: Added StarFive JH7110 SoC and Star64 SBC

platforms/risc-v/jh7110/index.rst: New page for StarFive JH7110 SoC

platforms/risc-v/jh7110/boards/star64/index.rst: Building and booting NuttX for Star64
2023-08-07 01:08:35 -07:00
Stuart Ianna
4cae98674d litex: Support for kernel build with vexriscv-smp. 2023-04-22 01:40:32 +08:00
Lucas Saavedra Vaz
c702223fab Documentation: Improve pages for ESP boards 2023-03-25 12:23:35 +02:00
Lucas Saavedra Vaz
c961edbe6c Documentation: Fix compilation warnings 2023-03-25 12:23:35 +02:00
Eero Nurkkala
4bb432b0f4 Documentation: risc-v/mpfs: correct information
These changes were requested by the vendor, hence fix them
accordingly.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2023-03-02 13:32:32 +08:00
chenwen@espressif.com
cfc9029c5d risc-v/esp32c6: Add ESP32-C6 basic support
1. Bring up OS kernel.
  2. Add interrupt support.
  3. Add system timer support.
  4. Add the ESP32-C6 devkit board.
  5. Add basic UART support for console.
  6. Add clock configuration.
  7. Add board reset support.
2023-02-10 17:38:41 -03:00
Alan Carvalho de Assis
7660ece921 Doc: Add documentation about using BLE on ESP32-C3 2022-12-30 18:11:51 +02:00
Nathan Hartman
03802dad13 NuttX graduated the Incubator; update repository links 2022-11-26 11:58:15 -08:00
Lucas Saavedra Vaz
4d164bb995 doc: Add and fix Secure Boot and Flash Encryption section for ESP boards 2022-10-28 01:14:20 +08:00
Nathan Hartman
2032eeae6c Documentation: Fix various typos.
Documentation/components/drivers/character/serial.rst
Documentation/faq/index.rst
Documentation/guides/pysimcoder.rst
Documentation/platforms/arm/imxrt/boards/teensy-4.x/index.rst
Documentation/platforms/arm/imxrt/index.rst
Documentation/platforms/arm/stm32wl5/boards/nucleo-wl55jc/index.rst
Documentation/platforms/arm/stm32wl5/index.rst
Documentation/platforms/risc-v/bl602/index.rst
Documentation/platforms/sim/sim/index.rst
Documentation/platforms/xtensa/esp32/index.rst

Co-authored-by: Gustavo Henrique Nihei <38959758+gustavonihei@users.noreply.github.com>
2022-06-24 00:01:38 +08:00
Michał Łyszczek
a5bcb2dc46 Documentation: fix multiple errors and warnings
Multiple files were badly formatted, which resulted in many
warnings. This made it harder to check for errors in newly
written documentation.

What's worse, badly formatted text resulted in butchered
output in generated html.

This patch fixes most of the errors, but alas, not all of
the errors can be fixed. Anyway, this should be way easier
to spot errors in newly written docs now.

Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl>
2022-06-08 03:02:32 +08:00
Alan C. Assis
0f49a8dec7 Fix ESP32-C3 toolchain download link 2022-04-02 05:41:18 +08:00
Janne Rosberg
841bcf84a0 docs/mpfs: mark USB and ethernet as supported 2022-03-18 17:22:27 +02:00
Xiang Xiao
1d1bdd85a3 Remove the double blank line from source files
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-02-20 20:10:14 +01:00
Eero Nurkkala
10d98f64d3 Documentation: risc-v/mpfs: update documentation
Update the risc-v/mpfs documentation to match the current work.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-01-17 17:33:03 +08:00
Jari van Ewijk
2e47ef32cf GPIO driver: register all pintypes as generic /dev/gpioN 2021-12-09 23:55:12 -06:00
Abdelatif Guettouche
00befc4ec6 Documentation/esp32c3: Document the CDC console defconfig.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-09 09:22:57 -03:00
Abdelatif Guettouche
dee1726a35 Documentation/esp32c3: List the supported ESP32-C3 boards.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-11-08 14:58:54 -03:00
Alan C. Assis
e0389ce1fb build: Replace 'make download' with 'make flash' 2021-10-14 16:33:27 -03:00
Janne Rosberg
3a6d2adce8 Documentation/mpfs: add SD to supported peripherals 2021-09-18 12:18:09 -03:00
Abdelatif Guettouche
6c2fcdc45d Documentation: Update ESP32-C3 supported peripheral list.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-08-21 18:30:53 -03:00
jsun
bb63afde1e Documentation/bl602: Update some imformation; Add partition.toml in tool/bl602 2021-07-27 21:01:15 -07:00
jsun
e968240855 Add BL602 documentation 2021-07-19 08:40:44 -03:00
Eero Nurkkala
1bce864ef7 mpfs: add i2c driver
This adds mpfs i2c driver.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 21:03:42 -05:00
Eero Nurkkala
fad34e04c4 mpfs: add spi driver
This adds the SPI driver for the MPFS Icicle board.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-06-11 09:10:03 -05:00
Janne Rosberg
39274937e4 documentation/mpfs: add mpfs and icile board to documentation 2021-05-24 22:55:44 -05:00
Abdelatif Guettouche
77bb231827 Documentation/esp32c3-devkit: Fix the name of the ESP32-C3 DevkitM
image.
2021-05-12 10:16:05 -03:00
Abdelatif Guettouche
42232fa98e Documentation/esp32c3: Fix the OpenOCD board.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-12 10:16:05 -03:00
Abdelatif Guettouche
5bd970df4f Documentation/esp32c3: Explain debugging with OpenOCD.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-12 04:40:41 -07:00
Abdelatif Guettouche
df7bd125f8 boards/risc-v/esp32c3: Convert the README.txt to the new Documentation.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-12 04:40:41 -07:00
Matias N
87596d74dd Documentation: introduce hardware platforms documentation 2021-02-07 08:38:51 -03:00