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5302 Commits

Author SHA1 Message Date
Gregory Nutt
5a9f1fa3ab Extension memory map inclusion for SAMA5D2 2015-09-02 08:23:44 -06:00
Gregory Nutt
075b66d4bb Eliminate a warning 2015-09-01 13:35:38 -06:00
Gregory Nutt
8c9f7e5ab6 Add peripheral clock macros for the SAMA5D2 2015-09-01 13:08:48 -06:00
Gregory Nutt
f6d8a03b55 Merged in paulpatience/nuttx-arch (pull request #10) 
Correct #if to #ifdef when the macro can be undefined.  Fix bug in AT32UC3 clock initialization:  AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1.
 2015-09-01 12:31:05 -06:00
Paul A. Patience
a0dc724a5d Correct #if to #ifdef when the macro can be undefined. Fix bug in AT32UC3 clock initialization: AVR32_CLOCK_PLL_OSC1 should be AVR32_CLOCK_PLL0_OSC1 and AVR32_CLOCK_PLL1_OSC1. 2015-09-01 13:47:06 -04:00
Ilya Averyanov
98788063f1 Fix warning in Kconfig file introduced with first SAMA5D2 commit. From Ilya Averyanov. 2015-09-01 11:23:08 -06:00
Gregory Nutt
ed3d6fc7a0 SAMV7 QSPI: Delays need to be in units of nsec, not usec. Default delays should be 0 nsec 2015-09-01 11:16:09 -06:00
Ilya Averyanov
8c52786395 LPC43xx: Fix missing #define in eeprom. From Ilya Averyanov 2015-09-01 08:08:09 -06:00
Ilya Averyanov
675878b360 PC43xx: Fix NVIC_SYSH_PRIORITY_STEP define 2015-09-01 08:06:34 -06:00
Gregory Nutt
c33efa0a60 SAMA5D2: Add chip definitions, PIDs, and IRQ definitions 2015-08-31 15:19:01 -06:00
Gregory Nutt
9ba349f2b8 SAMV71 QSPI: Fix frequency calculation. Need to use ceil() type logic so that requested frequency is not exceeded 2015-08-31 10:18:17 -06:00
Gregory Nutt
4f87a71e6d SAMV7 QSPI: Use of CPHA in mode settings was inverted 2015-08-31 10:05:41 -06:00
Gregory Nutt
4b738ba7cc SAMV7 QSPI: Fix some compiler problems when SPI debug is enabled 2015-08-31 08:57:30 -06:00
Gregory Nutt
70f1a49fbe arch/arm/src/up_iternal.h and several ARM Make.defs files: In the original implementation, NOT defined(CONFIG_ARMV7M_CMNVECTOR) was a sufficient test to determine if lazy floating point register saving was being used. But recents changes added common lazy register as well so now that test must be (NOT defined(CONFIG_ARMV7M_CMNVECTOR) || defined(CONFIG_ARMV7M_LAZYFPU)). 2015-08-31 08:40:02 -06:00
Gregory Nutt
b6515bbd4d SAMV71 QSPI: Changes resulting removing of clocking 2015-08-29 18:53:27 -06:00
Gregory Nutt
b94eef2f19 SAMV71 QSPI: Driver is code complete 2015-08-29 15:57:20 -06:00
Gregory Nutt
3877cb09d9 Trivial renaming 2015-08-29 10:04:36 -06:00
Gregory Nutt
b887d39d2e SAMV7 QSPI: Add DMA transfer support 2015-08-29 10:02:59 -06:00
Gregory Nutt
0b1bd46e24 SAMV71 QSPI: Add support for dual and quad data transfers and dummy read cycles 2015-08-28 11:58:19 -06:00
Gregory Nutt
3e0affba86 SAMV71 QSPI: Add support for non-DMA memory transfers 2015-08-28 10:13:46 -06:00
Gregory Nutt
8aefb9d139 SAMV71 QSPI: Redesign some functions to better matched new interface definition 2015-08-27 14:15:23 -06:00
Gregory Nutt
71bbe5b48d Merge remote-tracking branch 'origin/master' into st25fl1 2015-08-27 12:08:04 -06:00
Gregory Nutt
926f3aa9af Update some comments 2015-08-27 08:19:26 -06:00
Gregory Nutt
45a6f79eeb SAMV71 QSPI: Flesh out most of the initialization logic 2015-08-26 14:15:40 -06:00
Gregory Nutt
768aba20ad SAMV71 QSPI: Use new QSPI interface. Can't use SPI interface as planned; the hardware architectue is too different 2015-08-25 15:23:59 -06:00
Gregory Nutt
fa9522da41 Missed one file in last commit 2015-08-24 14:30:58 -06:00
Gregory Nutt
01cfe8c315 Networking: Move where the local loopback device is initialized from board_app_intiialize() to up_intiialize() so that it will happen automatically 2015-08-24 14:25:49 -06:00
Gregory Nutt
0732914d09 Merged in david_s5/arch/upstream_446_clock (pull request #9) 
Upstream_446_clock
 2015-08-24 14:13:51 -06:00
Gregory Nutt
706d50d97a Merge branch 'master' of bitbucket.org:nuttx/arch 2015-08-24 13:46:19 -06:00
Gregory Nutt
c9603b27c0 sim: Add logic to initialize the local loopback device is so configured 2015-08-24 13:46:05 -06:00
David Sidrane
98ce2b2912 Fixed Mask and made configuration macros consistant 2015-08-24 08:56:24 -10:00
David Sidrane
b95c642a88 Added Kconfig Enable Support for SAI and I2S PLL 2015-08-24 08:55:45 -10:00
Gregory Nutt
bddc4dbd6a LPC17: Fix RAM vector table alignment for the LPC17 family. The ARMv7-M TRM only requires 128-byte alignment for vector tables; the LPC17, however, requires 256 byte alignment 2015-08-23 17:17:14 -06:00
Gregory Nutt
065f2d6057 SAMV7 USBHS DCD: Add logic to detect high speed mode; use DEBUGASSERT to check input parameters 2015-08-22 08:58:38 -06:00
David Sidrane
6559c8994a Remove the word NOT - that was used to test the fix. 2015-08-21 18:51:28 -06:00
David Sidrane
390c777a2a Removed the word NOT - that was used to test the fix. 2015-08-21 18:40:20 -06:00
Pavel Pisa
2fafe1c817 arch/arm/src/lpc17: Actually implement options to use external SDRAM and or SRAM for the heap. From Pavel Pisa 2015-08-21 18:28:59 -06:00
Gregory Nutt
4c0d36740d Some of the last review chnages were still in the editor 2015-08-21 18:25:10 -06:00
Gregory Nutt
9a32e907df Trivial, cosmetic changes from review of merge 2015-08-21 18:22:57 -06:00
Gregory Nutt
4e347080e6 Update comments in Kconfig file 2015-08-21 18:15:09 -06:00
Gregory Nutt
16c5be9767 Merged in david_s5/arch/upstream_446 (pull request #7) 
Upstream_446
 2015-08-21 18:11:05 -06:00
David Sidrane
9d64050d68 Added Changes to support for the new USB OTG controller for F446 register map 2015-08-21 13:57:08 -10:00
David Sidrane
7c96342c63 Break the stm32_otg.h into an stm32fxxxxx and stm32f44xx (should work on F7) versions 2015-08-21 13:55:06 -10:00
David Sidrane
5d1ff3f7e1 Use read modify write on PLL and CFG registers 2015-08-21 13:22:09 -10:00
David Sidrane
1c746edceb Added PLL P constants 2015-08-21 13:20:16 -10:00
Gregory Nutt
972f67ce42 SAMV7 QSPI: Add framework for a QSPI driver. Initial commit is just the SPI driver with some name changes 2015-08-21 14:22:47 -06:00
Gregory Nutt
f6c6723d88 SAMV7 USBHS Device: After aligning DMA buffers and disabling write-back data cache, the DCD driver is fully functional using the CDC/ACM device 2015-08-21 12:30:29 -06:00
Gregory Nutt
da6c5aabdf All ARMV7-M IRQ setup: Always set the NVIC vector table address. This is needed in cases where the code is running with a bootload and when the code is running from RAM. It is also needed by the logic of up_ramvec_initialize() which gets the vector base address from the NVIC. Suggested by Pavel Pisa 2015-08-21 08:42:24 -06:00
Gregory Nutt
0b3b104b74 Remove unnecessary step in previous commit 2015-08-20 16:21:45 -06:00
Pavel Pisa
387f76d455 This fix allows to run NuttX from SRAM or to place it after bootloader when run from Flash. From Pavel Pisa 2015-08-20 07:46:18 -06:00
Gregory Nutt
5196a4183c SAMV7 USBHS device: Fix how we send data on control endpoints; fix how we select USB address 2015-08-19 11:36:38 -06:00
Gregory Nutt
0db7ac92d9 Minor coding style fixes in last commit; remove some unneeded debug output 2015-08-19 07:54:46 -06:00
SaeHie Park
75626fb071 STM32: Fix eth mem leak in recvframe 2015-08-19 15:40:04 +09:00
Gregory Nutt
cfd4f943da SAMV7 MCAN: When bitrate is changed, the MCAN has to be reset and there are lots of issues related to getting back to a healthy state if there is multithreaded access to the MCAN device. This commit handles a few of those issues, but there are more 2015-08-18 11:56:07 -06:00
Gregory Nutt
4b96605f93 SAMV7 MAN: Add support for bit timing IOCTL commands 2015-08-18 11:20:22 -06:00
Gregory Nutt
ff84e67e59 SAMV7 MCAN: Add logic to report CAN errors 2015-08-18 08:48:13 -06:00
Gregory Nutt
b7d6720a23 All CAN drivers: Set the new error indication to zero in the CAN message report 2015-08-18 07:24:12 -06:00
Gregory Nutt
c01d3298e5 Merged in paulpatience/nuttx-arch (pull request #5) 
Added definitions for STM32F303K6, STM32F303K8, STM32F303C6, STM32F303C8, STM32F303RD, and STM32F303RE devices.
 2015-08-17 12:55:32 -06:00
Paul A. Patience
c800841632 Added definitions for STM32F303K6, STM32F303K8, STM32F303C6, 
STM32F303C8, STM32F303RD, and STM32F303RE devices.
 2015-08-17 14:00:49 -04:00
Gregory Nutt
531456d20c Fix deadlock when closing the MCAN device driver 2015-08-17 11:49:20 -06:00
Gregory Nutt
4f122d5290 SAMV71 MCAN: Default clock source should be MCK, not MAIN 2015-08-17 11:03:15 -06:00
Gregory Nutt
ff38abf580 SAMV7 MCAN: Should support standard CAN IDs in extended ID mode 2015-08-17 10:52:58 -06:00
Gregory Nutt
ba6c0b3fa3 Fix more common typos 2015-08-16 11:06:29 -06:00
Gregory Nutt
e29220183a Fix some common typos 2015-08-16 10:59:10 -06:00
Gregory Nutt
9e5e91c204 SAMV7 USBHS device: Fix backward test of TXINIT. Driver now appears to be functional 2015-08-16 08:55:44 -06:00
Gregory Nutt
b503bf6ca1 SAMV7 USB device: Fix base address of USBHS RAM; remove a bad assertion; fix clearing of endpoint interrupts 2015-08-15 13:00:32 -06:00
Gregory Nutt
9d7301f474 SAMV7 USBHS device: Need to enable endpoint before configuring it; Check for USB suspended backward 2015-08-15 10:41:15 -06:00
Gregory Nutt
651317ee49 SAML21: Various SERCOM fixes 2015-08-14 18:11:02 -06:00
Gregory Nutt
348060f5d2 SAMV7: Add QSPI Register Definition Header File 2015-08-14 18:11:01 -06:00
Gregory Nutt
150f79a198 Backout commit e03b47b6e28ca98a6cc8497ad822309de5153eb3 2015-08-14 10:24:56 -06:00
Gregory Nutt
a44a208ff6 SAMV71 MCAN: Change Kconfig so that zero is no longer the default value for the size of RXFIFO0, RXFIFO1, and TXFIFIQ. In fact, zero is not an illegal value 2015-08-13 08:13:49 -06:00
Gregory Nutt
bef5eb0bc9 Fix a typo in a preprocessor warning 2015-08-12 15:32:46 -06:00
Gregory Nutt
b9d4ead73f SAMV7 MCAN: Correct usage of PCLK prescaler. From Frank Benkert 2015-08-12 11:17:03 -06:00
Gregory Nutt
53638b10dc SAMV7 USBHS device: Modify how ATTACH is performed if the use host has already reset 2015-08-12 11:13:18 -06:00
Gregory Nutt
68932c02d3 Fix typos in SAMV7 MCAN. From Frank Benkert 2015-08-12 08:17:50 -06:00
Gregory Nutt
2264c1fa64 SAMV7 USB: USB must be enabled before PMC 480MHz clock is enabled 2015-08-11 15:48:26 -06:00
Gregory Nutt
f3d1c19965 SAMV7 SPI slave: Loop in the interrupt handler; RDRF and TXNE events should occur very closely in time 2015-08-11 09:30:24 -06:00
Gregory Nutt
27733a6731 Trivial spacing change 2015-08-11 07:51:31 -06:00
Gregory Nutt
9f4e033f4c MoxART: Trivial changes from code review 2015-08-10 11:05:09 -06:00
Gregory Nutt
8de9d3f014 Merged in rnouse/nuttx-arch (pull request #4) 
Add Shared IRQ support for UART w/multi port.
 2015-08-10 10:11:43 -06:00
Gregory Nutt
c8c470271f SAMV7 SPI Slave: Completes implementation basic, no-DMA driver 2015-08-10 10:05:00 -06:00
Anton D. Kachalov
f10b7ff09a Merge branch 'master' of https://bitbucket.org/nuttx/arch 2015-08-10 18:14:49 +03:00
Anton D. Kachalov
46444388fa Add Shared IRQ support for UART w/multi port. 
Signed-off-by: Anton D. Kachalov <mouse@yandex-team.ru>
 2015-08-10 18:13:35 +03:00
Gregory Nutt
c7b0a35e85 Rename sam_spi_slave_initialize to up_spi_slave_initialize for better symmety with the Master SPI interface definition 2015-08-09 17:41:55 -06:00
Gregory Nutt
ec68d00ed8 A few more cosmetic changes to the SAMV7 SPI slave driver-in-progress 2015-08-09 16:21:49 -06:00
Gregory Nutt
1fbd5351ff Fix typo in a Kconfig file 2015-08-09 15:50:04 -06:00
Gregory Nutt
c7eaa00ed4 SAMV7 SPI slave: Add output queuing and interrupt handling 2015-08-09 15:42:32 -06:00
Gregory Nutt
5f4224115a SAMV7 SPI Slave: Add a basic driver framework for SPI slave. Still a lot of missing logic 2015-08-09 12:04:43 -06:00
Gregory Nutt
7e7150899a SAMV7: Add configuration options to select SPI slave (slave driver not yet committed) 2015-08-09 09:47:06 -06:00
Gregory Nutt
05aae51c89 SAMV7 MCAN: Lock the scheduler at one critical point to avoid a possible race condition 2015-08-09 08:41:57 -06:00
Gregory Nutt
7a6bdf286e SAMV7 MCAN: Add some precautions to assue that a counting semaphore does not get out of synch 2015-08-08 08:38:52 -06:00
Gregory Nutt
a7a52252a8 SAMV7 MCAN: Fix DCACHE configuration dependency; Mkae sure DMA buffers are aligned to the cache line size at the end, Make RX FIFO1 the high priority FIFO and it it preference for RX input 2015-08-07 12:31:01 -06:00
Gregory Nutt
75ce247ed1 Use message sized defined in can.h 2015-08-07 09:01:30 -06:00
Gregory Nutt
aea94d9525 SAMV7 MCAN: Add support for all filter modes 2015-08-07 08:23:21 -06:00
Gregory Nutt
955202b895 Grr.. typos crept in during the last minute clean-up of the previous fix 8( 2015-08-06 12:50:11 -06:00
Gregory Nutt
32900bdb0b SAMV71 MCAN: Fix standard ID mask 2015-08-06 12:47:14 -06:00
Gregory Nutt
f7bcff3d12 SAMV7 MCAN: Fix filter configuration when now filters are defined. We need to accept all messages in this case 2015-08-06 11:50:41 -06:00
Gregory Nutt
86f7a58954 SAMV7 MCAN: some fixes from early testing 2015-08-06 10:24:31 -06:00
Gregory Nutt
73a96ab078 Update some function headers 2015-08-05 16:22:10 -06:00
Gregory Nutt
983df071c3 STM32V7 MCAN: CAN FD mode depends on support from the upper half driver, so it is now global CAN configuration 2015-08-05 13:55:20 -06:00