sergiotarxz/nuttx
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15932 Commits

Author SHA1 Message Date
Gregory Nutt
2481b1bfd5 Do not ignore .asm files that are tracked. 2020-07-04 17:52:42 +01:00
Xiang Xiao
95aa3a11d1 arch/tms570: Remove the unused frac variable 
and change the type of divb7 from float32_t to float

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-07-04 08:31:06 -07:00
Xiang Xiao
993591dca1 arch/x86_64: Fix Warning: ignoring changed section attributes 
chip/intel64_head.S: Assembler messages:
chip/intel64_head.S:281: Warning: ignoring changed section attributes for .text
chip/intel64_head.S:485: Warning: ignoring changed section attributes for .bss

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-07-03 10:20:39 +01:00
Xiang Xiao
b984534255 lib/math: Remove float32 and float64 definition 
since they aren't defined by standard and never supported by other POSIX OS

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-07-02 10:53:34 -03:00
Jari van Ewijk
b84ce844c6 S32K additional style fixes 2020-07-01 13:45:38 +01:00
Jari van Ewijk
3db090a210 S32K - Expand FlexTimer header file and add PWM support 2020-07-01 13:45:38 +01:00
Peter van der Perk
4a40a7c3d7 S32K148EVB netdev lateinit to support Enet & CAN at the same time 2020-06-30 12:46:50 -06:00
Peter van der Perk
eca1011b1e Expose xxx_caninitialize() correctly so it's usable in latedev init when there are multiple net devices 2020-06-30 12:46:50 -06:00
Jari van Ewijk
1306cbc16e S32K additional style fixes 2020-06-30 15:46:15 +01:00
Jari van Ewijk
86c151edf1 S32K Small Fixes: 
- Typos / wrong names in s32k14x_irq.h, s32k1xx_memorymap.h and s32k1xx_pcc.h
- Wrong base address for port input disable register in s32k1xx_pin.c
- up_* still had to be changed to arm_* in some places
 2020-06-30 15:46:15 +01:00
ligd
36a0978952 arch/risc-v/src/rv32im: update & complete risc-v rv32im arch 
1. add schedulesigaction.c
2. add SYS_save_context handling
3. Skip ECALL instruction when up_swint()

Change-Id: Id52c6dd9ee1052441957b73463c00d3fd26555c5
Signed-off-by: ligd <liguiding@fishsemi.com>
 2020-06-30 09:31:21 -03:00
Jacob Dahl
b12b3072e8 Added support for STM32F412xx. Tested with the NUCLEO-F412ZG dev board as well as a custom board using the STM32F412CE. 2020-06-29 17:44:35 +02:00
Claudio Micheli
10f93b9d9b stm32l4: extend CAN ioctrl with NART/ABOM. Add RTR to CAN header 
Signed-off-by: Claudio Micheli <claudio@auterion.com>
 2020-06-29 09:05:44 -03:00
Claudio Micheli
94e87bb6e8 stm32: extend CAN ioctrl with NART/ABOM. Add RTR to CAN header 
Signed-off-by: Claudio Micheli <claudio@auterion.com>
 2020-06-29 09:05:44 -03:00
Claudio Micheli
7a346bee26 stm32f7: Add the option to include RTR in CAN header 
Signed-off-by: Claudio Micheli <claudio@auterion.com>
 2020-06-29 09:05:44 -03:00
Beat Küng
f6039bbfa7 stm32f7: add CANIOC_SET_NART and CANIOC_SET_ABOM ioctl's to can driver 2020-06-29 09:05:44 -03:00
Matias Nitsche
861f80e853 stm32l4 RCC: configure flash wait states early, otherwise execution is corrupted when clock is increased before that 2020-06-28 13:25:05 -03:00
Matias Nitsche
c26521c38f stm32l4 dfumode: move initialization point of bootloader jump instruction to correct place 2020-06-26 09:59:40 -03:00
Matias Nitsche
d1c538b65c stm32l4: dfumode style fixes 2020-06-26 09:59:40 -03:00
Matias Nitsche
b4bea95a6a stm32l4: add support for booting into DFU mode 2020-06-26 09:59:40 -03:00
Ouss4
a7fdc4ba03 arch/arm/src/stm32/stm32f40xxx_i2c.c: Fix tracing enumeration. 
Values used in the ISR were taken from STM32F7 but the enumeration was
not updated.
 2020-06-26 09:51:09 -03:00
YAMAMOTO Takashi
05671fd8f1 vpnkit: set mac address when available 
up_vpnkit network driver gets its mac address from the vpnkit.
it isn't available until a successful negotiation with the vpnkit.
 2020-06-25 07:27:44 -05:00
YAMAMOTO Takashi
74d13d74b9 sim: Add more names to nuttx-names.in 
Some of them are for the recent development. eg. rewind, ftw
Some of them were simply missing. eg. shutdown
 2020-06-25 07:26:53 -05:00
Matias Nitsche
1115f0104b stm32l4 oneshot: style fix 2020-06-25 11:04:14 +01:00
Matias Nitsche
3c37d68735 stm32l4 oneshot: assert period > 0, otherwise the timer never fires 2020-06-25 11:04:14 +01:00
Gustavo Henrique Nihei
105d561a51 arch/arm/src/stm32f7: Refactor FMC functions for STM32F7 
This refactor is based on the FMC architecture of STM32H7, with the
exception of the board specific definitions.
 2020-06-24 10:51:02 -03:00
Gustavo Henrique Nihei
b06722cd7f boards/arm/stm32/stm32f769i-disco: Add support for external SDRAM 2020-06-24 10:51:02 -03:00
chao.an
f5039d0b23 sim: fix compile error caused by race condition 
LD: nuttx.rel
objcopy: couldn't open symbol redefinition file nuttx-names.dat
         (error: No such file or directory)
Makefile: 297: recipe for target 'nuttx.rel' failed

Change-Id: Ic78f030b77c3468ddbb96d4fb0558edad3abc3ae
Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-06-24 14:32:22 +01:00
David Sidrane
5cbebda133 kinetis:Ethernet fixed & better interrupt management 
When any error was detected the buffers descriptors were
   blindly initialized. This caused the TX of the MAC to
   be in a bad state. The correct thing to do, we disable
   the MAC, init the bufffers and re-eanable the MAC.

   The interrupts were being throlled at the NVIC. This been
   cleaned up.
 2020-06-21 14:16:26 -06:00
Huang Qi
a13ebe5975 arch/arm/stm32: Make SysTick as a Tickless clock source option 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2020-06-20 09:10:27 -03:00
David Sidrane
b64060f717 s32k1xx:flexcan clock_systimespec -> clock_systime_timespec 2020-06-19 00:27:52 +01:00
chao.an
6e8cf28e9c nuttx/names: add symbol name preprocessing support 
Change-Id: I54e0b24391b6e08801e3f0b1799ed3fcc9188ae7
Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-06-18 07:09:40 -06:00
chao.an
1a59e5ad0f sim/names: add munmap into naming list 
Change-Id: Ideb6c538fafda3f031d3a0d976da85917ba64530
Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-06-18 07:09:40 -06:00
chao.an
d96b22ae3c nuttx/names: add getchar into naming list 
Change-Id: I04b9283250bd139201b2de766f7f5f30db992434
Signed-off-by: chao.an <anchao@xiaomi.com>
 2020-06-18 07:09:40 -06:00
qiaowei
1ab98da054 nuttx-names.dat: add strstr. 
Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: Iab4bbe0ea3b12d819c790a4720d3d3c5534ad581
 2020-06-18 07:09:40 -06:00
Matias Nitsche
67ab8ebb5f style fixes 2020-06-17 13:17:38 -03:00
Matias Nitsche
b7d18585dc stm32l4: add I2C timings for 48 MHz SYSCLK 2020-06-17 13:17:38 -03:00
Matias Nitsche
fa97e216e4 stm32l4: clocking fixes (would hang for MSI@48MHz on STM32L476) 2020-06-17 13:17:38 -03:00
Peter van der Perk
6a19f03756 FlexCAN C89 Style initialization 2020-06-16 15:35:43 -03:00
Peter van der Perk
ede6225c72 NXStyle fixes 2020-06-16 15:35:43 -03:00
Peter van der Perk
efbe4c89e2 S32K1XX Enhanced EEPROM block device driver 2020-06-16 15:35:43 -03:00
Peter van der Perk
4eecf8561f FlexCAN interrupt fixes, old compiler fixes 
SocketCAN old compiler fix
 2020-06-16 15:35:43 -03:00
Gregory Nutt
ed9532e31f CONFIG_SCHED_INSTRUMENTATION_SYSCALL should not available if the architecture does not support the required system hook note hooks. 2020-06-16 14:04:53 -03:00
Matias Nitsche
7ce175b614 style fixes 2020-06-16 01:00:45 +01:00
Matias Nitsche
2bdc0c5bc8 stm32l4 ADC: on 47x/48x parts, the ACSR register needs to be configured for ADC inputs to work 2020-06-16 01:00:45 +01:00
Matias Nitsche
9786e3a1a8 style fixes 2020-06-15 23:19:51 +01:00
Matias Nitsche
3f1e89e30f stm32l4 serial fix: clock divider for baud rate was not correctly set 2020-06-15 23:19:51 +01:00
Peter van der Perk
b5c5948e1c NXStyle fixes 2020-06-15 08:07:19 -06:00
Peter van der Perk
5f73dc89be Kinetis: Added FlexCAN driver with SocketCAN support 2020-06-15 08:07:19 -06:00
Peter van der Perk
ff76ef0725 s32k1xx: Added FlexCAN driver with SocketCAN support 2020-06-15 08:07:19 -06:00