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8 Commits

Author SHA1 Message Date
Xiang Xiao
92cefb0a78 arch/risc-v: Move CSR register bit definition to csr.h 
to avoid the macro duplication

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-20 20:27:13 -08:00
Xiang Xiao
fe8122ee2b arch/risc-v: Remove duplicated declaration for up_irq_save and up_irq_restore 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-12-19 08:29:42 +09:00
Yoshinori Sugino
444a05131c arch/risc-v/include: Fix nxstyle warnings 
No functional changes
 2020-10-10 14:24:52 +01:00
Xiang Xiao
cde88cabcc Run codespell -w with the latest dictonary again 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2020-02-23 22:27:46 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189) 
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
 2020-01-31 09:24:49 -06:00
Masayuki Ishikawa
29d3ed2ec1 Feature k210 smp (#71) 
* arch: risc-v: Remove unused typedef for irqstate_t

    NOTE: irqstate_t is defined in arch/risc-v/include/types.h

  * arch: risc-v: Add typedef irqstate_t for __LP64__
  * arch: risc-v: Add SMP support to K210 (RV64GC) processor
  * boards: maxi-bit: Update READMEs and add smp/defconfig
 2020-01-10 08:04:41 -06:00
Masayuki Ishikawa
255f3008cf arch: k210: Applied changes doned for fe310 recently. 
NOTE: In the future, these code should be moved under common code
once they support both RV32 & RV64 architectures.
 2020-01-09 09:33:10 -03:00
Masayuki Ishikawa
e33fc3dc89 Squashed commit of the following: 
Author: Gregory Nutt <gnutt@nuttx.org>

    Run all .c and .h modified in PR through nxstyle.

Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>

    feature k210 (#16)

    * arch: risc-v: Add support for __LP64__ to types.h
    * arch: risc-v: Add support for RV64GC to common files
    * arch: risc-v: Add support for Kendryte K210 processor (RV64GC)
    * boards: risk-v: Add support for Sipeed Maix Bit with K210
    * tools: Add support for Kendryte K210 processor
 2019-12-31 09:06:20 -06:00