- Edited linker script for shmem to have condition according to cores selected.
- Added new configuration for nsh_cm7_rptun and nsh_cm4_rptun.
- Appended RPTUN bringup code in stm32_bringup.c
Signed-off-by: Nonpawit Ekburanawat <nonpawit.ek@gmail.com>
add configs with PCI serial console for qemu-intel64 so we can run NuttX on bare
metal Intel HW with serial port card
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
prepare 16550 UART driver to support PCI:
- [breaking change] change argument of uart_ioctl() from `struct file *filep` to `FAR struct u16550_s *priv`
Also fix moxart_16550.c build related to this change
- [breaking change] change argument of uart_getreg() and uart_putreg from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`
Also fix arch/x86/src/qemu/qemu_serial.c and arch/x86_64/src/intel64/intel64_serial.c related to this change
- [breaking change] change argument of uart_dmachan() from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`
- move `struct u16550_s` to public header
- generalize UART_XXX_OFFSET so we can use it with any register increment
- make u16550_bind(), u16550_interrupt(), u16550_interrupt() public
- remove arch/or1k/src/common/or1k_uart.c and use common 16550 MIMO interfacve
- change irq type in `struct u16550_s` from uint8_t to int to match MSI API
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
move MCR_OUT2 configuration from qemu-intel64/src/qemu_boot.c to common code
also leave this option disabled for qemu-intel64 as it's not required
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Some of PCI drivers require OS interfaces that can't be executed in the INIT context.
In that case we have to postpone PCI drivers probing and call it for example
in board initialization logic.
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
reason:
1 On different architectures, we can utilize more optimized strategies
to implement up_current_regs/up_set_current_regs.
eg. use interrupt registersor percpu registers.
code size
before
text data bss dec hex filename
262848 49985 63893 376726 5bf96 nuttx
after
text data bss dec hex filename
262844 49985 63893 376722 5bf92 nuttx
size change -4
Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
-machine virt,virtualization=on,gic-version=3 \
-net none -chardev stdio,id=con,mux=on -serial chardev:con \
-mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
enable debug messages for PCI configuration in qemu-intel64
so we know exactly what happen during execution
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
Provides two implementations:
- CSR_CYCLE: Cores which implement hardware performance monitoring.
- CSR_TIME: Uses the machine time registers.
Using the up_perf_xx bindings directory is more efficient than performing a nanosecond conversion on every gettime event.
Basic amg88xx sensor handling (open, close, read, ioctl).
No interrupts supported. I intend to add support for this feature when I
gain more know-how on nuttx/posix.
reason:
BOARDIOC_SPINLOCK can support the combined semantics
of disabling interrupts (irq), trylock, and spinlock.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Make this_cpu is arch independent and up_cpu_index do that.
In AMP mode, up_cpu_index() may return the index of the physical core.
Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
Copied spi flash files from risc-v
Removed old spiflash from make.defs
KConfig modifications for common spiflash
Added new spiflash entry to make.defs
S2 Board config update
Modifications working on S2. Need fix on ROM function
Board fixes
Deleted old spiflash files
Fixes for smartfs operation
Set new HAL version
Fixed wrong change on S3
Some domains have a lot of IPv6 addresses. Because of that, it is
not possible to get the IPv4 address with getaddrinfo.
This change separate IPv4 and IPv6 cache size limit to enable to
get both IP addresses.
This commit ensures that RTC data is properly allocated in the RTC
segment in the linker. This fixes the reported problem about using
the legacy bootloader and RTC.
After the number of threads exceeds the array size, it will not be displayed.
Any number of threads can be displayed using dynamic adaptation
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
Currently concerns only arm.
tools/ci/testlist/msys2.dat:
At the moment I only added the board nucleo-l152re:nsh
.github/workflows/build.yml:
Enabled cmake for msys2
Prior to this commit, i2c and at24 may be used uninitialized on line
113, 117, 129, and 143 when gd32_at24_wr_test() is called the second
time because these two variables are not static. I don't think making
them static is the correct fix because i2c is released at the end of
this function. Fixed by removing the `if (!initialized)` condition
surrounding the initialization of i2c and at24, making them initialized
at every call to this function.
Signed-off-by: Mingjie Shen <shen497@purdue.edu>
Description:
Example to interact with KEY button and user external button connected to PA1.
For KEY button pull-up resistor is active, board schematic does not show any pull-up or pull-down resistor.
Results: Example working as expected.
BlackPill PWM example
Description:
PWM example using PB0 - Timer3 - Channel 3
Create default configuration for the example.
Controlling_RGB_LED
Description: Controlling a RGB LED on NuttX for Black Pill board [STM32F411]
Note: Example currently not working as expected.
After changing sp, following functions calling will result
in unpredictable behavior in case of jumping
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
