Commit Graph

895 Commits

Author SHA1 Message Date
Alin Jerpelea
778f050102 arch: xtensa: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-02 03:14:31 -05:00
Gustavo Henrique Nihei
2d0e690803 xtensa/esp32: Refactor register access functions on SPI driver 2021-04-01 17:13:55 -03:00
Alin Jerpelea
3d96d5f2ce arch: esp32: Mixed Case identifier fix
Fix Mixed Case Identifier reported by nxstyle

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Alin Jerpelea
4e26e39ffe arch: xtensa: Espressif Systems: update licenses to Apache
Espressif Systems has submitted the SGA and we can migrate the licenses
 to Apache.

Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-04-01 12:13:12 -05:00
Matias N
8ed2bb8eb5 esp32: remove unneeded "INFO" and "ERROR" prefixes to syslog calls 2021-03-31 07:37:18 -03:00
Matias N
a5a435e98f esp32: remove extra initial newline on syslog call 2021-03-31 10:04:42 +01:00
Gustavo Henrique Nihei
77c5995f93 xtensa/esp32: Use essential boolean expressions on condition statements 2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
5e8eb420b7 xtensa/esp32: Fix MISO/MOSI data length field configuration
Both fields were being configured with the total number of remaining
bytes instead of the number of bytes actually bound to DMA descriptors.
2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
b4dbae1b10 xtensa/esp32: Commit setbits configuration before SPI transaction
The motivation is to avoid consistency issues when using Mixed Mode
(i.e. Polling and Interrupt/DMA transfers being used interchangeably)
2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
4d877abf3f xtensa/esp32: Avoid incrementing a NULL pointer for RX buffer 2021-03-30 01:23:02 -05:00
Gustavo Henrique Nihei
a27d5b1063 xtensa/esp32: Remove useless pointer check in SPI DMA exchange 2021-03-30 01:23:02 -05:00
Brennan Ashton
0a3b20e546 syslog: Drop extra carriage return from syslog calls 2021-03-28 21:24:00 -05:00
Gustavo Henrique Nihei
96037f01d5 xtensa/esp32: Clean up unused include headers from DMA driver 2021-03-26 23:40:44 -05:00
Gustavo Henrique Nihei
d3342795a8 xtensa/esp32: Fix wrong math round operation on DMA init 2021-03-26 23:40:44 -05:00
Gustavo Henrique Nihei
eb505ed866 xtensa/esp32: Fix DMA burst mode being unintendedly disabled 2021-03-26 23:39:53 -05:00
Sara Souza
59313c86d1 xtensa/esp32: Adds oneshot timer driver. 2021-03-24 16:01:26 -03:00
chenwen
f54aef9977 xtensa/esp32: Support esp32 wireless ioctl cmd 2021-03-23 16:29:52 -03:00
Abdelatif Guettouche
fcafacb9a3 esp32_allocateheap.c: Adjust the region of the heap coming from the
external memory when a BSS section is allowed to reside there.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-23 16:39:01 +09:00
Abdelatif Guettouche
cc23bdeca4 boards/xtensa/esp32: Add a section in external memory to hold some BSS
data.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-23 16:39:01 +09:00
YAMAMOTO Takashi
37300a43a5 esp32_part_ioctl: Return -ENOTTY for unknown commands
It's traditional to use ENOTTY for this purpose.
Littlefs seems to rely on this behavior for BIOC_FLUSH.

Also, drop the log level.
2021-03-22 19:49:27 -07:00
Gustavo Henrique Nihei
e4efa9dfa7 xtensa/esp32: Fix interrupt flag configuration for DMA transfers
Previously SPI interrupts were enabled on DMA initialization. But since
the addition of SPI Mixed mode it created a side-effect, breaking
polling transfers. So now interrupts are enabled before the DMA
transactions and disabled once they are finished.
Furthermore, the transaction done flag is also cleared before a new
transaction starts.
2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
20d24fe148 xtensa/esp32: Fix esp32_spi_setbits for Polling when DMA is also enabled
Commit 6382b2ba introduced the possibility of using SPI in Mixed mode,
i.e. performing SPI transfers via both polling and interrupts. However,
setbits was only applying the configuration if DMA was not enabled.
2021-03-21 00:16:59 -07:00
Gustavo Henrique Nihei
27e2da33b4 xtensa/esp32: Fix buffer size word-alignment for DMA transfers 2021-03-20 19:23:44 -07:00
Gustavo Henrique Nihei
bfc551484a xtensa/esp32: Clean up esp32_dma_init code
Removed "isrx" parameter whose only purpose is to trigger an assertion
on DEBUG builds. Also performed a minor refactor.
2021-03-20 19:23:44 -07:00
Gustavo Henrique Nihei
dc7a0b0a5c xtensa/esp32: Use Polling instead of DMA for transfers below threshold
Also refactored code to remove a confusing duplicate "dma_chan" field
which had the same purpose of the "use_dma" boolean.
2021-03-19 23:13:32 -07:00
Abdelatif Guettouche
27d5c9340a esp32_allocateheap.c: Don't allocate the ROM CPU regions the same way in
QEMU, the image is different.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-18 11:28:36 +09:00
Jiuzhu Dong
e96c8b9283 fs: allocate file/socket dynamically
Change-Id: I8aea63eaf0275f47f21fc8d5482b51ffecd5c906
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-03-17 06:46:42 -07:00
Dong Heng
b2f5031e96 xtensa/esp32: Refactor ESP32 WiFi driver to support station and softAP coexistence 2021-03-16 10:20:59 -03:00
Abdelatif Guettouche
28160823b6 arch/xtensa/esp32: ~6KB of memory at address 0x3ffae6f0 is not used by
the ROM bootloader, add that to the heap as well.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
8389e83742 esp32/memory_layout.h: Update the layout taking under consideration the
changes to the heap regions and to the internal heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
9cfc30fa85 memory_layout.h: Fix the start of region2 when a QEMU image generation
is enabled.

That region is technically part of the PRO CPU and we should be able to
allocate it early.  However, QEMU uses a slightly different bootloader
image that uses the same part for both CPU.  So, when APP CPU starts
during the SMP bring up it will corrupt some data.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
7fbc350589 xtensa/esp32: Warn about unused memory regions.
In case CONFIG_MM_REGIONS doesn't include all the available memory
regions the user will have a warning to increase it.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
5c7d041b91 arch/xtensa/esp32: In SMP case move the internal memory to region 3.
Region 2 is only 15KB in SMP, so we don't have enough memory to play
with.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
cba44928d2 arch/xtensa/esp32: Part of the ROM regions in middle of DRAM are not
used, retrieve them as heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
a68a39c785 xtensa/esp32: Move internal heap to the beginning of region 2.
Internal heap was occupying the region straight after .data up to
HEAP_REGION1.  The issue with this is if static allocation is large,
we'll end up with too little memory left for the internal heap.
Moving it to the beginning of region 2 gives us more room to play with.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-16 16:22:08 +09:00
Sara Souza
4ca0c6e3c8 xtensa/esp32: timer driver refactor 2021-03-14 20:22:36 -03:00
Alin Jerpelea
bd94263a33 arch: Makefile: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-13 05:56:43 -08:00
Abdelatif Guettouche
7d406c9f9f xtensa_backtrace.S: Fix the file header.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-11 21:24:01 +08:00
YAMAMOTO Takashi
16d3e787de xtensa hostfs: Make host_stat populate st_size
A clumsy implementation using lseek.
This would allow more applications to use hostfs directly.

Tested lightly with CONFIG_EXAMPLES_STAT.
2021-03-10 14:15:24 +08:00
Gustavo Henrique Nihei
330eff36d7 sourcefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Gustavo Henrique Nihei
47cb41c92f makefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Dong Heng
2f4e1c02de xtensa/esp32: Add WPA2 Enterprise and WPA3 support 2021-03-09 11:20:34 -03:00
YAMAMOTO Takashi
e05762c488 esp32/memory_layout.h: Replace Gregory Nutt's copyright notice
The old copyright notice was inherited from esp32_allocateheap.c.
The new copyright notice was copy-and-pasted from sched_getcpu.c.
2021-03-05 10:15:52 +00:00
YAMAMOTO Takashi
3857d7491f esp32: Extract memory layout definitions to a separate header 2021-03-05 10:15:52 +00:00
Gustavo Henrique Nihei
cd02fd1700 xtensa/esp32: Add support for I2C tracing 2021-03-04 22:09:37 +00:00
Gustavo Henrique Nihei
1aebe47c71 xtensa/esp32: Use OR operation when configuring pin driver 2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
23f0d8c17b xtensa/esp32: Fix default GPIO function when no option is provided 2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
9c366aad94 xtensa/esp32: Allow pin to be configured as Input and Output simultaneously 2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
210a77de93 xtensa/esp32: Configure GPIO as INPUT only when required 2021-03-04 16:36:48 +00:00
Gustavo Henrique Nihei
f5342d00fc xtensa/esp32: Fix Kconfig file formatting 2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
984e0f0ec9 xtensa/esp32: Add missing option for I2C reset 2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
79ea96a1d0 xtensa/esp32: Fix ESP32_I2C option bringing the char driver 2021-03-04 16:31:51 +00:00
Gustavo Henrique Nihei
5e9e2bec32 xtensa/esp32: Change I2C SCL default pin to a valid one
Current default pin for I2C SCL is not available for mapping with IOMUX
peripheral.
2021-03-03 19:00:15 -08:00
Abdelatif Guettouche
77302f9d3a xtensa/esp32: Add more flash options to esptool.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-03-03 18:28:18 -08:00
ligd
f9d20ea4d2 sigdeliver: fix system block when kill signal to idle in SMP
Bug description:

CONFIG_SMP=y

Suppose we have 2 cores in SMP, here is the ps return:

PID GROUP CPU PRI POLICY TYPE    NPX STATE     STACK   USED  FILLED COMMAND
  0     0   0   0 FIFO   Kthread N-- Assigned 004076 000748  18.3%  CPU0 IDLE
  1     0   1   0 FIFO   Kthread N-- Running  004096 000540  13.1%  CPU1 IDLE

nsh> kill -4 0
or:
nsh> kill -4 1

system blocked.

Reason:

In func xx_sigdeliver() restore stage, when saved_irqcount == 0, that means
rtcb NOT in critical_section before switch to xx_sigdeliver(), then we need
reset the critical_section state before swith back.

Fix:

Add condition to cover saved_irqcount == 0.

Change-Id: I4af7f95e47f6d78a4094c3757d39b01ac9d533b3
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-03-03 15:03:32 +00:00
chenwen
19627095e4 esp32/esp32_allocateheap.c: Support the maximum available internal heap configuration 2021-03-02 18:27:20 -08:00
chenwen
516c553b97 esp32/esp32_wifi_adapter.c: Fix the issue of WiFi internal malloc from PSRAM 2021-03-02 18:27:20 -08:00
YAMAMOTO Takashi
c230edea29 esp32_ummap: write back spiram cache before calling Cache_Flush
This seems to fix esp32_readdata_encrypted() with spiram "buffer".

Note: I'm not sure if this is the right fix or not.
I couldn't find any documentation about Cache_Flush.
2021-03-02 08:37:50 +00:00
Gustavo Henrique Nihei
ed0a1b724b xtensa/esp32: Fix typos reported by codespell 2021-02-25 15:02:15 +00:00
YAMAMOTO Takashi
ee8cea1f4b esp32: xtensa_user: Implement a few more instructions
You can find them used in the ROM version of memcpy.
While it might be controversial if it's a good idea to use the ROM version
of these functions, it's nicer to support more instructions here anyway.
2021-02-24 10:34:55 +00:00
Masayuki Ishikawa
e87d14721e arch: xtensa: Fix stack coloring
Summary:
- Call up_stack_color() correctly in the up_create_stack()
- Fix nwords calculation in up_stack_color()
- Also, refactor up_stack_color()
- Fix do_stackcheck() to consider stack alignment

Impact:
- Only for CONFIG_STACK_COLORATION=y

Testing:
- Tested with esp32-devkitc:wapi_smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-18 19:05:07 -08:00
Masayuki Ishikawa
3ddfab239f arch: xtensa: Fix a compile warning in xtensa_dumpstate.c
Summary:
- This commit fixes a compile warning if CONFIG_ARCH_INTERRUPTSTACK is set

Impact:
- None

Testing:
- Built with esp32-devkitc:smp

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-18 09:11:27 +00:00
Masayuki Ishikawa
102adaf026 arch: esp32: Fix a memory leak when discarding a large packet.
Summary:
- Recently I noticed that ESP32-DevKitC-32D suddenly stops
  during receiving ping packets from PC after 10-20mins
- Actually, sometimes memory leak happened when some device
  sent a big broadcast packet periodically on the network
- This commit fixes this issue by calling esp_wifi_free_eb()
  in the case that the packet exceeds WLAN_BUF_SIZE.
- Also, this commit applies the same logic in the case that
  the Wi-Fi interface is down

Impact:
- None

Testing:
- Tested with esp32-devkitc:wapi

Suggested-by: YAMAMOTO Takashi <yamamoto@midokura.com>
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-17 12:55:08 +09:00
YAMAMOTO Takashi
aed24f1255 esp32: Retire XTENSA_IMEM_PROCFS
Now /proc/meminfo has the equivalent.
2021-02-12 03:16:03 -08:00
YAMAMOTO Takashi
7bb849535c esp32_modtext.c: Report the usage with procfs_register_meminfo 2021-02-12 03:16:03 -08:00
YAMAMOTO Takashi
c51e2a0cb3 esp32_imm.c: Report the usage with procfs_register_meminfo 2021-02-12 03:16:03 -08:00
Alan C. Assis
f56ff40101 Add esp32_gpio_matrix_in/out to replace ROM functions 2021-02-11 20:39:51 +00:00
chenwen
dcec04f5b2 xtensa/esp32: Writeback PSRAM data when mapping SPI Flash address to ESP32's address bus 2021-02-09 08:26:45 -03:00
YAMAMOTO Takashi
2220827463 esp32_allocateheap.c: Add a sanity check 2021-02-09 07:51:12 +00:00
YAMAMOTO Takashi
63c08a79be esp32_allocateheap.c: Add a comment 2021-02-09 07:51:12 +00:00
Gustavo Henrique Nihei
a8cf8abfaa esp32: Create chip selection config to improve capabilities refinement 2021-02-08 21:17:22 +00:00
Masayuki Ishikawa
d87f350831 arch, boards, drivers, include, sched, wireless: Change spinlock APIs.
Summary:
- This commit changes spinlock APIs (spin_lock_irqsave/spin_unlock_irqrestore)
- In the previous implementation, the global spinlock (i.e. g_irq_spin) was used.
- This commit allows to use caller specific spinlock but also supports to use
  g_irq_spin for backword compatibility (In this case, NULL must be specified)

Impact:
- None

Testing:
- Tested with the following configurations
- spresnse:wifi, spresense:wifi_smp
- esp32-devkitc:smp (QEMU), sabre6-quad:smp (QEMU)
- maxi-bit:smp (QEMU), sim:smp
- stm32f4discovery:wifi

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-02-07 21:28:56 -08:00
Gustavo Henrique Nihei
29b9cf652e xtensa/esp32: Add extern modifier to ROM function declaration 2021-02-05 14:05:44 -03:00
Abdelatif Guettouche
685c2ce506 esp32_spiflash.c: Fix preprocessor condition.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-02-05 12:16:55 -03:00
Alan C. Assis
c4f87977dc xtensa/esp32: Fix cache issue detected by DEBUG_ASSERTION 2021-02-04 21:22:01 +00:00
Alan C. Assis
bf384a7e33 esp32/psram: Fix missing configs 2021-01-28 05:14:36 -08:00
Abdelatif Guettouche
82aae4deb6 esp32/esp32_wifi_adapter.c: Print debug output only when DEBUG_WIRLESS*
are enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-28 07:51:31 +09:00
Abdelatif Guettouche
6bc070024d arch/xtensa/Kconfig: Reduce the default value of the internal memory.
The static memory is now divided at almost the middle to not override
the ROM data.  The old 0x28000 will take all of what's left for heap
region1.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-27 09:49:58 -08:00
Masayuki Ishikawa
b9d4bd0854 arch: esp32: Fix compile errors with CONFIG_SMP=y
Summary:
- This commit fixes compile errors in esp32_spiflash.c and
  esp32_wifi_adapter.c with CONFIG_SMP=y

Impact:
- SMP only

Testing:
- Tested with esp32-devkitc:wapi
- NOTE: the following configs need to be added.
  +CONFIG_SMP=y
  +CONFIG_SMP_IDLETHREAD_STACKSIZE=3072
  +CONFIG_SMP_NCPUS=2
  +CONFIG_SPINLOCK_IRQ=y

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-01-27 04:47:05 -08:00
Alan C. Assis
6a87b85285 xtensa/esp32: Add efuse driver 2021-01-26 18:23:43 -08:00
Abdelatif Guettouche
6bf826acca arch/xtensa/src/esp32/esp32_spiflash.c: Fix the value of the page start
address.
It was incorrectly taken from the size.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-26 15:27:16 -03:00
Xiang Xiao
94da3e4c3a arch: Remove critical section inside up_schedule_sigaction
since nxsig_tcbdispatch already hold it for us

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2fe6ad840bdca3ec0eaa76a9af3b6929c7d5a721
2021-01-22 08:34:07 +01:00
Alan C. Assis
394cfba1d8 Fix himem debug assert error 2021-01-22 00:00:04 +01:00
Dong Heng
4bbc17454c xtensa/esp32: Add AES hardware accelerator driver 2021-01-21 15:06:35 -03:00
Abdelatif Guettouche
c87e5965b7 xtensa/esp_allocateheap.c: Correct ROM memory boundries.
SMP was broken because the ROM memory wasn't set correctly.  Some
regions were shared with the ROM code.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-21 11:13:19 -03:00
YAMAMOTO Takashi
a4a2d5ff7d esp32_dma_init: Fix a dubious assertion
Requiring the size to be a multiple of 3 is a very strange restriction.
It doesn't even work with the default value of SPI_SLAVE_BUFSIZE.
I guess it was a typo.
2021-01-21 10:51:46 +01:00
YAMAMOTO Takashi
8c02b366f8 esp32_free_cpuint: Fix an assertion
The original assertion was wrong because:

* cpuint numbers for edge interrupts are not dense
  (while ESP32_CPUINT_NEDGEPERIPHS is 4, EPS32_CPUINT_EDGESET is not 0xf.)

* This function is used for level interrupts too
2021-01-21 10:37:03 +01:00
Dong Heng
eb2937003b xtensa/esp32: Fix ESP32 SPI driver issues
1. reset SPI hardware when deinitializing
2. reset SPI priavte configuration data when deinitializing
3. free interrupt when deinitializing
2021-01-18 12:54:12 +01:00
Dong Heng
4693857b2c xtensa/esp32: Fix ESP32 I2C driver issues
1. when sending a message in a group fails, exit immediately
2. when catch I2C error interrupt, close interrupt
3. clear clock configuration when deinit I2C
4. free I2C interrupt when deinit I2C
2021-01-18 09:23:47 +01:00
Abdelatif Guettouche
c00141c41a arch/xtensa/Kconfig: The ESP32 has a different numbers for vectors and
IRQs.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-15 09:47:33 +01:00
Abdelatif Guettouche
8e4397968c net/ & esp32/wlan: Fix some typos and nxstyle issues.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-01-14 07:57:27 -06:00
YAMAMOTO Takashi
ca0932f842 esp32_i2c.c: Remove useless casts 2021-01-13 11:04:59 +01:00
Xiang Xiao
0536953ded Kernel module should prefer functions with nx/kmm prefix
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-13 08:57:58 +01:00
Dong Heng
7a953bb154 xtensa/esp32: Fix ESP32 SPI3 slave ops data error 2021-01-11 09:10:18 +01:00
ligd
f63db66382 mqueue: add file_mq_xx for kernel use
Change-Id: Ida12f5938388cca2f233a4cde90277a218033645
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-01-05 02:40:43 -06:00
Dong Heng
fadae0bf39 xtensa/esp32: Fix ESP32 serial UART tx ready check error 2021-01-04 09:19:53 +01:00
Sara Souza
65f39fc0c7 xtensa/esp32: Added driver api to reload counter instantly 2020-12-28 12:08:27 +01:00
Sara Souza
6a6121378c xtensa/esp32: Fixed wdt typos 2020-12-22 20:32:38 +01:00
YAMAMOTO Takashi
0fbfc4c44c esp32_wifi_adapter.c: file mode for open doesn't make sense for O_RDONLY 2020-12-22 03:37:29 -06:00
Huang Qi
073912e232 Replace all wget with curl
wget is missing from some system (like macOS and Windows native),
it's better to use curl to simplify build environment.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2020-12-22 03:36:10 -06:00
Masayuki Ishikawa
ec73a4e69c arch & sched: task: Fix up_exit() and nxtask_exit() for SMP
Summary:
- During repeating ostest with sabre-6quad:smp (QEMU),
  I noticed that pthread_rwlock_test sometimes stops
- Finally, I found that nxtask_exit() released a critical
  section too early before context switching which resulted in
  selecting inappropriate TCB
- This commit fixes this issue by moving nxsched_resume_scheduler()
  from nxtask_exit() to up_exit() and also removing
  spin_setbit() and spin_clrbit() from nxtask_exit()
  because the caller holds a critical section
- To be consistent with non-SMP cases, the above changes
  were done for all CPU architectures

Impact:
- This commit affects all CPU architectures regardless of SMP

Testing:
- Tested with ostest with the following configs
- sabre-6quad:smp (QEMU, dev board), sabre-6quad:nsh (QEMU)
- spresense:wifi_smp
- sim:smp, sim:ostest
- maix-bit:smp (QEMU)
- esp32-devkitc:smp (QEMU)
- lc823450-xgevk:rndis

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-21 23:29:56 -06:00
Abdelatif Guettouche
81a9eb190d arch/xtensa/src/esp32/esp32_spiflash.c: Invalidate the cache and
writeback PSRAM data if the flash address used has a cache mapping.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-18 16:43:52 -03:00
chao.an
4a559807a5 arch/netdev: try tcp timer in every txavail call
In the current implementation, the first transmission of the new
connection handshake is depends entirely by tcp_timer(), which will
caused 0.5s - 1s delay each time in connect().

This patch is mainly to improve the performance of TCP handshake.

Original:

nsh> tcp_client
[    1.536100] TCP connect start.
[    2.000200] TCP connect end. DIFF: tick: 4641, 464ms.
[    3.000300] TCP connect start.
[    4.000400] TCP connect end. DIFF: tick: 10001, 1000ms.
[    5.000500] TCP connect start.
[    6.000600] TCP connect end. DIFF: tick: 10001, 1000ms.
[    7.000700] TCP connect start.
[    8.000800] TCP connect end. DIFF: tick: 10001, 1000ms.

Optimized:

nsh> tcp_client
[    3.263600] TCP connect start.
[    3.263700] TCP connect end. DIFF: tick: 1, 0ms.
[    4.263800] TCP connect start.
[    4.263800] TCP connect end. DIFF: tick: 0, 0ms.
[    5.263900] TCP connect start.
[    5.263900] TCP connect end. DIFF: tick: 0, 0ms.
[    6.264000] TCP connect start.
[    6.264000] TCP connect end. DIFF: tick: 0, 0ms.
[    7.264100] TCP connect start.
[    7.264100] TCP connect end. DIFF: tick: 0, 0ms.

Signed-off-by: chao.an <anchao@xiaomi.com>
2020-12-18 14:16:11 +09:00
YAMAMOTO Takashi
48ba0bb30a esp32_wifi_adapter.c: Fix a use-after-free bug 2020-12-17 03:24:15 -06:00
YAMAMOTO Takashi
75bc489e24 esp32: Fix phy_printf
Fix the following error:

CC:  chip/esp32_wifi_adapter.c
In file included from /Users/yamamoto/git/nuttx/nuttx/include/nuttx/mm/shm.h:45,
                 from /Users/yamamoto/git/nuttx/nuttx/include/nuttx/sched.h:42,
                 from /Users/yamamoto/git/nuttx/nuttx/include/sched.h:35,
                 from /Users/yamamoto/git/nuttx/nuttx/include/stdio.h:48,
                 from chip/esp32_wifi_adapter.c:28:
chip/esp32_wifi_adapter.c: In function 'phy_printf':
chip/esp32_wifi_adapter.c:3952:10: error: expected ')' before 'format'
   wlinfo(format, arg);
          ^~~~~~
2020-12-17 03:24:15 -06:00
Sara Souza
1acba417c4 xtensa/esp32: enables started flag if the wdt was turned on in bootloader 2020-12-16 16:35:55 -03:00
Sara Souza
71715aaee8 xtensa/esp32: fixes enable int function and gets apb clk frequency through function 2020-12-16 10:48:02 -03:00
Sara Souza
add46d0408 xtensa/esp32: Added support for RTC WDT 2020-12-16 14:37:39 +01:00
Sara Souza
be12c79c52 xtensa/esp32: Changes in rtc driver to support rtc wdt driver 2020-12-16 14:37:39 +01:00
Abdelatif Guettouche
ecede04263 arch/*/src/Makefile: Generate dependencies for head files.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-15 21:00:52 -06:00
Xiang Xiao
625eef20f0 arch: Remove the special check for idle thread in up_use_stack
since the idle thread don't call up_use_stack anymore

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-16 09:54:29 +09:00
Xiang Xiao
efee1c6ded arch: Initialize the idle thread stack info directly
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-12-16 09:54:29 +09:00
YAMAMOTO Takashi
cb71469f85 esp32: Fix a typo. ESP_SPIRAM_BOOT_INIT -> ESP32_SPIRAM_BOOT_INIT 2020-12-15 02:07:05 -06:00
John Bampton
ba12c6c0cf Fix spelling 2020-12-12 19:18:08 +01:00
Sara Souza
6244924c3e Removed initconf from esp32_wtd_ops_s 2020-12-10 20:31:15 -06:00
Sara Souza
2a9dab2e5d xtensa/esp32: allows the rtc wdt to be configured in bootloader and used later 2020-12-10 20:31:15 -06:00
Abdelatif Guettouche
f7c5b467e1 arch/xtensa/src/esp32: Remove the EXPERIMENTAL config from the Wireless.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-10 12:31:17 -06:00
Abdelatif Guettouche
56713e0304 arch/xtensa/src/esp32/Make.defs: Don't condition including the low level
WDT driver with the upper layer driver.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-10 12:31:17 -06:00
Abdelatif Guettouche
3ba5018b37 boards/xtensa/esp32: A bit of re-organisation in the ESP32 boards.
Move the common files into the common directory.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-10 12:31:17 -06:00
Masayuki Ishikawa
409c65ce0b arch, sched: Fix global IRQ control logics for SMP
Summary:
- This commit fixes global IRQ control logic
- In previous implementation, g_cpu_irqset for a remote CPU was
  set in sched_add_readytorun(), sched_remove_readytorun() and
  up_schedule_sigaction()
- In this implementation, they are removed.
- Instead, in the pause handler, call enter_critical_setion()
  which will call up_cpu_paused() then acquire g_cpu_irqlock
- So if a new task with irqcount > 1 restarts on the remote CPU,
  the CPU will only hold a critical section. Thus, the issue such as
  'POSSIBLE FOR TWO CPUs TO HOLD A CRITICAL SECTION' could be resolved.
- Fix nxsched_resume_scheduler() so that it does not call spin_clrbit()
  if a CPU does not hold a g_cpu_irqset
- Fix nxtask_exit() so that it acquires g_cpu_irqlock
- Update TODO

Impact:
- All SMP implementations

Testing:
- Tested with smp, ostest with the following configurations
- Tested with spresense:wifi_smp (NCPUS=2,4)
- Tested with sabre-6quad:smp (QEMU, dev board)
- Tested with maix-bit:smp (QEMU)
- Tested with esp32-core:smp (QEMU)
- Tested with lc823450-xgevk:rndis

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-12-10 08:33:42 +01:00
Abdelatif Guettouche
5d7428a385 arch/xtensa: Fix alignement when coloring and checking the stacks.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
7075c98978 arch/xtensa: Add a pseudo save area to be able to backtrace from
interrupts

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
1f96f42f1e arch/xtensa/include/irq.h: Reserve some space for interptee's BSA.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
368d21a0b9 arch/xtensa/src/common/xtensa_context.S: Name A3 register the usual way.
i.e. a3 instead of r3.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
5f9d9ba44c arch/xtensa/src/common/xtensa_context.S: Don't save CALL0 ABI
callee-saved registers.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
Abdelatif Guettouche
716a29ebeb arch/xtensa/src/common/xtensa_backtrace.S: Update the comments to show
the functions in play during the backtrace.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-12-09 09:44:04 -03:00
YAMAMOTO Takashi
58fdaa5c2d arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a syslog format 2020-12-05 08:13:32 -06:00
Dong Heng
3bb9a42c6b xtensa/esp32: Refactor ESP32 Wi-Fi driver 2020-12-04 09:39:11 -03:00
Alan C. Assis
3865960b89 esp32/esp32-core: Fix #ifdef warning and update MM_SECTIONS 2020-12-01 21:36:07 +01:00
Abdelatif Guettouche
298e1ddebf arch/xtensa/src/common: Don't include ESP32 files directly, include them
from the chip simlink.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-28 10:24:12 -03:00
Abdelatif Guettouche
967fbebcb9 arch/xtensa: Fix stack's alignment
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-28 10:24:12 -03:00
chao.an
32ba194372 style/code: remove unnecessary trailing whitespace
N/A

Signed-off-by: chao.an <anchao@xiaomi.com>
2020-11-28 12:20:30 +01:00
chao.an
049c991d28 style/Kconfig: remove unnecessary trailing whitespace
N/A

Signed-off-by: chao.an <anchao@xiaomi.com>
2020-11-28 12:20:30 +01:00
chao.an
c56785bd0d style/Makefile: remove unnecessary trailing whitespace
N/A

Signed-off-by: chao.an <anchao@xiaomi.com>
2020-11-28 12:20:30 +01:00
chenwen
cb8d267230 xtensa/esp32: Announce the power management state change to feed watchdog 2020-11-25 10:53:05 -03:00
chenwen
2991418b2e xtensa/esp32: keep cpu clock while configured cpu clock is consistent with the default 2020-11-25 10:53:05 -03:00
chenwen
39322e1158 xtensa/esp32: Get CPU frequency from the rtc register 2020-11-25 10:53:05 -03:00
chenwen
1847a67e05 xtensa/esp32: Add sleep reject reasons 2020-11-25 10:53:05 -03:00
chenwen
5c5e0494f3 xtensa/esp32: Keep VDDSDIO power on if PSRAM is enabled 2020-11-25 10:53:05 -03:00
Masayuki Ishikawa
b237748f50 Revert "arch: xtensa: Fix the pause handler for SMP"
This reverts commit 1914aac05f.
2020-11-25 00:02:37 +01:00
YAMAMOTO Takashi
a24f66f31f arch/xtensa/src/esp32/esp32_spi.c: Fix a syslog format 2020-11-22 19:01:05 -08:00
YAMAMOTO Takashi
2aced358a8 arch/xtensa/src/esp32/esp32_wtd_lowerhalf.c: Fix a syslog format 2020-11-22 19:01:05 -08:00
Alan C. Assis
31c14726d5 Replace all assert() with DEBUGASSERT() 2020-11-22 07:43:04 -08:00
Alan C. Assis
3352d3863c esp32_himem: Fix issue that was preventing to map all free memory 2020-11-22 07:43:04 -08:00
Matias N
d5b6ec450f Parallelize depend file generation 2020-11-22 09:02:59 -03:00
Abdelatif Guettouche
fc5874ad75 arch/xtensa/src/common/xtensa_createstack.c: Fix stack alignement.
The required stack alignement is 16 bytes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
56198992e5 arch/xtensa/src/common/xtensa_windowspill.S: Remove the #if 0 to include
the spill function.  It's now needed.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
f80ed10f97 arch/xtensa/src/esp32/chip_memory.h: Chip implementation of memory test
functions needed by the arch.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-21 11:31:46 -03:00
Abdelatif Guettouche
9d28687b6f arch/xtensa: Print backtrace on assertions.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-21 11:31:46 -03:00
Masayuki Ishikawa
1914aac05f arch: xtensa: Fix the pause handler for SMP
Summary:
- Apply the same logic added to cxd56_cpupause.c

Impact:
- SMP only

Testing:
- Tested with esp32-core:smp (QEMU)
- Run smp and ostest

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-11-20 00:49:25 -08:00
Abdelatif Guettouche
79b07e6c94 arch/xtensa/src/esp32/esp32_gpio.c: Fix GPIO IRQ assert condition.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-19 07:38:59 -08:00
YAMAMOTO Takashi
b8e559bb2e xtensa: Add _intmax_t and _uintmax_t 2020-11-19 00:49:56 -08:00
YAMAMOTO Takashi
c18f074830 xtensa: Change _int32_t from long to int to match the compiler
PRIx32 etc is already "x" etc.
2020-11-19 00:49:56 -08:00
Alan C. Assis
50e1a49c6e Fix the SPIRAM_BANKSWITCH that was defined incorrectly 2020-11-18 22:21:53 +01:00
Alan C. Assis
f09d103528 xtensa/esp32: Add high memory support to work with PSRAM 2020-11-18 22:21:53 +01:00
Abdelatif Guettouche
2d7e063eb0 arch/xtensa/src/esp32/esp32_tim.c: Fix build when debug is enabled.
A non-existent variable was used.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-17 18:46:06 -08:00
YAMAMOTO Takashi
95a3db7629 arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a type mismatch 2020-11-16 08:29:00 -08:00
YAMAMOTO Takashi
dbb81dfd5d arch/xtensa/src/esp32/esp32_wifi_adapter.c: Fix a printf format 2020-11-16 08:29:00 -08:00
Sara Souza
e6b6f06d22 xtensa/esp32: added support to automonitor by capture 2020-11-13 13:01:40 -03:00
Dong Heng
bfb5214ef8 xtensa/esp32: Add SPI Flash hardware encryption I/O support 2020-11-13 08:37:59 +01:00
Sara Souza
b9d44017cf xtensa/esp32: Watchdog support (MWDTs) 2020-11-08 13:05:24 -03:00
Abdelatif Guettouche
2ac2ce55d2 arch/xtensa/src/esp32/esp32_allocateheap.c: Fix the memory regions with
regards to the data used by the ROM.
Static alloaction sections should end at the begining of the ROM data.
The rest of memory (End of ROM data --> End of DRAM) is added to the
heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-11-06 18:36:41 -03:00
Alan C. Assis
2f612a2077 xtensa/esp32: Move #if defined(SPIRAM) to inside function 2020-11-06 16:19:48 +01:00
Alan C. Assis
d11f02d772 xtensa/esp32: Fix remaining SEPARATE typo 2020-11-06 16:19:48 +01:00
Alan C. Assis
6c37d9ff80 xtensa/esp32: Avoid init PSRAM when SPIRAM is not enabled 2020-11-06 16:19:48 +01:00
YAMAMOTO Takashi
6bc93b87b0 xtensa inttypes.h: Remove PRI/SCN macros for fast and least types 2020-11-05 18:49:22 -08:00
Dong Heng
483b145f3b xtensa/esp32: Fix rt-timer issues
1. function "stop" should really stop repeat timer
2. delete timer really in rt-timer task to avoid resource being broken
3. timer triggers when stopping/deleting it and skip it in ISR
2020-11-04 09:24:59 -03:00
Dong Heng
b54f0edff4 xtensa/esp32: Add Partition and OTA device 2020-11-03 21:54:07 +01:00
Dong Heng
c90697f193 xtensa/esp32: SPI Flash driver uses global sem for all MTD
Because all MTDs operate the main SPI Flash, so not only MTD internal
function should be mutex, but also MTDs should be mutex.
2020-11-03 09:04:02 -03:00
Juha Niskanen
a01a01ab45 arch: spi: fix typos and run nxstyle
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2020-10-31 10:40:41 -07:00
Dong Heng
a12a79fdb3 xtensa/esp32: Fix SPI master DMA RX buffer memcpy size error 2020-10-29 11:51:05 +01:00
Dong Heng
d86fd84a8e xtensa/esp32: Add real-time timer support for WiFi 2020-10-27 10:36:34 -03:00
Abdelatif Guettouche
58655d1efd arch/xtensa/src/esp32: SMP case of interruptstack.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-27 07:44:20 +09:00
Abdelatif Guettouche
c97d11aa7b arch/xtensa: Add the optional interrupt stack.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-27 07:44:20 +09:00
Abdelatif Guettouche
9b98f20969 arch/xtensa: Fix the naming of the internal heap functions. They should
be prefixed by xtensa_ instead of up_.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
34ad33c8b2 arch/xtensa/Kconfig: Add help for the seperate internal heap.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
5ac5655fa4 arch/xtensa/src/esp32/esp32_spi&spiflash: Free the correct buffer.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
0182e6e8bb arch/xtensa/src/commin/xtensa_usestack&createstack.c: Set the alignment
to be 4 bytes.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
172896728f arch/xtensa/src/esp32/esp32_spi.c: Instead of returning with no error
code, assert the return of the imm_malloc function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
2fa5d65355 arch/xtensa/src/common: Refactor the mm_ macros into a separate file.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
f0ae1dd54a arch/xtensa/src/esp32: Fix PR #1958 nxstyle issues.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7db8b920ff arch/xtensa/src/esp32/hardware: PIN_CTRL was defined twice.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
0ba0a3a092 arch/xtensa/src/esp32/hardware/esp32_soc.h: Lowercase hex value
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
b6429a50d7 arch/xtensa/src/esp32/esp32_allocateheap.c: Delete a preprocessor
warning that's not relevant anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
1b12d20225 arch/xtensa/src/esp32/esp32_spiflash.c&esp32_spi.c: Allocate a buffer from DRAM
when the given buffer is from PSRAM.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
7ac5f7a35b arch/xtensa/src/esp32: Add a PROCFS entry for the internal memory
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Abdelatif Guettouche
a1318926b4 arch/xtensa/esp32: Allow internal drivers and tasks' stack to be
allocated in an internal heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-25 20:20:01 -03:00
Yoshinori Sugino
3ac90fca79 Remove tabs and spaces at the end of lines 2020-10-24 09:38:21 +01:00
YAMAMOTO Takashi
89c9855d7b esp32: Fix a few #endif comments 2020-10-20 18:50:28 +08:00
Xiang Xiao
eb4121ce38 Change all 'Nuttx' to 'NuttX'
Unify the naming convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-10-20 01:45:06 -07:00
liuhaitao
d5c6bfe6cf arch: Add custom arch chip build support
Just like custom board build support, add custom arch chip build
support.

Change-Id: I71c87e6b2195501a1b1d728b71d7cbe344951057
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-10-20 14:48:16 +08:00
Juha Niskanen
94f0f55911 arch: serial: fix all TCGETS retrieving zero baud rate
cfsetispeed() now stores baud rate to c_cflag member of
struct termios, so it must not be overridden later on.

Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
2020-10-20 14:43:19 +08:00
YAMAMOTO Takashi
60a6d9cfe5 arch/xtensa/src/esp32/esp32_wlan.c: Fix an unused var warning
chip/esp32_wlan.c: In function 'esp_ioctl':
chip/esp32_wlan.c:1262:30: warning: unused variable 'req' [-Wunused-variable]
   struct mii_ioctl_notify_s *req;
                              ^~~
2020-10-19 21:06:07 -07:00
chenwen
67c0af650f xtensa/esp32: Add power management of deep-sleep 2020-10-17 19:38:14 -03:00
Alan C. Assis
3108233b8a Remove not needed esp32_caps.h 2020-10-17 20:02:43 +01:00
Alan C. Assis
b3905e1c03 Modify the PSRAM pins config to avoid duplicating the definitions 2020-10-17 20:02:43 +01:00
Alan C. Assis
e956c3d1d3 Fix warnings and remove not used function 2020-10-17 20:02:43 +01:00
Dong Heng
a0b84ae53e xtensa/esp32: Add ESP32 WiFi adapter and driver 2020-10-17 22:46:27 +09:00
Abdelatif Guettouche
0345b1edf7 arch/xtensa/src/esp32/Make.defs: Download Espressif's Wireless-3rdparty
library.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-17 22:46:27 +09:00
Abdelatif Guettouche
609a5fa4f0 arch/: Add the ARCH_SRC directory to the context and clean_context
targets

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-17 22:46:27 +09:00
Abdelatif Guettouche
286d947caf arch/xtensa: Fix some alingments and typos in assembly code.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-11 00:53:38 +08:00
Abdelatif Guettouche
20f701f2ec arch/xtensa/src/common/xtensa.h: Include sys/types.h to have a size_t
definition.  Otherwise the build would fail ifSTACK_COLORATION is
enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-10 00:01:17 +08:00
Abdelatif Guettouche
605a49e9af arch/xtensa/src/esp/esp32/esp32_gpio.c: Fix the function's mask test
condition and the functions' values.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-08 09:28:53 +09:00
Abdelatif Guettouche
0fdf9c7368 arch/xtensa/src/esp32/esp32_psram.c: Adapt configgpio to the latest
change.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-08 09:28:53 +09:00
Masayuki Ishikawa
6232e7f84e arch: esp32: Fix crash on startup
Summary:
- This commit fixes crash on startup introduced by commit 232aa62f03

Impact:
- Affects all use cases for esp32

Testing:
- Tested with esp32-core:smp with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-07 18:43:13 -03:00
Sara Souza
0faf861256 xtensa/esp32: Added Timer Support 2020-10-07 14:12:22 -03:00
Alan C. Assis
232aa62f03 Add support to PSRAM using SPIRAM interface 2020-10-07 16:55:34 +01:00
Abdelatif Guettouche
d1225f3110 arch/xtensa/src/esp32: Use the same function numbering as the TRM.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
5593683552 arch/xtensa/src/esp32/esp32_gpio.c: When configuring a pin pad, set the
function first, if no function was assigned, fall back to the GPIO
function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
564237a602 arch/xtensa/src/esp32/esp32_gpio: Function "SPECIAL" doesn't exist. All
pads go through the same GPIO matrix to select one of the 6 possible functions.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
efb2fd5e4b arch/xtensa/src/esp32/esp32_gpio.c: GPIO20 is not available.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:52:04 -03:00
Abdelatif Guettouche
caa945cb24 arch/xtensa/src/esp32: Add a way to retrieve reset cause.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:51:47 -03:00
Abdelatif Guettouche
c20c8c6dd5 arch/xtensa/esp32: Implement system reset.
Both CPUs are soft-reset with a call to board_reset.  This is actually a
Core Reset, so both cores and all registers are reset.  The only
exception is RTC.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 11:51:47 -03:00
Abdelatif Guettouche
2e4ec442ad arch/xtensa/src/esp32/esp32_intdecode.c: Don't clear A2, the mask
argument is passed in that register

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-07 07:47:06 +09:00
saramonteiro
a562fba971 ESP32: Fixed the type of cpuint variables in esp32_emac.c esp32_i2c.c esp32_spi.c esp32_spi_slave.c 2020-10-02 09:57:56 -07:00
Abdelatif Guettouche
62732dd6b8 arch/xtensa/src/esp32/esp32_gpio.c: ESP32_NIRQ_GPIO was used instead of
ESP32_NGPIOS

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-02 11:42:49 -03:00
Abdelatif Guettouche
844f39fc67 arch/xtensa/src/esp32/esp32_gpio.c: Change the logic of setting the ENA
bits so that the call to up_cpu_index is only performed when SMP is
enabled.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-10-02 11:42:49 -03:00
Abdelatif Guettouche
769d68a762 arch/xtensa: Fix some typos and correct some comments.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-30 13:55:28 -03:00
Masayuki Ishikawa
68f102055a arch: xtensa: Fix up_interrupt_context() for SMP
Summary:
- Apply the same fix for Arm SMP

Impact:
- Affects SMP only

Testing:
- Tested with esp32-core:smp (qemu)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-30 08:32:25 -06:00
Dong Heng
a266dc9629 arch/xtensa: Fix task signal process preemption A0 modification error 2020-09-29 09:10:53 -03:00
Abdelatif Guettouche
70c1170c2e Revert "arch/xtensa/src/esp32/esp32_gpio.c: Enable input mode only when"
This reverts commit b5d3ba64e0.
2020-09-29 09:07:41 -03:00
Abdelatif Guettouche
a128995eab arch/xtensa: Few typos and style fixes.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-21 19:14:19 -04:00
chenwen
64e2f102ac xtensa/esp32: Add power management of force-sleep 2020-09-20 17:23:07 +01:00
Xiang Xiao
bf7399a982 arch: Initialize idle thread stack information
and remove the special handling in the stack dump

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia1ef9a427bd4c7f6cee9838d0445f29cfaca3998
2020-09-16 06:57:29 -07:00
Matias N
166242c171 use "export" to expose TOPDIR to all child make instead of passing it around every time 2020-09-15 21:11:33 -07:00
Abdelatif Guettouche
d47131d8ae arch/xtensa/src/esp32/hardware/esp32_spi.h: Remove a leftover license. 2020-09-15 14:40:17 +08:00
Abdelatif Guettouche
55f7473ba0 arch/xtensa/src/esp32/esp32_spiflash.c: #if0-out unused functions.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 14:40:17 +08:00
Abdelatif Guettouche
a97a9aeaf6 arch/xtensa/src/esp32/esp32_spiflash.c: File scope global variables are
prefixed with g_

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-15 14:40:17 +08:00
Matias N
3d1159007f Remove extra application of EXTRAFLAGS and KDEFINE and the arch-level
EXTRAFLAGS is already applied to *FLAGS in board's Make.defs (and
it applies to whole build, not just arch-code). EXTRAFLAGS is passed
around each make call to the complete build.

KDEFINE is already added to EXTRAFLAGS in main Makefile so no need
to add it again in arch-level Makefile
2020-09-14 13:59:57 +09:00
Abdelatif Guettouche
c27bf32ce9 arch/xtensa/src/esp32/Kconfig: Add the SPI FLASH title to make appear in
menuconfig.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Abdelatif Guettouche
9c0157c882 arch/xtensa/src/esp32/esp32_spiflash.c: Cosmetic changes.
Add missing prototypes.
Fix some alignements.
Add some more comments.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Abdelatif Guettouche
6b6d983650 arch/xtensa/src/esp32/esp32_spiflash.c: Don't double check for direct
read mode.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2020-09-11 14:14:43 -03:00
Xiang Xiao
b0797263ca libc/stdio: Allocate file_struct dynamically
1.Reduce the default size of task_group_s(~512B each task)
2.Scale better between simple and complex application

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia872137504fddcf64d89c48d6f0593d76d582710
2020-09-11 17:58:17 +08:00
Ouss4
06ca12e6b9 arch/: Trivial typos, mostly "their is" to "there is" 2020-09-09 14:09:43 -04:00
Xiang Xiao
f99719e260 Move note driver from drivers/syslog to drivers/note
it's better to put the note transport layer into a common folder

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-09-07 11:54:10 +08:00
Johannes Schock
515ad1c388 Added KDEFINE (__KERNEL__) to EXTRAFLAGS for libboard, for other architectures. 2020-09-05 21:25:31 +08:00
Ouss4
3560e16ac7 arch/xtensa/src/esp32/esp32_spi.c: When the TX buffer is empty send
something to kick off the SPI clock.
2020-09-04 17:43:51 -03:00
Masayuki Ishikawa
08c4376606 arch, include, sched : Refactor ARCH_GLOBAL_IRQDISABLE related code
Summary:
- ARCH_GLOBAL_IRQDISABLE was initially introduced for LC823450 SMP
- At that time, i.MX6 (quad Cortex-A9) did not use this config
- However, this option is now used for all CPUs which support SMP
- So it's good timing for refactoring the code

Impact:
- Should have no impact because the logic is the same for SMP

Testing:
- Tested with board: spresense:smp, spresense:wifi_smp
- Tested with qemu: esp32-core:smp, maix-bit:smp, sabre-6quad:smp
- Build only: lc823450-xgevk:rndis, sam4cmp-db:nsh

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-09-03 10:20:20 +08:00
Ouss4
b5d3ba64e0 arch/xtensa/src/esp32/esp32_gpio.c: Enable input mode only when
configuring an input.
2020-09-01 15:06:58 -03:00
Gregory Nutt
55a9172bc2 Fix Cygwin build with Windows native toolchain
PR #1450 broke the Cygwin build.  Refer to Issue #1672.

The use of of logic like:

    EXTRA_LIBPATHS += -L "${dir ${shell $(CC) $(ARCHCPUFLAGS) --print-file-name=libgcc.a}}"

fails when the Toolchain $(CC) is a native Windows toolchain.  That is because the returned path is a Windows-style patch which cannot be handled by the make 'dir' command.  Commit 4910d43ab0 reorganized a lot of definitions and replaced the correct code with the use of the limit make 'dir' command.  The original code used the Bash dirname command which does not suffer from this limitation; it can handle both POSIX and Windows paths.

This was verified using the stm32f4discover:nsh toolchain with the Windows native ARM Embedded toolchain.  That toolchain returns:

    arm-none-eabi-gcc --print-file-name=libgcc.a
    c:/program files (x86)/gnu tools arm embedded/9 2019-q4-major/bin/../lib/gcc/arm-none-eabi/9.2.1/libgcc.a
2020-09-01 10:20:28 +08:00
Alan C. Assis
946601da2f ESP32: Keep the 'waiti 0' instruction - noticed by Masayuki Ishikawa 2020-08-27 14:33:05 +01:00
Ouss4
8d32930d29 arch&boards/xtensa: Fix some typos, references to STM/ARM code and
change file headers where Gregory Nutt is the only author.
2020-08-27 05:48:55 -07:00
Ouss4
37d8799d07 arch/xtensa/src/esp32/esp32_spi.c: spi_cmddata function will be defined
by board logic, don't need it here.
2020-08-27 14:12:34 +08:00
Ouss4
99d3317329 arch/xtensa/src/esp32/esp32_irq.c: Include esp32_gpio.h to avoid
implicit declaration warning.
2020-08-27 14:12:34 +08:00
Alan C. Assis
bedc8c9aeb Remove "kludge" code that come from PIC32 2020-08-27 14:10:21 +08:00
Alan C. Assis
7a1342f503 Fix coding style and other small issues 2020-08-23 08:26:10 -06:00
Alan C. Assis
4ded03a673 ESP32: Add support to RNG HW Driver 2020-08-23 08:26:10 -06:00
Dong Heng
39539be149 xtensa/esp32: Improve SPI transmission
Master:
  1. add DMA RX/TX support
  2. add software chip selection
  3. add user defined chip selection
  4. add IOMUX check and IO map

Slave:
  1. add DMA RX/TX support
  2. add IOMUX check and IO map
  3. use full 256 bit SPI TX/RX cache in non-DMA mode
2020-08-21 10:04:27 +01:00
Alan C. Assis
69f914adcd Another nxstyle issue fixed 2020-08-20 15:15:07 -06:00
Alan C. Assis
4e3070c542 Fix some right alignment 2020-08-20 15:15:07 -06:00
Alan C. Assis
34c144ad13 Fix many coding styles issues 2020-08-20 15:15:07 -06:00
Alan C. Assis
7d88f1e9cf Fix the introduced long line 2020-08-20 15:15:07 -06:00
Alan C. Assis
5b719daf69 Fix issues reported in the pull request and update defconfig 2020-08-20 15:15:07 -06:00
chenwen
1e9ef469dc xtensa/esp32: Add functions to switch CPU frequency from 80MHz to 240Mhz 2020-08-20 15:15:07 -06:00
Xiang Xiao
acca9fcc3b sched/wdog: Remove MAX_WDOGPARMS and related stuff
since the variable arguments are error prone and seldom used.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-08-14 08:19:50 -06:00
Xiang Xiao
a0ce81d659 sched/wdog: Don't dynamically allocate wdog_s
to save the preserved space(1KB) and also avoid the heap overhead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I694073f68e1bd63960cedeea1ddec441437be025
2020-08-11 12:28:55 -06:00
Xiang Xiao
f618de9c97 Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-08-08 17:30:26 -03:00
Alan C. Assis
6ea7b29088 Add ESP32 Ethernet device driver
This driver was implemented by Dong Heng<dongheng@espressif.com>
and reviewed by Alan Carvalho de Assis
2020-08-06 23:35:16 +01:00
Alan C. Assis
c06d3e1b0a xtensa/esp32: Add SPI Flash device driver
ESP32 runs code in a SPI Flash, so users can also use it to store
data directly or mount some parts into a filesystem.

The SPI Flash usually use SPI0.

This driver was implemented by Dong Heng dongheng@espressif.com
and modified to fix coding style by Alan Carvalho de Assis.
2020-07-31 23:37:30 +01:00
Alan C. Assis
cb1d11a499 ESP32: Add driver support to I2C
This driver was implemented by Dong Heng <dongheng@espressif.com>
and modified to fix coding style by Alan Carvalho de Assis.

Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@gmail.com>
2020-07-28 14:31:55 +01:00
SPRESENSE
e249a2f82f Makefile: Fix Make.dep not updated by config changes
Make.dep file should be updated by .config changed after first make.
There are 2 cases affected for this problem:

 1) Add source files by config symbol
 2) Include header files in #ifdef directive

These 2 cases may not be included in Make.dep and this may prevent the
differential build from working correctly.
2020-07-28 03:59:45 -05:00
Xiang Xiao
5efa93ec26 arch/Toolchain.defs: Change all ARCROSSDEV to CROSSDEV
ARCROSSDEV always equals to CROSSDEV, so it is no reason to keep ARCROSSDEV.

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-20 23:50:59 -07:00
Alan C. Assis
ba274b999e Fix small formatting issues caused by VIM macro edition 2020-07-20 21:02:41 +01:00
Xiang Xiao
b329e2377d boards: Move toolchain related variables to Toolchain.defs
1.It make sense to let Toolchain.defs give the default value
2.The board can still change if the default isn't suitable
3.Avoid the same definition spread more than 200 Make.defs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ic2649f1c7689bcf59c105ca8db61cad45b6e0e64
2020-07-20 17:10:37 +01:00
Xiang Xiao
47f2090410 arch: Change --print-file-name=libgcc.a to --print-libgcc-file-name
Since the new option is more compatible with clang

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-19 18:26:31 -07:00
Alan C. Assis
79a3fd1932 ESP32: Add driver support to SPI Master and Slave
This driver was implemented by Dong Heng <dongheng@espressif.com>
and modified to fix coding style by Alan Carvalho de Assis.
2020-07-19 21:26:58 +01:00
Xiang Xiao
d6827cab60 arch: up_assert shouldn't call exit directly
since exit will be only callable from userspace and change
the 1st argument from "const uint8_t *" to "const char *"

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I86487d57210ab63109148232da71dbc4d60a563b
2020-07-19 01:21:36 +01:00
Xiang Xiao
4910d43ab0 build: Move the toolchain library setting to the common place
so all boards support C++ automatically
2020-07-16 15:38:08 -03:00
Nakamura, Yuuichi
f392d246d3 Fix note driver initialization 2020-07-13 00:46:55 -05:00
Xiang Xiao
924ba84737 arch: call *_getsp in up_assert and board_crashdump
and remove the static up_getsp

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-09 13:51:09 +01:00
Xiang Xiao
05f6445493 arch: Move *_getsp to the common place arch/arch.h
so other place can get the stack pointer easily

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-07-09 13:51:09 +01:00
chao.an
332e5481ee arch/stackframe: fix heap buffer overflow
ASAN trace:
...
==32087==ERROR: AddressSanitizer: heap-buffer-overflow on address 0xf4502120 at pc 0x56673ca3 bp 0xff9b6a08 sp 0xff9b69f8
WRITE of size 1 at 0xf4502120 thread T0
    #0 0x56673ca2 in strcpy string/lib_strcpy.c:64

0xf4502120 is located 0 bytes to the right of 8224-byte region [0xf4500100,0xf4502120)
allocated by thread T0 here:
    #0 0xf7a60f54 in malloc (/usr/lib32/libasan.so.4+0xe5f54)
    #1 0x5667725d in up_create_stack sim/up_createstack.c:135
    #2 0x56657ed8 in nxthread_create task/task_create.c:125
    #3 0x566580bb in kthread_create task/task_create.c:297
    #4 0x5665935f in work_start_highpri wqueue/kwork_hpthread.c:149
    #5 0x56656f31 in nx_workqueues init/nx_bringup.c:181
    #6 0x56656fc6 in nx_bringup init/nx_bringup.c:436
    #7 0x56656e95 in nx_start init/nx_start.c:809
    #8 0x566548d4 in main sim/up_head.c:95
    #9 0xf763ae80 in __libc_start_main (/lib/i386-linux-gnu/libc.so.6+0x18e80)

CALLSTACK:
    #8  0xf79de7a5 in __asan_report_store1 () from /usr/lib32/libasan.so.4
    #9  0x565fd4d7 in strcpy (dest=0xf4a02121 "", src=0xf5c00895 "k") at string/lib_strcpy.c:64
    #10 0x565e4eb2 in nxtask_setup_stackargs (tcb=0xf5c00810, argv=0x0) at task/task_setup.c:570
    #11 0x565e50ff in nxtask_setup_arguments (tcb=0xf5c00810, name=0x5679e580 "hpwork", argv=0x0) at task/task_setup.c:714
    #12 0x565e414e in nxthread_create (name=0x5679e580 "hpwork", ttype=2 '\002', priority=224, stack=0x0, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:143
    #13 0x565e42e3 in kthread_create (name=0x5679e580 "hpwork", priority=224, stack_size=8192, entry=0x565e54e1 <work_hpthread>, argv=0x0) at task/task_create.c:297
    #14 0x565e5557 in work_start_highpri () at wqueue/kwork_hpthread.c:149
    #15 0x565e3e32 in nx_workqueues () at init/nx_bringup.c:181
    #16 0x565e3ec7 in nx_bringup () at init/nx_bringup.c:436
    #17 0x565e3d96 in nx_start () at init/nx_start.c:809
    #18 0x565e3195 in main (argc=1, argv=0xffe6b954, envp=0xffe6b95c) at sim/up_head.c:95

Change-Id: I096f7952aae67d055daa737e967242eb217ef8ac
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-06-15 07:19:41 -06:00
Xiang Xiao
4fbbd2e3bf arch: Move PRIxMAX and SCNxMAX definition to include/stdint.h
like other related macro(e.g. INTMAX_MIN, INTMAX_MAX...)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I8863599960b1a9b1c22ae9c35735a379a4c745b0
2020-06-10 08:24:47 +02:00
Xiang Xiao
7758eb8658 arch: Define INTx_C and UINTx_C macro
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: Ia50ea8764880fabd3d878c95328632c761be6b43
2020-06-10 08:24:47 +02:00
Xiang Xiao
b4bd9427f7 arch: Rename _exit to up_exit to follow the naming convention
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I2779a2a3ccb5426fe78714fdcc629b8dfbb7aaf6
2020-06-04 22:20:45 +01:00
Xiang Xiao
85b859fb8d arch: _exit should't call nxsched_resume_scheduler twice in SMP mode
utilize the call inside nxtask_exit instead, also move
nxsched_suspend_scheduler to nxtask_exit for symmetry

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Change-Id: I219fc15faf0026e452b0db3906aa40b40ac677f3
2020-06-04 22:20:45 +01:00
Gregory Nutt
82debdc213 Make task_init() and task_activate() internal OS functions.
-Move task_init() and task_activate() prototypes from include/sched.h to include/nuttx/sched.h.  These are internal OS functions and should not be exposed to the user.
-Remove references to task_init() and task_activate() from the User Manual.
-Rename task_init() to nxtask_init() since since it is an OS internal function
-Rename task_activate() to nxtask_activate since it is an OS internal function
2020-05-25 23:54:45 +01:00
Xiang Xiao
7e5b0f81e9 build: Replace -I with INCDIR
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 20:20:12 +01:00
Xiang Xiao
23668a4b9b build: Remove the empty variable assignment
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-24 08:24:13 -06:00
Xiang Xiao
dd61d3d9f9 build: Remve the unnecessary .gitignore
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-23 18:00:40 +01:00
Xiang Xiao
1a95cce1a3 build: Move .config check to the top Makefile
remove the workaround to handle the inexistence of .config/Make.defs

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-20 17:57:34 +01:00
Xiang Xiao
567962bd62 build: Move the extension definition to common place
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-19 19:23:18 +01:00
Xiang Xiao
bd656888f2 build: Replace WINTOOL with CYGWIN_WINTOOL Kconfig
so the correct value can be determinated by Kconfig system automatically

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-18 15:02:55 -06:00
chao.an
05ebb39998 arch: complete logic in create/use stack to support stack coloration.
Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-18 07:30:46 -06:00
chao.an
86a412d65a arch/stack: fix check stack breakage
remove the TLS alignment check

Regression by:

--------------------------------------------------------
commit a6da3c2cb6
Author: Ouss4 <abdelatif.guettouche@gmail.com>
Date:   Thu May 7 18:50:07 2020 +0100

    arch/*/*_checkstack.c: Get aligned address only when
    CONFIG_TLS_ALIGNED is enabled.

--------------------------------------------------------
commit c2244a2382
Author: Gregory Nutt <gnutt@nuttx.org>
Date:   Thu May 7 09:46:47 2020 -0600

    Remove CONFIG_TLS

    A first step in implementing the user-space error is
    force TLS to be enabled at all times.  It is no longer optional

Signed-off-by: chao.an <anchao@xiaomi.com>
2020-05-18 07:27:17 -06:00
Gregory Nutt
f92dba212d sched/sched/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 16:58:42 -03:00
Gregory Nutt
4b44b628ea Run nxstyle against all .c and .h files modified by this PR.
All complaints fixed except for those that were not possible to fix:

- Used of Mixed case identifier in ESP32 files.  These are references to Expressif ROM functions which are outside of the scope of NuttX.
2020-05-09 14:19:08 -03:00
Gregory Nutt
a4218e2144 include/nuttx/sched.h: Make naming of all internal names consistent:
1. Add internal scheduler functions should begin with nxsched_, not sched_
2. Follow the consistent naming patter of https://cwiki.apache.org/confluence/display/NUTTX/Naming+of+OS+Internal+Functions
2020-05-09 14:19:08 -03:00
Gregory Nutt
3dca5eba15 Completes the Implementation of the TLS-based errno
- Remove per-thread errno from the TCB structure (pterrno)
- Remove get_errno() and set_errno() as functions.  The macros are still available as stubs and will be needed in the future if we need to access the errno from a different address environment (KERNEL mode).
- Add errno value to the tls_info_s structure definitions
- Move sched/errno to libs/libc/errno.  Replace old TCB access to the errno with TLS access to the errno.
2020-05-07 23:11:34 +01:00
Ouss4
a6da3c2cb6 arch/*/*_checkstack.c: Get aligned address only when CONFIG_TLS_ALIGNED is
enabled.
2020-05-07 12:04:51 -06:00
Gregory Nutt
c2244a2382 Remove CONFIG_TLS
A first step in implementing the user-space error is force TLS to be enabled at all times.  It is no longer optional
2020-05-07 12:04:16 -06:00
Ouss4
a4dd967440 arch/: Implement up_tls_info() for the rest of the architectures. 2020-05-06 21:56:40 -06:00
Ouss4
1e3ec6ecd0 arch/: Implement Thread Local Storage for the rest of the architectures.
The change consisted on modifying *_usestack.c and *_createstack.c
2020-05-06 21:56:40 -06:00
Xiang Xiao
94bb2e05bb syslog: Code outside libc shouldn't call nx_vsyslog directly
since nx_vsyslog is the implementation detail

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-06 20:53:11 -06:00
Xiang Xiao
eca7059785 Refine __KERNEL__ and CONFIG_BUILD_xxx usage in the code base
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-05-01 10:43:47 -03:00
liuhaitao
459ad99373 Use EXTRAFLAGS instead of EXTRADEFINES to be used by make via command line
So call 'make EXTRAFLAGS=-Wno-cpp' could suppress the warnings with pre-processor
directive #warning in GCC.

Change-Id: Iaa618238924c9969bf91db22117b39e6d2fc9bb6
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
2020-04-11 08:31:08 -06:00
ligd
231ad202ee global change: repace sched_xfree() to kxmm_free()
Changes:
sched_xfree() => kxmm_free()
remove garbage related APIs
remove ARCH_HAVE_GARBAGE

Cause garbage feature move to mm_heap, then don't need
garbage anymore.

Change-Id: If310790a3208155ca8ab319e8d038cb6ff92c518
Signed-off-by: ligd <liguiding@fishsemi.com>
2020-04-09 10:29:28 -06:00
Alin Jerpelea
425e6c28dc
arch: xtensa: esp32: nxstyle fixes (#753)
esp32 nxstyle fixes

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2020-04-08 08:28:17 -06:00
hartmannathan
bfc153ca27
Fix typos in comments and documentation (#750)
* Fix typos in comments and documentation
2020-04-08 06:45:35 -06:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly
This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
YAMAMOTO Takashi
4ddb457c3e Fix a typo in comments 2020-04-01 00:03:31 +08:00
YAMAMOTO Takashi
f8f5830410 xtensa: Implement CONFIG_ARCH_IDLE_CUSTOM 2020-03-31 15:50:04 +08:00
YAMAMOTO Takashi
123b3d92df xtensa: Check XCHAL_HAVE_INTERRUPTS for waiti 2020-03-31 14:32:07 +08:00
YAMAMOTO Takashi
b9bf9c9a2b xtensa: Save PS correctly in coproc handler
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
2020-03-31 14:31:31 +08:00
YAMAMOTO Takashi
d2a6e56308 xtensa: Save PS correctly in double exception handler
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
2020-03-31 14:31:31 +08:00
YAMAMOTO Takashi
18d3fa9eea xtensa: Save PS correctly in syscall handler
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
2020-03-31 14:31:31 +08:00
YAMAMOTO Takashi
1ffa009c8b Revert "Don't generate .depend anymore"
This reverts commit 79af7fbf4e.

Because:

* btashton reported some issues in local builds:

  https://github.com/apache/incubator-nuttx/pull/603#issuecomment-602264860

* this might be related to the current CI breakage:

  > /bin/sh: 1: /__w/incubator-nuttx/incubator-nuttx/nuttx/tools/mkdeps: not found
2020-03-22 23:07:29 -05:00
Xiang Xiao
79af7fbf4e
Don't generate .depend anymore 2020-03-22 18:15:29 +00:00
Masayuki Ishikawa
6baebcecc4 arch: esp32: Fix compile error for smp 2020-03-19 19:40:18 -06:00
Nathan Hartman
a5e643b0cd Fix typos in comments and documentation. 2020-03-16 20:01:11 -06:00
YAMAMOTO Takashi
f4e7845b85 esp32: emulate byte access for module text
Tested on ESP-EYE.
2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
855751b534 Introduce instruction memory allocator
Necessary for dlfcn etc on ESP32, which has separate memory regions
for instruction and data.

known issues/todo
 * consider something similar to dual heaps for PROTOECTED
 * consider to adapt binfmt as well
2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
03a916acb8 Kconfig: Add kconfig options for module text allocator
Enable it for ESP32.
2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
e135c938d2 xtensa: Implement a few relocations 2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
8657305883 arch/xtensa/include/elf.h: Initial version 2020-03-16 07:54:49 -06:00
YAMAMOTO Takashi
5a716b799b xtensa_user_handler: rsync after wsr.ps 2020-03-16 07:31:46 -05:00
YAMAMOTO Takashi
3b528c6010 xtensa_user_handler: Save PS correctly
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
2020-03-16 19:13:33 +09:00
YAMAMOTO Takashi
951cfbd1d5 xtensa_user_handler: Fix registers in comments 2020-03-16 05:08:43 -05:00
YAMAMOTO Takashi
7aebcc4bf6 xtensa_user_handler: Fix registers in comments 2020-03-16 02:24:16 -05:00
YAMAMOTO Takashi
23db3b2a48 ESP32: Use __asm__ __volatile__ for inline assembly 2020-03-13 19:06:15 -06:00
YAMAMOTO Takashi
3a03a307b9 arch/xtensa/src/common/xtensa_abi.h: nxstyle fixes
The remaining errors:

    Operator/assignment must be preceded with whitespace

I didn't fix them because they are in assembly code, which
nxstyle doesn't understand.
2020-03-13 18:58:04 -06:00
YAMAMOTO Takashi
086e8ffb12 arch/xtensa/src/esp32/esp32_cpustart.c: nxstyle fixes
The remaining errors:

    Mixed case identifier found

I didn't fix them because they were on ROM symbols,
which are not supposed to obey NuttX's coding style.
2020-03-13 18:51:26 -06:00
YAMAMOTO Takashi
9aec40744c xtensa_hostfs.c: Change the license to Apache 2.0
This file is based on arch/arm/src/common/up_hostfs.c.
The license change was ok'ed by the author. (@xiaoxiang781216)
2020-03-12 09:03:31 -05:00
YAMAMOTO Takashi
7a06ff0392 xtensa: hostfs using simcall
Tested on qemu -semihosting
2020-03-12 09:03:31 -05:00
YAMAMOTO Takashi
c18d7dc434 xtensa: Implement simcall 2020-03-12 09:03:31 -05:00
YAMAMOTO Takashi
7774cdd7aa Appease many of nxstyle errors for esp32 related files
I skipped the following files because they were not simple.
I'll create separate PRs.

    arch/xtensa/src/esp32/esp32_cpustart.c
    arch/xtensa/src/common/xtensa_abi.h
    boards/xtensa/esp32/esp32-core/include/board.h

Also, I skipped the following files and directories because
they looked too huge and/or foreign.

    arch/xtensa/include/esp32/tie.h
    arch/xtensa/include/xtensa/xtensa_corebits.h
    arch/xtensa/src/esp32/hardware/
    arch/xtensa/include/esp32/tie-asm.h
    arch/xtensa/include/esp32/core-isa.h
    arch/xtensa/include/xtensa/core.h

I also fixed a few "is is" style typos when unwrapping long lines.
2020-03-12 07:45:44 -06:00
Masayuki Ishikawa
da3fb9c94f arch: xtensa: Call the waiti instruction in up_idle()
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-03-06 01:46:09 -06:00
Masayuki Ishikawa
a5cb0b3731 arch: xtensa: Fix SMP related logic
NOTE: Applied the same logic as in other SMP architectures
2020-03-04 23:34:43 -06:00
Masayuki Ishikawa
e16c3ca25b arch: esp32: Fix compile error with xtensa-esp32-elf-gcc 8.2.0 2020-03-04 03:51:13 -06:00
YAMAMOTO Takashi
34b17ec5cb xtensa: Fix up_schedule_sigaction
This fixes various crashes in ostest.
2020-02-28 07:48:16 -06:00
YAMAMOTO Takashi
119a38ce10 xtensa: Fix typos and comments 2020-02-28 11:33:29 +01:00
YAMAMOTO Takashi
930e2788cc xtensa: Use ar and nm from the toolchain
This fixes build on macOS, where native ar is incompatible.
2020-02-26 10:47:26 -06:00
Xiang Xiao
cde88cabcc Run codespell -w with the latest dictonary again
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-02-23 22:27:46 +01:00
liuhaitao
8ca4ca5ae8 arch: undef USE_SERIALDRIVER if CONFIG_CONSOLE_SYSLOG
An error was introduced from:

  commit f982ee43db
  Author: Xiang Xiao <xiaoxiang@xiaomi.com>
  Date:   Tue Feb 18 09:55:04 2020 +0800

    drivers/serial: Remove the lowconsole driver

    Replace with the syslog console driver which has more capability than lowconsole
2020-02-23 09:10:06 -06:00
Xiang Xiao
bd4e8e19d3 Run codespell -w against all files
and fix the wrong correction
2020-02-22 14:45:07 -06:00
Xiang Xiao
51a2171c71 ramlog: Remove g_ramlog_syslog_channel since it's same as g_default_channel
And remove syslog_init_e because all initialization is later now and we don't
distinguish the initialition phase anymore after ramlog don't need special
initialize.
2020-02-18 13:04:45 -06:00
Xiang Xiao
dcaaf2d912 ramlog: Remove all ramlog_consoleinit related code
Because we can get the same function by CONSOLE_SYSLOG/syslog_console_init.
BTW, it isn't a good choice to use g_ramlogfops as /dev/console since nsh
will read back what it send out which will surprise most people.
2020-02-18 12:57:43 -06:00
Xiang Xiao
f982ee43db drivers/serial: Remove the lowconsole driver
Replace with the syslog console driver which has more capability than lowconsole
2020-02-18 12:51:09 -06:00
Xiang Xiao
6b77f73583 arch: Move iob_initialize into nx_start just after heap initialization
it doesn't make sense that iob initialization is in up_initialize
but other memory components initialization is called in nx_start

Change-Id: Id43aeaa995f340c5943f59a0067a483ff3ac34a2
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2020-02-18 10:26:19 -03:00
Xiang Xiao
e7d9260014 arch: Customize the typedef of size_t instead of intptr_t
To ensure size_t same as toolchain definition in the first place and rename CXX_NEWLONG to ARCH_SIZET_LONG.  The change also check whether __SIZE_TYPE__ exist before CONFIG_ARCH_SIZET_LONG so our definition can align with toolchain(gcc/clang) definition automatically.
2020-02-18 07:15:19 -06:00
Xiang Xiao
6d69439f58 Call xxx_timer_initialize from clock subsystem
Call xxx_timer_initialize from clock subsystem to make timer ready for use as soon as possiblei and revert the workaround:

commit 0863e771a9
Author: Gregory Nutt <gnutt@nuttx.org>
Date:   Fri Apr 26 07:24:57 2019 -0600

    Revert "sched/clock/clock_initialize.c:  clock_inittime() needs to be done with CONFIG_SCHED_TICKLESS and clock_initialize should skip clock_inittime() for external RTC case since the RTC isn't ready yet."

    This reverts commit 2bc709d4b9.

    Commit 2bc709d4b9 was intended to handle the case where up_timer_gettime may not start from zero case.  However, this change has the side-effect of breaking every implementation of tickless mode:  After this change the tickless timer structures are used before they are initialized in clock_inittime().  Initialization happens later when up_initialize is called() when arm_timer_initialize().

    Since the tickless mode timer is very special, one solution might be to

    1. Rename xxx_timer_initialize to up_timer_initialize
    2  Move up_timer_initialize to include/nuttx/arch.h
    3.  Call it from clock subsystem instead up_initialize

    Basically, this change make timer initialization almost same as rtc initialization(up_rtc_initialize).

    For now, however, we just need to revert the change.
2020-02-08 07:40:06 -06:00
Xiang Xiao
76bbed07a4 Call up_irqinitialize from irq subsystem
Call up_irqinitialize from irq subsystem to make the irq ready for use as soon as possible
2020-02-08 07:39:22 -06:00
Xiang Xiao
c5b1554d84 Remove NETDEV_LOOPBACK option, NET_LOOPBACK is enough 2020-02-02 08:25:06 -06:00
Xiang Xiao
5c80b94820 Replace #include <semaphore.h> to #include <nuttx/semaphore.h>
Since the kernel side should call nxsem_xxx instead and remove the unused inclusion
2020-02-01 08:27:30 -06:00
Xiang Xiao
80277d1630
Refine the preprocessor conditional guard style (#190) 2020-01-31 19:07:39 +01:00
Xiang Xiao
68951e8d72 Remove exra whitespace from files (#189)
* Remove multiple newlines at the end of files
* Remove the whitespace from the end of lines
2020-01-31 09:24:49 -06:00
Xiang Xiao
6a3c2aded6 Fix wait loop and void cast (#24)
* Simplify EINTR/ECANCEL error handling

1. Add semaphore uninterruptible wait function
2 .Replace semaphore wait loop with a single uninterruptible wait
3. Replace all sem_xxx to nxsem_xxx

* Unify the void cast usage

1. Remove void cast for function because many place ignore the returned value witout cast
2. Replace void cast for variable with UNUSED macro
2020-01-02 10:54:43 -06:00
Ouss4
7dcf8dde7c arch/xtensa/src/esp32/esp32_start.c: A comma was missing in g_idlestack attributes. 2019-12-10 13:42:58 -06:00
Xiang Xiao
800e12fc42 arch/: Add rpmsg_serialini() call to every implementation of up_initialize() for rpmsg uart initialization. 2019-11-04 08:11:50 -06:00
Gregory Nutt
6c2f73774b armv7-a and xtensa: Apply Masayuki Ishakawa's change of cef90a3865 to these these other SMP architectures as well. 2019-10-04 07:17:35 -06:00