For SDMMC1, IDMA cannot access SRAM123 or SRAM4. Refer to ST AN5200 for
details. This patch makes stm32_dmapreflight check the buffer address and
return an error when the buffer is located in a invalid address space.
This does not fix the hardware limitation but at least makes it visible.
This simplifies the sdmmc driver when the IDMA is in use. There is no need to mix
IDMA and interrupt based transfers; instead, when making unaligned data tranfers,
just make IDMA into an internal aligned buffer and then copy the data.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
It should not be an error to clean cache beyond the dma source buffer
boundaries. It would just prematurely push some unrelated data from
cache to memory.
The only case where it would corrupt memory is that there is a dma
destination buffer overlapping the same cache line with the source
buffer. But this can't happen, because a destination buffer must always
be cache-line aligned when using write-back cache.
This patch enables doing dma tx-only transfer from unaligned source
buffer when using write-back cache.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
Correct flash write and erase functions, they inherit some
broken code from other platforms. Also fix the confusion between
eraseblock(sector) and page sizes.
Signed-off-by: Jari Nippula <jari.nippula@intel.com>
If the flash option register was locked before modifying it, return
it to the locked state after modify.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
Remove support for the Codesourcery, Atollic, DevKitArm, Raisonance, and CodeRed toolchains. Not only are these tools old and no longer used but they are all equivalent to standard ARM EABI toolchains. Retaining specific support has no effect (they are still supported, but now just as generic EABI toolchains).
First, configure the dmacfg in spi_dmarxsetup and spi_dmatxsetup. Then,
check for dmacapable, and only after that set up the dma.
This way the dmacapable actually works, and we don't need to initialize
the dmacfg structures twice.
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
When starting dma transfer, the dcache for the TX buffer should be cleaned.
"flush" performs also invalidate, which is unnecessary. The TX buffer
can be unaligned to the cahche line in some(most) cases, whereas RX buffer
can never be.
The cache for the receive buffer can be dirty and valid before call to exchange.
Thus another memory access (hitting the same cache line) may corrupt receive data
while waiting for transfer to complete. So the receive buffer should be
invalidated before the transfer
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
Modify some comments and debug assertions, which inherit from previous versions
and make no sense. Also add a few nerr printouts to make it easier to debug
running out of buffers
Signed-off-by: Jukka Laitinen <jukka.laitinen@intel.com>
See the following commit in SDK:
commit 62a2fb4fd3001aefad9ec3b2e2e7c47e5b0f21e1
Author: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
Date: Fri Jan 24 13:32:04 2020 +0900
Enable dummy transfer by SPI using DMA
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
All complaints fixed except for those that were not possible to fix:
- Used of Mixed case identifier in ESP32 files. These are references to Expressif ROM functions which are outside of the scope of NuttX.
- Remove per-thread errno from the TCB structure (pterrno)
- Remove get_errno() and set_errno() as functions. The macros are still available as stubs and will be needed in the future if we need to access the errno from a different address environment (KERNEL mode).
- Add errno value to the tls_info_s structure definitions
- Move sched/errno to libs/libc/errno. Replace old TCB access to the errno with TLS access to the errno.
Move the logic to get TLS information from an inline function to a normal function. For the unaligned case, it is probably too large to be inlined.
Also fixes some minor things from review of previous commits.
rdrand was checking the wrong return value for the intrinsics
so it would block forever. The read function was also not returning
the actual number of bytes read.
This was tested by running the rand example application
NuttShell (NSH) NuttX-9.0.0
nsh>rand
Reading 8 random numbers
Random values (0x101584f70):
0000: 019a172df7d539f2df8550362e2d3f74 9b467c51ebe30b9f6510e540e34fabcc ...-..9...P6.-?t .F|Q....e..@.O..
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all architecture-private functions begin with the name of the arch, not up_.
This PR addresses only these name changes for the ARM-private functions up_instack_base() and up_instack_top() which should be called arm_instack_base() and arm_instack_top().
There should be no impact of this change (other that one step toward more consistent naming).
Normal PR checks are sufficient
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the MCU, not up_.
This PR addresses only these name changes for the STM32-private functions up_waste() which should be called stm32_waste.
There should be no impact of this change (other that one step toward more consistent naming).
Normal PR checks are sufficient
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.
This PR addresses function-like macro naming that was missing in previous PRs: up_savestate() and up_restorestate() which must be named arm_savestate() and arm_restorestate().
Impact
There should be no impact of this change (other that one step toward more consistent naming).
Testing
stm32f103-minimum:nsh
The are remaining nxstyle complaints due to the use of mixed case identifiers in arch/arm/src/lc823450/lc823450_irq.c This, cannot be easily fixed since it depends on register definitions in header files that have implications to section other lc823450 files.
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.
This PR addresses only these name changes for the ARM-private functions up_ramvec_initialize() and up_ramvec_attch().
Impact
There should be no impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.
This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h
This change to the files only modifies the name of called functions. nxstyle fixes were made for all core architecture files. However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change. It is not humanly possible to fix all of these. I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance.
Impact
There should be not impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.
This PR addresses only these name changes for the up_*.S files.
The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.
Impact
There should be not impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
Fix it after the following change:
commit bb4458b63f
Author: Ouss4 <abdelatif.guettouche@gmail.com>
Date: Thu Apr 30 19:05:12 2020 +0100
include/sys/stat.h: Per the POSIX standard, the atime, ctime and mtime field
s
have changed their type from time_t to struct timespec.
Summary
The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.
This PR addresses only these name changes for the up_*.h files. There are only three, but almost 1680 files that include them:
up_arch.h
up_internal.h
up_vfork.h
The only change to the files is from including up_arch.h to arm_arch.h (for example).
The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.
Impact
There should be not impact of this change (other that one step toward more consistent naming).
Testing
stm32f4discovery:netnsh
Since armv8-m now uses arm_fullcontextrestore instead of up_fullcontextrestore, _exit
should call arm_fullcontextrestore for armv8-m accordingly.
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
This files in the arch/arm/src/armv8-m directory were cloned from arch/arm/src/armv7-m. Naming standards were created for the architecture files, function, and variable names: https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ
There however were never appliced to arch/arm/src/armv7-m and so this bad naming was inherited by arch/arm/src/armv8-m. This commit corrects the file naming only and makes it compliant with the Naming FAQ.
In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check). It was really my intention to merge PR878, but I screwed that up and merged 879 instead.
This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
Mac OS X was renamed to macOS at some point. Update references to
OSX, OS X, Mac OS X, Mac OSX, and other permutations, to macOS,
in README files and in comments of other files.
1. Add dsp extension; float point based on hardware and software.
2. Delete folder "iar"
3. Add tool chain for cortex-M23 and cortex-M35p
Signed-off-by: qiaowei <qiaowei@xiaomi.com>
Change-Id: I5bfc78abb025adb0ad4fae37e2b444915f477fe7
