Gregory Nutt
|
67721c50f1
|
Fix hard coded values in dispatch_sysall inline assembly. Back out/corect part of last change; that was going the wrong direction.
|
2014-08-29 10:10:47 -06:00 |
|
Gregory Nutt
|
48c2c9ed08
|
Fix a cloned typo
|
2014-08-29 10:09:07 -06:00 |
|
Gregory Nutt
|
db69d94935
|
Fix ARM7/9 and Cortex-A SYSCALLs: For threads in SVC mode, the SVC instructions clobbers R14. This must be taken account in the inline assembly
|
2014-08-29 10:07:11 -06:00 |
|
Gregory Nutt
|
27e463dfaa
|
Various fixes to the ARMv7-A system call logic
|
2014-08-29 08:24:00 -06:00 |
|
Gregory Nutt
|
8196b629a4
|
Rename arch/arm/src/armv7-a/syscall.h to svcall.h to work around some include path name collisions; fix some compilation errors in SYSCALL logic when debug is enabled
|
2014-08-29 07:48:16 -06:00 |
|
Gregory Nutt
|
8dd679e875
|
ARMv7-A: Add SYSCALL handling logic
|
2014-08-28 14:52:14 -06:00 |
|
Gregory Nutt
|
cbf0141d6c
|
Add an ARMv7-A system call definition header file
|
2014-08-28 13:21:36 -06:00 |
|
Gregory Nutt
|
3561aac62a
|
The system call library can now be built with CONFIG_NUTTX_KERNEL. New select: CONFIG_LIB_SYSCALL
|
2014-08-28 12:09:49 -06:00 |
|
Gregory Nutt
|
4fa5b52e43
|
Cortex-A address environments: Fix issue with page privileges
|
2014-08-28 11:00:41 -06:00 |
|
Gregory Nutt
|
26f6d90fa9
|
Remove a warning
|
2014-08-28 10:04:41 -06:00 |
|
Gregory Nutt
|
9be4972862
|
STM32 FLASH fixes: use size_t instead of uint16_t, make interface more generic. From Freddie Chopin
|
2014-08-28 09:11:20 -06:00 |
|
Gregory Nutt
|
35b11a7533
|
Fix an error introduced into ALL implmentations of interrupt dispatch logic
|
2014-08-28 08:41:57 -06:00 |
|
Gregory Nutt
|
8bdde7b2d1
|
Add address environment support to ALL implementatins of up_release_pending()
|
2014-08-28 08:10:19 -06:00 |
|
Gregory Nutt
|
1b24afe6fc
|
Add address environment support to ALL implementatins of up_reprioritize_rtr()
|
2014-08-28 07:54:07 -06:00 |
|
Gregory Nutt
|
0e9a0150ba
|
ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt
|
2014-08-28 06:49:05 -06:00 |
|
Gregory Nutt
|
540a7e4a35
|
ARM: Move address environment switch from the task switchers to the interrupt handler. That may save doing the actin multiple times per interrupt
|
2014-08-28 06:34:09 -06:00 |
|
Gregory Nutt
|
756054d745
|
Add ADDRENV support to ALL implmentations of _exit()
|
2014-08-27 16:31:02 -06:00 |
|
Gregory Nutt
|
7055bce8b4
|
Add ADDRENV support to ALL implementations of up_unblock_task()
|
2014-08-27 16:15:46 -06:00 |
|
Gregory Nutt
|
5bf114e604
|
Add ADDRENV support to all implementations of up_block_task()
|
2014-08-27 15:36:52 -06:00 |
|
Gregory Nutt
|
8ec74b1a9e
|
Minor address environment clean-up. Cannot generate debug contexts in certain contexts
|
2014-08-27 14:22:00 -06:00 |
|
Gregory Nutt
|
dd80c63af6
|
CC3200 Launchpad updates
|
2014-08-26 16:31:47 -06:00 |
|
Gregory Nutt
|
e3258a3b1f
|
Support the the TC3200 from Jim Ewing
|
2014-08-26 15:13:57 -06:00 |
|
Gregory Nutt
|
032ff50313
|
Add up_addrenv_coherent which will be called before address environment switches
|
2014-08-26 14:53:19 -06:00 |
|
Gregory Nutt
|
d6a4eb6266
|
up_coherent_dcache should do nothing the the length is zero
|
2014-08-26 14:51:53 -06:00 |
|
Gregory Nutt
|
e8094292e3
|
Rename up_addrenv_assign() to up_addrenv_clone() and generalize its arguments so that can be used for other purposes
|
2014-08-26 12:16:05 -06:00 |
|
Gregory Nutt
|
cb8e081dba
|
Mostly cosmetic use of uintptr_t to hold addresses instead of uint32_t
|
2014-08-26 10:44:10 -06:00 |
|
Gregory Nutt
|
b1066775a2
|
Fix confusion about what is a page of data and what is a page of L2 page table; restructure functions to reduce duplicated logic
|
2014-08-26 10:41:43 -06:00 |
|
Gregory Nutt
|
45d0b2c5fb
|
Add lots of debug output
|
2014-08-26 07:54:43 -06:00 |
|
Gregory Nutt
|
b3473bfa26
|
Cortex-A address environment: Fix some section mapping and address increments
|
2014-08-26 06:33:26 -06:00 |
|
Gregory Nutt
|
a593729cb2
|
ARMv7-A: Use of write back might be unpredictable
|
2014-08-25 16:34:22 -06:00 |
|
Gregory Nutt
|
cfa8174fe4
|
Bugfixes.. still integrating SAMA5 ELF with address environment
|
2014-08-25 15:27:58 -06:00 |
|
Gregory Nutt
|
9857f09baf
|
SAMA5 ELF configuration with address environments finally builds without errors
|
2014-08-25 13:59:02 -06:00 |
|
Gregory Nutt
|
699a54a022
|
Misc changed to get the SAMA5 ELF configuration with address environments working
|
2014-08-25 13:28:13 -06:00 |
|
Gregory Nutt
|
8907616478
|
Cortex-A/SAMA5 address environment support is code complete (untested)
|
2014-08-25 11:18:32 -06:00 |
|
Gregory Nutt
|
2566ba7b1d
|
Change naming of ELF interfaces from arch_ to up_ for consistency
|
2014-08-25 06:47:14 -06:00 |
|
Gregory Nutt
|
1f5813a763
|
After cached related fix, the ELF example is now functional
|
2014-08-24 14:12:45 -06:00 |
|
Gregory Nutt
|
839e206a4a
|
Modify ADDRENV Kconfigs. Z180 does not need all of the virtual address settings that the ARM does
|
2014-08-24 12:54:37 -06:00 |
|
Gregory Nutt
|
dde84a0a20
|
addrenv interface changes: up_addrenv_create() may need to create .text and .bss/.data separately because of differing access privileges (read/execute vs read/write). And, as a consequence, up_addrenv_vaddr() needs to be split into up_addrenv_vtext(0 and up_addrenv_vdata().
|
2014-08-24 11:54:14 -06:00 |
|
Gregory Nutt
|
95c79c675c
|
Add addrenv.h; First cut at Cortex-A address environment structures; Add configuration options to setup address enviornment
|
2014-08-24 09:57:53 -06:00 |
|
Gregory Nutt
|
66abb71c57
|
Change CONFIG_ADDRENV to CONFIG_ARCH_ADDRENV; change how it is selected -- the architecure must first declare support
|
2014-08-24 06:42:11 -06:00 |
|
Gregory Nutt
|
41196945d6
|
ARMv7-A: Add skeleton environment and build support for process address environments
|
2014-08-23 18:59:24 -06:00 |
|
Gregory Nutt
|
01566dd322
|
STM32 serial: MAke uart_devs[] const. From Freddie Chopin
|
2014-08-22 16:20:52 -06:00 |
|
Gregory Nutt
|
52b3735310
|
Recent STM32 UART change: Wasn't that logic backward? Shouldn't that have been disable the USART if (1) we don't have than many USARTs OR (2) we don't have that particular USART -- not AND.
|
2014-08-22 16:16:23 -06:00 |
|
Gregory Nutt
|
b01d3e396e
|
STM32 F401: Only 3 USARTS, but need to set STM32_NUSARTS to six because they are not numbered sequentially
|
2014-08-22 09:02:58 -06:00 |
|
Gregory Nutt
|
033de28cfa
|
STM32 F401: Correct support for USART6 on this chip. From Freddie Chopin
|
2014-08-22 06:49:16 -06:00 |
|
Gregory Nutt
|
2bc16b2ba5
|
wdog.h does not contain any application interface, only internal OS interface. Further, it is non-standard. Move wdog.h from include/ to include/nuttx. For the same reason, move the description of the watchdog timer interfaces from the Users Guide to the Porting Guide.
|
2014-08-21 11:16:55 -06:00 |
|
Gregory Nutt
|
96e1bf0ec2
|
NSH link management now works! The last fix was to the Ethernet drivers: They cannot disable clocking to the Ethernet blok on ifdown. Otherwise, we cannot communicate with the PHY
|
2014-08-17 17:54:46 -06:00 |
|
Gregory Nutt
|
754541a381
|
Change the way PHY interrupts work: disable automatically. Then we have to re-subscribe each time after the interrupt fires
|
2014-08-17 16:51:56 -06:00 |
|
Gregory Nutt
|
2fab4eaa5a
|
In order to get PHY interrupts, they must be enabled at the PHY (still don't get PHY interrupts)
|
2014-08-17 13:03:18 -06:00 |
|
Gregory Nutt
|
e0ef5a08bc
|
For all SAM Ethernet, need to enable management interface before reading PHY regisers in IOCTL
|
2014-08-17 11:09:54 -06:00 |
|
Gregory Nutt
|
2edcca009c
|
SAM3/4 Ethernet: Clone ioctl support from the SAMA5
|
2014-08-17 06:54:37 -06:00 |
|
Gregory Nutt
|
4c90c03028
|
Use the device name assigned by the registration process, not our best guess
|
2014-08-16 15:14:39 -06:00 |
|
Gregory Nutt
|
8f6f564971
|
More of the PHY event notification logic change: Fix some compile errors when full feature is enabled; Add some missing ioctol logic
|
2014-08-16 15:04:09 -06:00 |
|
Gregory Nutt
|
329ae8024d
|
Implement all network ioctls, including the new ioctl to setup PHY event notifications.
|
2014-08-16 14:09:14 -06:00 |
|
Gregory Nutt
|
85070e057e
|
Modified to support the change to the network ioctl signature changes. Also add support for new ioctl to setup PHY event notifications.
|
2014-08-16 14:08:58 -06:00 |
|
Gregory Nutt
|
74735bb495
|
Fix conditional compilation error
|
2014-08-12 10:00:58 -06:00 |
|
Gregory Nutt
|
511d7bb38a
|
Adds support for localtime. From Max Neklyudov
|
2014-08-12 06:18:22 -06:00 |
|
Gregory Nutt
|
1474a56014
|
Fix a computation error in the fix for the last computational error
|
2014-08-11 12:07:49 -06:00 |
|
Gregory Nutt
|
304b3b547c
|
Correct time conversion, 1000000 not 1000 to convert seconds to microseconds.
|
2014-08-11 11:14:10 -06:00 |
|
Gregory Nutt
|
6e7cb4be58
|
Comment out reassessment of timer in the middle of context switches. Need to revisit
|
2014-08-11 07:05:47 -06:00 |
|
Gregory Nutt
|
bb1213ab89
|
SAMA5 Tickless: Corrects some logic errors with timer/counter frequency
|
2014-08-10 19:04:18 -06:00 |
|
Gregory Nutt
|
bffc875d2e
|
Cosmetic
|
2014-08-10 16:09:45 -06:00 |
|
Gregory Nutt
|
a2ee73235d
|
Cosmetic changed, updated README files, improved comments
|
2014-08-10 13:11:31 -06:00 |
|
Gregory Nutt
|
77d49f50e0
|
Don't try to return time remaining if the timespec pointer is NULL
|
2014-08-10 11:39:16 -06:00 |
|
Gregory Nutt
|
9a4e1f6fdd
|
Move TC debug options to one file
|
2014-08-10 11:38:44 -06:00 |
|
Gregory Nutt
|
33965a21e3
|
Update comments
|
2014-08-10 11:38:08 -06:00 |
|
Gregory Nutt
|
42b1bcdf33
|
SAMA5: Fix bugs in timer/counter interrupts and one-shot timer
|
2014-08-10 10:47:38 -06:00 |
|
Gregory Nutt
|
9cb0b680ac
|
SAMA5 Timer/counter repair: Missing sem_post() caused a hang
|
2014-08-09 18:34:52 -06:00 |
|
Gregory Nutt
|
c61ec08ee8
|
SAMA5: Use the one-shot and free-running timers to implement tickless OS support for SAMA5
|
2014-08-09 17:14:51 -06:00 |
|
Gregory Nutt
|
19ee65ac3e
|
SAMA5 free-running timer: Add support for a free-running timer wrapper around the low-level timer/counter logic.
|
2014-08-09 16:43:48 -06:00 |
|
Gregory Nutt
|
f9601b6801
|
SAMA5 oneshot: Some clean-up and correction to the initial implementation
|
2014-08-09 16:42:04 -06:00 |
|
Gregory Nutt
|
e4981b09d9
|
SAMA5 timer/counter: Add support for a one-shot timer wrapper around the low-level timer/counter logic. This also involved several changes that rippled into the ADC driver (untested).
|
2014-08-09 15:27:55 -06:00 |
|
Gregory Nutt
|
c7662e3f92
|
SAMA5 T/C: Can now handle non-constant BOARD_MCK_FREQUENCY. Also now supports methods to attach user interrupt handlers
|
2014-08-09 10:30:45 -06:00 |
|
Gregory Nutt
|
6455f60c60
|
Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures
|
2014-08-08 18:39:28 -06:00 |
|
Gregory Nutt
|
4dc151097e
|
Replace os_internal.h with sched/sched.h in files that actually reference something in sched.h
|
2014-08-08 17:53:55 -06:00 |
|
Gregory Nutt
|
c98ece6bec
|
Move task control files from sched/ to sched/task
|
2014-08-08 16:44:08 -06:00 |
|
Gregory Nutt
|
1c99d53bb1
|
Move clock functions from sched/ to sched/clock
|
2014-08-08 14:43:02 -06:00 |
|
Gregory Nutt
|
192f82f380
|
Move interrupt dispatch logic from sched/ to sched/irq
|
2014-08-08 14:31:15 -06:00 |
|
Gregory Nutt
|
39183d37b8
|
Change all time conversions. Yech. New timer units in microseconds breaks all existing logic that used milliseconds in the conversions. Something likely got broken doing this, probably because I confused a MSEC2TICK conversion with a TICK2MSEC conversion. Also, the tickless OS no appears fully functional and passes the OS test on the simulator with no errors
|
2014-08-07 18:00:38 -06:00 |
|
Gregory Nutt
|
594083d870
|
Rename up_timerinit() to up_timer_initailize(); Add prototypes for candidate interfaces for the tickless OS; Don't build existing timer initialization logic if CONFIG_SCHED_TICKLESS is defined.
|
2014-08-06 16:26:01 -06:00 |
|
Gregory Nutt
|
d4a29fcf7e
|
SAMA5D3 HSMCI: TX DMA is again disabled
|
2014-08-05 07:07:39 -06:00 |
|
Gregory Nutt
|
553a16fac5
|
SAMA5 PCK: Add Main clock as an option for the PCK clock source
|
2014-08-03 10:17:50 -06:00 |
|
Gregory Nutt
|
1fc8f2b06d
|
SAMA5 SSC: Verify that the requested bit width is supported. Correct some alignment tests that depend upon the data bit width.
|
2014-08-02 14:26:49 -06:00 |
|
Gregory Nutt
|
715cf207ea
|
SAMA5 WM8904: Fix errors in programmable clock output configuration
|
2014-08-01 15:18:58 -06:00 |
|
Gregory Nutt
|
5e92347d60
|
SAMA5 SSC: Start Delay is now configurable
|
2014-08-01 14:10:37 -06:00 |
|
Gregory Nutt
|
d68a6059e0
|
SAMA5 SSC: Frame Synch Delay is now configurable
|
2014-08-01 12:25:31 -06:00 |
|
Gregory Nutt
|
c2c2921901
|
SAMA5D SSC: Needs to account for data offset in audio buffer.
|
2014-07-31 19:14:24 -06:00 |
|
Gregory Nutt
|
513329fd24
|
SAMA5D3X-EK: Add support for the WM8904 audio CODEC
|
2014-07-31 11:14:57 -06:00 |
|
Gregory Nutt
|
ffcc0b8da3
|
SAMA5: Changes needed for a clean SAMA5D3 build after all of the recent SAMA5D4 changes.
|
2014-07-31 11:09:56 -06:00 |
|
Gregory Nutt
|
c0c4cda763
|
SAMA5 HSMCI: e-enable TX DMA and verify that DMA writes to the SD card are functional. They are so now TX DMA is re-enabled in the driver. This might affect the SAMA5D3 platforms where the TX DMA problem was found. The SAMA4D3 and 4 use the same HSMCI driver. Much has change since then and it is not surprising that DMA is now functional. However, the has not be re-verified on the SAMA5D3 which has a different DMA controller.
|
2014-07-30 11:20:06 -06:00 |
|
Gregory Nutt
|
611ea42dbf
|
SAMA5D HSMCI: Fix a problem on card insertion/removal callback handling. Interrupts were being disable so that the callbacks occurred with interrupts disabled. This resulted in loss of some interrupts and some not-so-good behaviors. The solution is to perform all callbacks on the work thread unconditionally (2014-7-29).
|
2014-07-30 10:19:41 -06:00 |
|
Gregory Nutt
|
059812c872
|
SAMA5D HSMCI: Add method to do RX transfer without DMA. The 8-byte SCR transfer was failing silently with the DMA transfer, leaving the SD card in single bit mode
|
2014-07-29 21:13:28 -06:00 |
|
Gregory Nutt
|
e053158f95
|
SAMA5D-EK: Correct system timer frequency. Input clock is MCK/2, not MCK
|
2014-07-29 07:12:36 -06:00 |
|
Gregory Nutt
|
29ea8ab0e4
|
Cosmetic changes to comments
|
2014-07-29 07:11:16 -06:00 |
|
Gregory Nutt
|
42a975af74
|
Fixes to last SAMA5 PMIC checkin
|
2014-07-28 17:09:37 -06:00 |
|
Gregory Nutt
|
99927e918d
|
LPC17xx: DC updates from Max. Also fixes some syntax errors that I introduced in the last commit.
|
2014-07-28 07:23:49 -06:00 |
|
Gregory Nutt
|
dd4be66f1c
|
ARM: Move L2 cache initialization to much later in the sequence
|
2014-07-27 10:03:33 -06:00 |
|
Gregory Nutt
|
b57d2182ab
|
ARMv7-A L2 Cache currently depends on EXPERIMENTAL because it does not yet work properly
|
2014-07-26 18:48:54 -06:00 |
|
Gregory Nutt
|
6f5280d284
|
ARMv7 L2 Cache: Minor bugfixes/improvements
|
2014-07-26 18:48:26 -06:00 |
|
Gregory Nutt
|
ee59870325
|
Enables cache early in boot-up sequence
|
2014-07-26 18:48:00 -06:00 |
|
Gregory Nutt
|
4e146d2ec2
|
Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache operations will pick up L2 support if it is enabled
|
2014-07-26 18:47:33 -06:00 |
|
Gregory Nutt
|
873788bf5a
|
New cache.h file. Renames cp15_XYZ_cache() to arch_XYZ_cache() and addes L2 cache support if L2 cache is enabled
|
2014-07-26 18:46:52 -06:00 |
|
Gregory Nutt
|
2eb526253b
|
Rename ARMv7-A cache.h to cp15_cache.h. Things will be broken on this commit until I get the new cache.h in place.
|
2014-07-26 16:54:19 -06:00 |
|
Gregory Nutt
|
6d9ca195ee
|
arch/arm/src/armv7-a/arm_l2cc_pl310.c, l2cc.h, l2cc_pl310.h, Kconfig: Add initiali support for the ARM L2CC-PL310 L2 cache.
|
2014-07-26 16:50:08 -06:00 |
|
Gregory Nutt
|
fcbf89c6f6
|
ARMv7-A: L2CC PL310 address filtering is an optional feature
|
2014-07-25 19:46:09 -06:00 |
|
Gregory Nutt
|
a007fa3f5e
|
ARMv7-A: Add missing L2CC PL310 bit definitions
|
2014-07-25 19:41:35 -06:00 |
|
Gregory Nutt
|
e74f37445b
|
rch/arm/armv7-a/l2cc_pl310.h: Move arch/arm/sama5/chip/sam_l2cc.h to arch/arm/armv7-a/l2cc_pl310.h. Adjust the two corresponding Kconfig files as well.
|
2014-07-25 17:25:17 -06:00 |
|
Gregory Nutt
|
2ec0ab3b5e
|
3rd time is a charm. Max is right, the initial priority setting should be NVIC_SYSH_PRIORITY_MIN
|
2014-07-24 16:51:07 -06:00 |
|
Gregory Nutt
|
1366ce0a02
|
Oops, should have been NVIC_SYSH_PRIORITY_DEFAULT
|
2014-07-24 16:42:15 -06:00 |
|
Gregory Nutt
|
a3d20b2fa1
|
LPC17 Ethernet: Added option to use the kernel worker thread to do most of the workload with CONFIG_NET_WORKER_THREAD option in Kconfig. Eliminated a problem with PHY DP83848C : it doesn't need a specific initialization on mbed. Critical bufix: From time to time (after some hours) the Ethernet receiver would lose one receive interrupt and the IP stack never recover because there is no receive watchdog as the transmit watchdog. From Max
|
2014-07-24 16:39:18 -06:00 |
|
Gregory Nutt
|
dd74e75d1e
|
Added burstmode ADC conversion mode, with CONFIG_ADC_BURSTMODE option in Kconfig. From Max
|
2014-07-24 16:23:31 -06:00 |
|
Gregory Nutt
|
21d67c5b1b
|
Mostly cosmetic changes from Max
|
2014-07-24 16:00:21 -06:00 |
|
Gregory Nutt
|
43a578d2d3
|
Eliminate warnings. From Max
|
2014-07-24 15:50:37 -06:00 |
|
Gregory Nutt
|
5e19807250
|
Correct the initial value of the BASEPRI register. This was apparently never being initialized. From Max
|
2014-07-24 15:37:13 -06:00 |
|
Gregory Nutt
|
949e002d76
|
Fix a recently introduced typo that was being masked by some bad conditional compilation
|
2014-07-22 11:45:14 -06:00 |
|
Gregory Nutt
|
d57c3b4e82
|
Update ChangeLog
|
2014-07-22 07:25:01 -06:00 |
|
Gregory Nutt
|
45c03e5a1a
|
STM32 OTGFS device: Various changes to try to reduce that amount of time in interrupts handles and with interrupts disbled. Needs verification on other platforms. From Petteri Aimonen
|
2014-07-22 07:23:17 -06:00 |
|
Gregory Nutt
|
615b7d6c7a
|
Fix typos in the STM32 DAC header file. From Petteri Aimonen
|
2014-07-22 07:13:33 -06:00 |
|
Gregory Nutt
|
af8f5f4bdc
|
SAMA5D4 XDMAC: Never sets a channel as secure. Will probably have to revisit this
|
2014-07-21 17:46:35 -06:00 |
|
Gregory Nutt
|
4ce2e094ba
|
SAMA5D4: Fix some HSMCI issues when XDMAC0 is enabled
|
2014-07-21 17:45:48 -06:00 |
|
Gregory Nutt
|
80c0b5628d
|
SAMA5 HSMCI: Correct multi-block DMA setup; Fixes related to DMA timeout. Still problems with HSMCI DMA via XDMAC
|
2014-07-21 16:49:56 -06:00 |
|
Gregory Nutt
|
519c8f3e97
|
SAMA5 XDMAC: Missing some CUBC bits
|
2014-07-21 16:47:16 -06:00 |
|
Gregory Nutt
|
2d69c2f519
|
SAMA4D5 HSMCI: Set burst size to 1, sample DMA registers on timeout, and don't return from transfer until BOTH the HSMCI transfer and DMA complete
|
2014-07-21 13:24:55 -06:00 |
|
Gregory Nutt
|
c5b58b189c
|
XDMAC register sampling missed CIM register; Should not set SWREQ bit in DMA setup
|
2014-07-21 13:23:36 -06:00 |
|
Gregory Nutt
|
35ea8f1542
|
Fix a commented out assertion
|
2014-07-20 17:06:55 -06:00 |
|
Gregory Nutt
|
b207138be9
|
Fix typos in comments
|
2014-07-20 13:09:47 -06:00 |
|
Gregory Nutt
|
7ba2d9ed36
|
SAMA5D4-EK: PIO Schmitt trigger logic backward
|
2014-07-20 13:04:30 -06:00 |
|
Gregory Nutt
|
9392953ea1
|
WM8904 w/NxPlayer: Fix some compile errors and warnings with debug enabled
|
2014-07-20 09:17:36 -06:00 |
|
Gregory Nutt
|
7c56185006
|
SAMA5D ADC: Fix some typos in conditional compilation
|
2014-07-19 13:56:48 -06:00 |
|
Gregory Nutt
|
3c29703c42
|
SAMA5 SCK: The SAMA5D3 does things a little differently
|
2014-07-19 13:55:53 -06:00 |
|
Gregory Nutt
|
e82143ac38
|
SAMA5 PCK: Add support for the slow clock as the PCK clock source
|
2014-07-19 13:55:08 -06:00 |
|
Gregory Nutt
|
8986bd3976
|
SAMA5: Update slow clock logic. Things work a little differently on the SAMA5D3
|
2014-07-19 13:25:59 -06:00 |
|
Gregory Nutt
|
813eade679
|
SAMA5: Add slow clock support
|
2014-07-19 13:07:55 -06:00 |
|
Gregory Nutt
|
c7055a4cb8
|
SAMA5D4-EK: Add WM8904 initialization logic
|
2014-07-19 11:58:53 -06:00 |
|
Gregory Nutt
|
8055a59d49
|
SAMA5 LCDC: Back out the delay kludge. Increase the LCDC input clock from MCK to 2*MCK was sufficient for all timing instbility problems
|
2014-07-12 11:24:14 -06:00 |
|
Gregory Nutt
|
424d47cfee
|
SAMA5D4-EK LCDC: Change source clock to 2*Mck seems to solve stability issues
|
2014-07-12 09:45:05 -06:00 |
|
Gregory Nutt
|
30603b1021
|
SAMA5D4-EK LCDC: Adding a delay after enabling the LCD solves lots of start-up timing issues
|
2014-07-12 08:05:22 -06:00 |
|
Gregory Nutt
|
20493f1212
|
Lpc17xx Ethernet: Comment out an assertion that is reported to first inappropriately. From Max
|
2014-07-11 12:25:11 -06:00 |
|
Gregory Nutt
|
67468408ae
|
SAMA5D4-EK LCD: Actual hardware with appears to be RGB888
|
2014-07-10 12:23:41 -06:00 |
|
Gregory Nutt
|
c7d53cb927
|
SAMA5D4-EK: LCDC works (with a few color problems)
|
2014-07-10 12:03:10 -06:00 |
|
Gregory Nutt
|
6563ae07c2
|
Don't have to set SDA high initially in I2C reset because that is done by the pin configuration
|
2014-07-09 17:17:32 -06:00 |
|
Gregory Nutt
|
fc973eb512
|
SAMA5 PIO: Fix a typo in Schmitt trigger configuration; Configure pin as a a vanilla input first so that final pin configuration is more read-able (i.e., easier to debug)
|
2014-07-09 17:16:43 -06:00 |
|
Gregory Nutt
|
0d4255257d
|
SAMA5 I2C Reset: More changes... still does not work right
|
2014-07-09 15:09:06 -06:00 |
|
Gregory Nutt
|
c1ca11331d
|
SAMA5 TWI: Some restructured needed by up_i2creset. Also timeout needs to vary with the size of the transfer and if debug is on or not
|
2014-07-09 13:39:10 -06:00 |
|
Gregory Nutt
|
ee351dc695
|
Use sam_pio_forceclk() so that we can read the current state of an open-drain output in the TWI reset logic.
|
2014-07-09 11:31:21 -06:00 |
|
Gregory Nutt
|
c4b9eaa01f
|
Add a new interface sam_pio_forceclk() that can be used to force PIO clocking on. I am afraid I was too conservative with PIO clocking in the initial design; this is the price
|
2014-07-09 11:26:07 -06:00 |
|
Gregory Nutt
|
6c4f57b0dc
|
SAMA5 TWI: Add support for up_i2creset
|
2014-07-09 09:51:28 -06:00 |
|
Gregory Nutt
|
446d9daa94
|
SAMA5D4 LCDC: Adapt the SAMA5D3 LCDC driver to work with the SAMA5D4 which has no hardware cursor
|
2014-07-08 12:45:16 -06:00 |
|
Gregory Nutt
|
8bc8a86b90
|
SAMA5D3/4 HEAP: Add a configuration option to reserve DRAM for a framebuffer when executing out of DRAM.
|
2014-07-08 12:43:38 -06:00 |
|
Gregory Nutt
|
3fe95f83de
|
Fix some cloned errors in SAM GPIO interrupt setup
|
2014-07-07 15:54:37 -06:00 |
|
Gregory Nutt
|
14c90921b3
|
SAMA5D3/4: Fix two issues associated with PIO interrupts
|
2014-07-07 14:16:29 -06:00 |
|
Gregory Nutt
|
ae95f4e4d2
|
SAMA5D3/4 I2C: Test for read or write operation was reversed. How could this have worked before?
|
2014-07-07 09:54:43 -06:00 |
|
Gregory Nutt
|
194f9721f7
|
SAM3/4: Fix compile of sam_aes.c if CONFIG_CRYPTO_AES is defined. rom Max Nekludov
|
2014-07-07 08:03:18 -06:00 |
|
Gregory Nutt
|
56629f7fde
|
maXTouch: Fix test of I2C_TRANSFER return value
|
2014-07-06 08:51:38 -06:00 |
|
Gregory Nutt
|
87055cff08
|
NET: Standardize naming of all protocal header lengths
|
2014-07-05 13:04:48 -06:00 |
|
Gregory Nutt
|
d7fe256821
|
NET: emoved all includes of uip.h; added includes of ip.h wherever needed. Tried to fix problems of the now missing sneak inclusions because uip.h was removed. There are probably a few of these that were missed.
|
2014-07-04 19:13:08 -06:00 |
|
Gregory Nutt
|
99ce3a44d7
|
Remove all inclusion of uip.h
|
2014-07-04 16:58:22 -06:00 |
|
Gregory Nutt
|
11e3a21411
|
NET: More renaming
|
2014-07-04 15:40:49 -06:00 |
|
Gregory Nutt
|
77439f3c75
|
AMA5 OHCI: Pointers to allocated port values were not being nullified after being deallocated. This caused some assertions when debug was enabled
|
2014-07-04 08:17:14 -06:00 |
|
Gregory Nutt
|
1211bbd904
|
Move crypto header files from include/crypto to include/nuttx/crypto
|
2014-07-03 18:35:08 -06:00 |
|
Gregory Nutt
|
ca1d7d0f32
|
Correct authorship on a few files
|
2014-07-03 18:28:26 -06:00 |
|
Gregory Nutt
|
2bd5963622
|
SAMA5 OHCI: Fix an error in a DEBUGASSERT statement. Caused assertion to fire inappropriately when a low- or full-speed device is removed and CONFIG_DEBUG=y
|
2014-07-03 13:06:28 -06:00 |
|
Gregory Nutt
|
8b2fb4725b
|
SAMA5D3/4: UPLL divisor to generate 48MHz for OHCI is different from the two families. No idea why.
|
2014-07-03 12:28:11 -06:00 |
|
Gregory Nutt
|
68f83f973e
|
CCM PROCFS: Changed the configuration a bit. I am still not happy about the coupling between procfs, mtd, and now STM32
|
2014-07-03 08:50:24 -06:00 |
|
Gregory Nutt
|
954048b8e9
|
Add STM32 CCM heep procfs
|
2014-07-03 08:18:24 -06:00 |
|
Gregory Nutt
|
7f5ea07329
|
Move cypto debug definitions to debug.h with other susbsystem-level debug
|
2014-07-03 07:58:43 -06:00 |
|
Gregory Nutt
|
1c0054114e
|
Beginning of a crypto/ subsystem from Max Neklyudov
|
2014-07-03 07:42:44 -06:00 |
|
Gregory Nutt
|
4c03534f9c
|
SAM4 AES driver from Max Neklyudov
|
2014-07-03 07:26:44 -06:00 |
|
Gregory Nutt
|
fb44a97359
|
SAM Ethernet: Eliminate a warning
|
2014-07-02 17:35:41 -06:00 |
|
Gregory Nutt
|
596dbc20ef
|
SAMA5D4-EK: NSH should run at 528MHz
|
2014-07-02 15:31:52 -06:00 |
|
Gregory Nutt
|
30fc821bc8
|
SAMA5D4-EK: NSH configuration now has TWI0 enabled and supports the I2C tool
|
2014-07-02 13:51:57 -06:00 |
|
Gregory Nutt
|
a420171a4a
|
SAMA5D4 EMAC: Add a kludge to work around a suspected hardware issue
|
2014-07-02 12:17:01 -06:00 |
|
Gregory Nutt
|
e7aa949380
|
SAM3/4 and SAMA5 Ethernet: Fix an error in the function that determines the number of free TX descriptors
|
2014-07-02 10:40:11 -06:00 |
|
Gregory Nutt
|
f5abca3952
|
SAMA54D-EK: Don't disable any features in the NSH configuration. Comments updated in several files
|
2014-07-02 08:54:53 -06:00 |
|
Gregory Nutt
|
313982ba18
|
NET: Rename XYZ_uiptxpoll to just XYZ_txpoll
|
2014-07-01 18:41:08 -06:00 |
|
Gregory Nutt
|
a2507acab8
|
SAMA5D4: Add a configuration option to force EMAC driver debug
|
2014-07-01 18:00:39 -06:00 |
|
Gregory Nutt
|
289dc6dc71
|
SAMA5D4: Fix error in EMAC driver (plus related EMAC/GMAC drivers)
|
2014-07-01 11:22:19 -06:00 |
|
Gregory Nutt
|
621ec21bfd
|
Rename uip_poll->devif_poll and uip_timer->devif_timer
|
2014-06-30 18:40:41 -06:00 |
|
Gregory Nutt
|
ade8807a61
|
Rename uip_input to devif_input
|
2014-06-30 18:11:17 -06:00 |
|
Gregory Nutt
|
c5f2ec1637
|
Fix typo/compile error introduced with last HSMCI changes
|
2014-06-30 16:08:29 -06:00 |
|
Gregory Nutt
|
d8f4b29d5f
|
SAM3/4: Important bugfix. Values read from PIO input pins do not change unless clocking to the PIO block is enabled
|
2014-06-30 14:26:09 -06:00 |
|
Gregory Nutt
|
03f3f8966c
|
SAMA5D3/4: Fix some logic in conversion of physical and virtal DRAM addresses when running out of DRAM
|
2014-06-30 11:04:34 -06:00 |
|
Gregory Nutt
|
f6a3d4b728
|
SAMA5D4: Don't touch ISLR unless PIO is configured as an interrupt
|
2014-06-30 09:17:42 -06:00 |
|
Gregory Nutt
|
3010eddf11
|
STM32: Add configuration support fort he STM32F103RC. From Kosma Moczek
|
2014-06-30 08:16:17 -06:00 |
|
Gregory Nutt
|
ed02593af7
|
STM32: Reorder MCUs in choice menu; remove duplicates. From Kosma Moczek
|
2014-06-30 08:13:12 -06:00 |
|
Gregory Nutt
|
48e6f0ba78
|
STM32: Move temperature ranges from chip selection configuration prompts. From Kosma Moczek
|
2014-06-30 08:09:19 -06:00 |
|
Gregory Nutt
|
bfff6190d0
|
Unconfigure GPIO pins when closing a serial port to prevent back effects from back-powering on the TX pin. From Kosma Moczek
|
2014-06-30 08:02:26 -06:00 |
|
Gregory Nutt
|
a095b1b260
|
Make variable definitions 'static const' when possible to save RAM usage. From Kosma Moczek
|
2014-06-30 07:39:51 -06:00 |
|
Gregory Nutt
|
c4ace8244d
|
Fix typos in debug statements
|
2014-06-30 07:38:02 -06:00 |
|
Gregory Nutt
|
ce710bb94a
|
SAMA5 PIO: Add support for secure interrupts; Fix PIO debug output
|
2014-06-29 17:46:55 -06:00 |
|
Gregory Nutt
|
e681a582a7
|
SAMA5: Remove kruft in PIO header file
|
2014-06-29 17:45:42 -06:00 |
|
Gregory Nutt
|
70fa9ad81d
|
SAMA5D4 HSMCI: Fix a compiler in a debug statement
|
2014-06-29 12:01:08 -06:00 |
|
Gregory Nutt
|
1384148415
|
SAMA5D4 XDMA: Fix some typos
|
2014-06-29 11:24:57 -06:00 |
|
Gregory Nutt
|
9fab30e3b5
|
Fix system bus IDs for SAMA5D4; Don't use explicit PERIPHID_SHIFT for symmetry with memory
|
2014-06-29 11:24:10 -06:00 |
|
Gregory Nutt
|
d4f27b9e08
|
SAMA5D: Don't use explicit DMACH_FLAG_MEMPID_SHIFT; it does not exist in the SAMA5D4
|
2014-06-29 09:52:07 -06:00 |
|
Gregory Nutt
|
7c8c583722
|
SAMA5: Add configuration to assign an XDMAC channel to an HSMCI
|
2014-06-29 08:43:46 -06:00 |
|
Gregory Nutt
|
b7fad79a1d
|
SAMA5D4-EK: Updates to get the at25boot configuration building correctly
|
2014-06-28 09:39:50 -06:00 |
|
Gregory Nutt
|
e4990dda4d
|
Rename uip_driver_s net_driver_s
|
2014-06-27 16:48:12 -06:00 |
|
Gregory Nutt
|
72d8a6a7ef
|
SAM4CM: Fixes from Macs N
|
2014-06-27 12:27:02 -06:00 |
|
Gregory Nutt
|
b26d5d2191
|
SAM4CM: Add IPC register header file. From Macs N
|
2014-06-27 12:02:30 -06:00 |
|
Gregory Nutt
|
f8e5e82402
|
Add support for a network device IOCTL to access PHY registers. Ioctls only implemented for STM32. From Lazlo
|
2014-06-27 09:30:41 -06:00 |
|
Gregory Nutt
|
6a451baa51
|
SAMA5D4: Add configuration to redirect all interrupts to the AIC
|
2014-06-26 11:51:39 -06:00 |
|
Gregory Nutt
|
fd7b06c68e
|
STM32 I2C reset. Add missing GPIO configuration. From Alex D
|
2014-06-25 16:08:31 -06:00 |
|
Gregory Nutt
|
ff97ad1245
|
Clean-up packet socket naming
|
2014-06-25 10:34:52 -06:00 |
|
Gregory Nutt
|
57383ea2f3
|
Rename ip_eth_hdr to eth_hdr_s
|
2014-06-25 09:57:52 -06:00 |
|
Gregory Nutt
|
fae790a6dc
|
Add support for the SAM4CM. From Max Neklyudov
|
2014-06-25 08:25:52 -06:00 |
|
Gregory Nutt
|
11896e1481
|
Move the remaining files from include/nuttx/net/uip to include/nuttx/net; Rename *_internal.h header files in net/ to just *.h
|
2014-06-24 10:14:15 -06:00 |
|
Gregory Nutt
|
b34a1f1e01
|
Move include/nuttx/net/uip/uip-arch.h to include/nuttx/net/netdev.h
|
2014-06-24 09:28:44 -06:00 |
|
Gregory Nutt
|
00667926a9
|
Move include/nuttx/net/uipopt.h to include/nuttx/net/netconfig.h
|
2014-06-24 08:53:28 -06:00 |
|
Gregory Nutt
|
eb340e683f
|
Add support for the LPCXpresso's RTC, ADC, DAC, Timer, PWM, and MCPWM. All form Max
|
2014-06-23 12:13:52 -06:00 |
|
Gregory Nutt
|
4e3c794363
|
SAMA5D4: Add missing mappings for the VDEC and L2CC memory regions
|
2014-06-21 14:25:47 -06:00 |
|
Gregory Nutt
|
4b9666658e
|
Correct type of SAMA5 arm_decodefiq() return value
|
2014-06-21 10:34:35 -06:00 |
|
Gregory Nutt
|
0a134f0158
|
Need to enable FIQ in initial task state; Improve H32/64 test in IRQ handling
|
2014-06-21 09:55:09 -06:00 |
|
Gregory Nutt
|
40b7ddf68e
|
SAMA5: FIQs should be disabled along with IRQs on most exeptions in most configuratinons. arm_decodefiq and arm_decodeirq are mutually exclusive and, hence, can use the same interrupt stack
|
2014-06-20 18:49:01 -06:00 |
|
Gregory Nutt
|
c68d2532be
|
SAMA5D4: Add support for secure/FIQ interrupts; SAIC supports need to be be enabled unconditionally
|
2014-06-20 18:16:41 -06:00 |
|
Gregory Nutt
|
8f4f73884b
|
SAMA5D4: Fix MATRIX32 base address
|
2014-06-20 18:15:13 -06:00 |
|
Gregory Nutt
|
8fb8774c26
|
SAMA5D4: Minor fixes to get working with SAMA5D3 again
|
2014-06-20 16:01:45 -06:00 |
|
Gregory Nutt
|
0a2133b57f
|
SAMA5D4: Add partial support for secure interrupt controller (SAIC)
|
2014-06-20 15:22:00 -06:00 |
|
Gregory Nutt
|
aecddf9b52
|
SAMA5D4: USART peripheral clock appears to be MCK/2
|
2014-06-20 11:40:36 -06:00 |
|
Gregory Nutt
|
b31f34cf94
|
SAMA5D4-EK: Make sure that the H32MX divider is set; correct sense of bit driver red LED
|
2014-06-20 10:33:33 -06:00 |
|
Gregory Nutt
|
9869c9b50d
|
SAMA5D4: Fix peripheral clocking macros: AIC and L2CC are continuously clocked
|
2014-06-19 15:52:42 -06:00 |
|
Gregory Nutt
|
c14d80ee25
|
SAMA5D4: Initial bring-up fixes
|
2014-06-19 14:16:36 -06:00 |
|
Gregory Nutt
|
902c1342b9
|
Cosmetic cleanup
|
2014-06-18 08:24:53 -06:00 |
|
Gregory Nutt
|
e2ede42d14
|
SAMA5D4: XDMAC driver now compiles error/warning free (still untested)
|
2014-06-17 16:31:09 -06:00 |
|
Gregory Nutt
|
4b3342fd96
|
SAMA5D4: More progress on XDMAC driver (still no complete); Also fixes some critical errors in the SAMA5D3 DMA definitions
|
2014-06-17 13:18:52 -06:00 |
|
Gregory Nutt
|
5d73322dc7
|
SAMA5D4: Correct MATRIX register addresses
|
2014-06-14 10:42:53 -06:00 |
|
Gregory Nutt
|
1a236c13de
|
SAMA5D4: Implement SDRAM initialization
|
2014-06-14 10:42:26 -06:00 |
|
Gregory Nutt
|
9e7eb2d12d
|
SAMA5D4: Fix some memory remapping issues; updates to comments and README files
|
2014-06-14 08:02:58 -06:00 |
|
Gregory Nutt
|
cf72b05936
|
SAMA5: XDMAC update (still not complete)
|
2014-06-13 11:59:44 -06:00 |
|
Gregory Nutt
|
ab79090ce0
|
SAMA5D4: Initial XDMAC driver logic; initial check-in is little more the the DMAC driver with some name changes
|
2014-06-12 16:33:04 -06:00 |
|
Gregory Nutt
|
a2cb59cab8
|
First check-in of Lazlo's PF_PACKET 'raw' socket implementation
|
2014-06-12 11:52:06 -06:00 |
|
Gregory Nutt
|
a23245781a
|
STM32: Handle setting of USART CR1_M when 8 bits of data plus parity
|
2014-06-11 15:49:54 -06:00 |
|
Gregory Nutt
|
5009def270
|
Typo in last SAMA5D4 commit
|
2014-06-11 13:43:54 -06:00 |
|
Gregory Nutt
|
bb8fd2fa2c
|
SAMA5: Add support for Micrel KSZ8081 PHY
|
2014-06-11 13:25:59 -06:00 |
|
Gregory Nutt
|
22a36b7af3
|
SAMA5D4: Add EMAC driver
|
2014-06-11 12:23:31 -06:00 |
|
Gregory Nutt
|
288c891ad1
|
SAMA5D4: Still trying to reconcile Ethernet interfaces
|
2014-06-11 08:01:48 -06:00 |
|
Gregory Nutt
|
379f516780
|
SAMA5D3/4: More renaming. Change SAMA5D3 EMAC to EMACA and SAMA5D4 to EMACB so that the configuration and build system can configure them. I might come up with something better later
|
2014-06-10 17:40:25 -06:00 |
|
Gregory Nutt
|
348e666278
|
STM32: Expicitly include header file files. From Freddie Chopin
|
2014-06-10 15:49:48 -06:00 |
|
Gregory Nutt
|
e9aec9fdff
|
SAMA5D4: update MATRIX register definitions for the SAMA5D4
|
2014-06-10 13:15:29 -06:00 |
|
Gregory Nutt
|
f14775b755
|
SAMA5D4: Complete MPDDR header file
|
2014-06-10 11:16:05 -06:00 |
|
Gregory Nutt
|
021122f921
|
SAMA5D4: Add MPDDRC file (incomplete)
|
2014-06-10 08:46:14 -06:00 |
|
Gregory Nutt
|
d54b7b733c
|
Move SAMA5D3 MPDDRC definitions to a separate header file
|
2014-06-10 08:11:31 -06:00 |
|
Gregory Nutt
|
fc343d833a
|
SAMA5D4: Update LCDC header file
|
2014-06-09 13:27:08 -06:00 |
|
Gregory Nutt
|
3a10623e29
|
Add logic to select between incompatible SAMA5D3 and SAMA5D4 EMAC header files
|
2014-06-09 12:24:39 -06:00 |
|
Gregory Nutt
|
48a8ead37b
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SAMA5: Back out most of commit c37b5b7b97d0644743c04f2c3d9e2b7ef9f5d698. Things are going to have to be done differently
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2014-06-09 12:16:16 -06:00 |
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Gregory Nutt
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a72cf5ee76
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SAMA5D4: Updated EMAC header file
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2014-06-09 11:40:11 -06:00 |
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Gregory Nutt
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6fb582d1af
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SAMA5D4: Add EMAC header file
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2014-06-09 11:29:02 -06:00 |
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Gregory Nutt
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fa3e843ddc
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SAMA5D4: More header file changes
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2014-06-09 10:07:00 -06:00 |
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Gregory Nutt
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78c9fcdfb9
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SAMA5D4: update ISI register definition header file
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2014-06-09 09:29:23 -06:00 |
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Gregory Nutt
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979b732f3b
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SAMA5D4: Completes PMC modifications for the SAMA5D4
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2014-06-09 07:55:51 -06:00 |
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