Gregory Nutt
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c9b15ebb6a
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Xtensa ESP32: Remove call to sched_lock()/unock() from inter-cpu interrupt logic. Results in recursive call to sched_mergepending().
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2016-12-25 09:26:20 -06:00 |
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Gregory Nutt
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b87fc91466
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Revert "Xtensa SMP: Avoid a nasty situation in SMP by assuring that up_release_pending() is not re-entered."
This reverts commit 733a57b4df .
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2016-12-25 07:12:46 -06:00 |
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Gregory Nutt
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efb86382c3
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SMP: Back out deferred IRQ locking. This was accidentally merged into master and it looks like it is going to be more work than I thought to get it working again. Changes will go to the irqlock branch.
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2016-12-24 19:53:37 -06:00 |
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Gregory Nutt
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1b790a61cd
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Xtensa ESP32: Add stack checking logic.
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2016-12-23 15:51:33 -06:00 |
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Gregory Nutt
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c7f5435637
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Implement deferred IRQ locking. The rest of the support for Xtensa. Untested.
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2016-12-23 11:56:45 -06:00 |
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Gregory Nutt
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cb1cc66d81
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Implement deferred IRQ locking. Adds partial support for Xtensa. More is needed.
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2016-12-23 11:39:44 -06:00 |
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Gregory Nutt
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5f9caad078
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Xtensa ESP32: Correct copyright info; update some comments
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2016-12-22 12:34:55 -06:00 |
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Gregory Nutt
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714e6f80ca
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Xtensa ESP32: Corrects a problem with dispatching to signal handlers: Cannot vector directly to the signal handling function as in other ABIs under the Xtensa Window ABI. In that case, we need to go through a tiny hook when performs the correct window call (call4) otherwise registers will be scrambled in the signal handler
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2016-12-22 11:19:38 -06:00 |
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Gregory Nutt
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d9a64b9ca9
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Xtensa ESP32: Some fixes from integration of ostest configuration. Almost works: There are some assertions in xtensa_sigdeliver()
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2016-12-22 09:34:39 -06:00 |
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Gregory Nutt
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733a57b4df
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Xtensa SMP: Avoid a nasty situation in SMP by assuring that up_release_pending() is not re-entered.
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2016-12-21 13:34:01 -06:00 |
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Gregory Nutt
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588d2b506f
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Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem.
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2016-12-21 08:04:48 -06:00 |
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Gregory Nutt
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1b7162a0db
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Eliminate a warning
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2016-12-21 08:04:48 -06:00 |
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Gregory Nutt
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81697f2285
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Xtensa ESP32: Fix APP CPU startup... Can't use semaphores on the IDLE thread.
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2016-12-20 11:26:37 -06:00 |
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Gregory Nutt
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6d5a718b98
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Xtensa ESP32: A few fixes for APP CPU start-up
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2016-12-20 10:38:27 -06:00 |
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Gregory Nutt
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4e9a0ffea5
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Xtensa ESP32: Update APP CPU startup logic to match current Expressif example code.
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2016-12-20 09:00:04 -06:00 |
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Gregory Nutt
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3b681586c0
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Xtensa ESP32: Missing prologue/epilogue macros on C callable function
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2016-12-20 08:31:36 -06:00 |
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Gregory Nutt
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e5182acbe3
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Xtensa ESP32: Make sure that SMP configuratin still builds without errors.
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2016-12-19 14:12:19 -06:00 |
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Gregory Nutt
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e61549d8b9
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Xtensa ESP32: Clean-up and fixes from last commits
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2016-12-19 13:57:37 -06:00 |
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Gregory Nutt
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097f09cb02
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Xtensa ESP32: Corrects timer initialization and timer input frequency.
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2016-12-19 11:50:28 -06:00 |
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Gregory Nutt
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a9a39800a4
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Xtensa ESP32: Fixes some double faults and user errors, but I do not fully understand why.
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2016-12-19 11:14:08 -06:00 |
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Gregory Nutt
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886ce88b4f
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Xtensa ESP32: Automatically mount /proc at start-up.
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2016-12-19 09:43:16 -06:00 |
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Gregory Nutt
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2b0b698d72
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ESP32 Serial: Add logic to prevent infinite loops in interrupt handler.
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2016-12-18 16:04:25 -06:00 |
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Gregory Nutt
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71bb79a6c7
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ESP32 Serial: Fix some register bit definitions.
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2016-12-18 15:11:34 -06:00 |
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Gregory Nutt
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4bd530d026
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Xtensa ESP32: Last change should be conditioned on the window ABI.
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2016-12-18 13:17:31 -06:00 |
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Gregory Nutt
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665c1647b5
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Xtensa ESP32: Need to spill registers to memory as the last dying action before switching to a new thread.
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2016-12-18 12:54:47 -06:00 |
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Gregory Nutt
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586f0aab50
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Fix context save logic when called in window ABI configuration. Add an IDLE stack. Don't depend on the mystery stack received from the bootloader.
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2016-12-18 10:08:08 -06:00 |
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Gregory Nutt
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93e6d16f75
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Xtensa ESP32: wsr, not rsr.
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2016-12-17 11:23:10 -06:00 |
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Gregory Nutt
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a88c50d366
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Xtensa ESP32: Need to clone some logic for syncrhonous context switch. Window spill logic in the conmon restores logic is inappropriate in this context
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2016-12-17 11:00:12 -06:00 |
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Gregory Nutt
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6b80e5f15f
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Xtensa ESP32: Fix clobbered a9 in co-processor context save/restore
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2016-12-17 11:00:12 -06:00 |
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Gregory Nutt
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8de1127899
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Xtensa ESP32: Using wrong register to disable interrupts.
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2016-12-17 11:00:12 -06:00 |
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Gregory Nutt
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38ebe6c13f
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Xtensa ESP32: Change that should have been included in a previous commit was not.
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2016-12-17 08:11:32 -06:00 |
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Gregory Nutt
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05e798488b
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One register getting clobber on context save
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2016-12-17 08:10:10 -06:00 |
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Gregory Nutt
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adbacfc42c
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Xtensa ESP32: Fix a duplicate in Kconfig files. Level 1 should return via RFE.
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2016-12-17 07:07:33 -06:00 |
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Gregory Nutt
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6599feb310
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Xtensa ESP32: Fixes a few issue with restoring registers on interrupt return, but there is still a problem
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2016-12-16 17:56:22 -06:00 |
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Gregory Nutt
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cdd8dc72a5
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Xtensa ESP32: Basically a redesign of the interrupt dispatch logic.
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2016-12-16 15:36:52 -06:00 |
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Gregory Nutt
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d4ad5f04d3
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Xtensa ESP32: Minor rearchitecting of how CPU interrupts are enabled. MOre to come.
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2016-12-16 14:13:09 -06:00 |
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Gregory Nutt
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cd3d414ba2
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Xtensa: Fix some missing SMP logic
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2016-12-16 13:37:28 -06:00 |
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Gregory Nutt
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34a994b0f6
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Correct a logic problem the prevented dumping the IDLE thread's stack on an assertion
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2016-12-16 13:21:01 -06:00 |
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Gregory Nutt
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6337fadd8c
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Missing escape character on CR of CR-LF expansion.
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2016-12-16 10:49:42 -06:00 |
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Gregory Nutt
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935e49f5bb
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Update some comments
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2016-12-16 09:38:08 -06:00 |
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Gregory Nutt
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f1a5b91cd8
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Use r6, not r2 when passing paramters with call4
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2016-12-16 09:21:44 -06:00 |
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Gregory Nutt
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41cf32a20e
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Fix windowspill register handling + Use r6, not r2 when passing paramters with call4
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2016-12-16 09:20:36 -06:00 |
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Gregory Nutt
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aa5a8b0ca2
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Xtensa: Make sure that all C callable assembly functions includes ENTRY prologue and RET epilogue.
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2016-12-15 14:02:19 -06:00 |
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Gregory Nutt
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c56268b416
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Fix missing CALL0 ABI condition.
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2016-12-15 11:06:41 -06:00 |
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Gregory Nutt
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ea9e6c48e4
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Cosmetic update to comments.
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2016-12-15 10:43:34 -06:00 |
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Gregory Nutt
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10b9a10d2f
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Xtensa ESP32: Fix several build-related issues associated with vector section
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2016-12-15 10:08:26 -06:00 |
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Gregory Nutt
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b5e979d58f
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ESP32: Fix a couple of bugs associated with handling of CPU interrupts.
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2016-12-14 13:31:44 -06:00 |
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Gregory Nutt
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4052ec2d90
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Add missing ENTRY() and RET() macros in C callable assembly language. At one time I though the that the ESP32 support the CALL0 ABI. I was mistaken so there may be a few more like this.
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2016-12-14 12:14:51 -06:00 |
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Gregory Nutt
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730ca4ce41
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Fix missing semicolons in DEBUGASSERT statements
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2016-12-14 09:06:09 -06:00 |
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Angus Gratton
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dd5e47a418
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ESP32 core v2: Two changes (1) flushes the UART TX buffer in the esp32 serial shutdown routine. The ROM bootloader does not flush the FIFO before handing over to user code, so some of this output is not currently seen when the UART is reconfigured in early stages of startup. And changes the openocd config file's default flash voltage from 1.8V to 3.3V. This is not necessary right now, but may save some hard-to-debug moments down the track (3.3V-only flash running at 1.8V often half-works and does weird things...)
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2016-12-14 08:15:03 -06:00 |
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