Commit Graph

41761 Commits

Author SHA1 Message Date
Anthony Merlino
35553147ba stm32h7 rcc: Sync h7x7xx and h7x3xx. Changes are relevant to both 2021-05-20 00:53:49 -07:00
SPRESENSE
6b5a4cbfd3 arch: cxd56xx: Fix parameter check of hostif buffer
Fix a parameter check of the buffer attribute in opening hostif driver.
2021-05-20 07:23:48 +02:00
SPRESENSE
db9c94962b arch: cxd56xx: Add host interface driver
Add host interface driver which supports I2C or SPI slave feature.
2021-05-20 07:23:48 +02:00
SPRESENSE
5a7a118320 arch: cxd56xx: Fix uninitialized variable for gnss driver
Fix uninitialized variable in gnss driver.
CodeSonar Warning 518288 - 518292
2021-05-20 07:23:48 +02:00
SPRESENSE
151fec4e98 arch: cxd56xx: Do not re-initialize the console for subcore
If the subcore configuration, which is mainly used in the Spresense
Arduino environment, is enabled, the serial console has been already
initialized by maincore. Then, don't need to re-initialize the UART1
serial driver.
2021-05-20 07:23:48 +02:00
SPRESENSE
efd4789b72 arch: cxd56xx: gauge: Use the dedicated debug macro
Replace to the battery dedicated debug macro instead of standard one.
2021-05-20 07:23:48 +02:00
SPRESENSE
50cb0306b6 arch: cxd56xx: charger: Use the dedicated debug macro
Replace to the battery dedicated debug macro instead of standard one.
2021-05-20 07:23:48 +02:00
SPRESENSE
bb348cc464 arch: cxd56xx: gnss: Fix compile error in debug log
Fix compile error when debug log is enabled.
Replace debug message from obsolete logerr() to _err().
2021-05-20 07:23:48 +02:00
SPRESENSE
6d3fb9ee81 arch: cxd56xx: wdt: Fix compile error in debug log
Fix compile error when CXD56_WDT_REGDEBUG is enabled.
2021-05-20 07:23:48 +02:00
SPRESENSE
f0cae6cdf3 arch: cxd56xx: Fix multiple open and close ADC driver
ADC driver does not support multiple open and close. It causes the memory
corruption by multiple free. This commit fixes this problem by introducing
the reference counter.
2021-05-20 07:23:48 +02:00
SPRESENSE
98871e58af arch: cxd56xx: Fix gnss open error by clock change
If the system clock is changed during loading gnssfw, gnss open may be
failed. So this commit prohibits clock change until loading gnssfw is
completed.
2021-05-20 07:23:48 +02:00
SPRESENSE
e26da5f564 arch: cxd56xx: Update isop firmware
Update isop firmware which supports for the error handling and i2c
multi-master environment.
2021-05-20 07:23:48 +02:00
SPRESENSE
f548ffa7a7 arch: cxd56xx: Support execution error by SCU sequencer
Enable interrupt by SCU sequencer execution error. If the interrupt
occurs, then it stops the sequencer and returns the error code.
2021-05-20 07:23:48 +02:00
SPRESENSE
ba6201401f arch: cxd56xx: Remove unnecessary i2c settings
Remove slave address register setting that is unnecessary for the
transfer by SCU sequencer.
2021-05-20 07:23:48 +02:00
SPRESENSE
ade26c17d2 arch: cxd56xx: Update i2c register initialization
Enable RX_FIFO_FULL_HLD_CTRL and RESTART of i2c control register in
i2c initial settings for transfer by SCU sequencer.
2021-05-20 07:23:48 +02:00
SPRESENSE
a10a4c483f arch: cxd56xx: Add SCU register definitions
Add SCU register definitions.
2021-05-20 07:23:48 +02:00
SPRESENSE
09cc6b780b arch: cxd56xx: update loader and gnssfw version
Update loader and gnssfw to version 2.2.20175
2021-05-20 07:23:48 +02:00
SPRESENSE
a276de741f arch: cxd56xx: Fix SPI setmode function
When SSP mode is changed, SSE bit of SSPCR1 register must be disabled.
2021-05-20 07:23:48 +02:00
SPRESENSE
89fd987a1a arch: cxd56xx: Fix RTC alarm cancellation process
There is an issue that the next alarm is expired immediately after
canceling a RTC alarm. Fixed alarm settings to be completely cleared
when canceling an RTC alarm.
2021-05-20 07:23:48 +02:00
SPRESENSE
67a56410ee arch: cxd56xx: Prohibit clock change during SPI transfer
If the system clock is changed during the SPI transfer, the SPI data can
be corrupted. So this commit prohibits the clock change during SPI transfer,
and keep the clock until the transfer is completed.
2021-05-20 07:23:48 +02:00
SPRESENSE
db340a8941 arch: cxd56xx: Support for suppresion of clock change
Introduce PM_CPUFREQLOCK_FLAG_HOLD into the frequency lock mechanism in
power manager, which is used to keep the current frequency without clock
change, for example, during the transfer of a periphral.
2021-05-20 07:23:48 +02:00
SPRESENSE
9b3a80cc37 arch: cxd56xx: Fix uart getting stuck during a clock change
UART driver is stopped and re-started during a clock change. When a UART
interrupt is generated in each process, the unexpected behavior will
occur and a console will get stuck with UART driver. This commit fixed
each process is performed atomically.
2021-05-20 07:23:48 +02:00
David Sidrane
85f0bc591e mm:initialize ensure alignment.
Broken by 635cfa.

   On an stm32 the heap is formed from
   const uintptr_t g_idle_topstack = HEAP_BASE;
   where HEAP_BASE is &_bss + CONFIG_IDLE_STACKSIZE.

   Both these values are not deterministic. One
   comes from the compiler, the other the system
   configurator.

   a 3 byte bss and 250 byte stack would lead to
   and unaligned address used as the heap to be.

   The compiler used clever `strd r1,r3,[r5,#8]` to
   store 2 values in one memory cycle into the
   heap_impl struct. Resulting in a hardfault.

   Change the amount of bss or the CONFIG_IDLE_STACKSIZE
   could lead to a non-functional NuttX system.
2021-05-19 21:25:08 -05:00
Tanushree Baindur
2217d2f0d3 eagle100/configs/nxflat/defconfig: fix error: unused variable 'desc' 2021-05-19 20:43:39 -05:00
jordi
ccc8c078f9 xtensa/esp32: Fix warning "is not defined"
Detected with "-Werror" flag
2021-05-19 20:03:03 +01:00
Anthony Merlino
e37ce7677b Try to address CI build error and a few macro fixes. 2021-05-19 10:41:18 -07:00
Anthony Merlino
b54a4c7788 Replace more ATIM_/BTIM_ macros with GTIM_ macros 2021-05-19 10:41:18 -07:00
Anthony Merlino
58c92be39c stm32 timers: Make some register operations more readable. 2021-05-19 10:41:18 -07:00
SPRESENSE
0cc0c3d503 fs/vfs: Fix bug that select() did not return
Fix bug that select() did not return when the nfds argument
was set to a negative value. The specification is that -1 is
set to the return value and EINVAL is set to errno.
2021-05-19 06:43:22 -05:00
SPRESENSE
139f1f1548 drivers/modem/altair: Fix behavior when a reset packet conflicts with a send packet
Even in the case of a conflict between a reset packet
and a send packet, the send size is compared and the
larger size is sent as the payload.
2021-05-19 12:15:59 +02:00
chenwen
9a99d813fa risc-v/esp32c3: Support ESP32-C3 auto-sleep 2021-05-19 07:00:40 -03:00
Chen Wen
e44ec9e48e xtensa/esp32: Fix code nxstyle issue 2021-05-19 06:45:42 -03:00
chenwen
f7db743152 xtensa/esp32: Support auto-sleep 2021-05-19 06:45:42 -03:00
chenwen
f50160f0e1 xtensa/esp32: Support tick-less OS 2021-05-19 06:45:42 -03:00
SPRESENSE
4b1fddec8a drivers/mtd/smart.c: Recover the missing link of directory entry
When creating the next chain of directory entries, (1) add the position
of next entry to the current sector, and then (2) update the sector of
next entry. If the power is turned off between (1) and (2), the next
entry will not be found, and the chain of directory entries will break.
It causes the SmartFS file system corruption, and we will not be able
to add files.

To avoid this issue, in checking the filesystem by smart_fsck_directory,
if the sector of next entry does not exist, update the sector of
directory entry to invalidate the field of next entry.
2021-05-19 11:02:50 +02:00
Xiang Xiao
8afb16ca55 Don't include errno.h from spawn.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-05-19 10:11:15 +02:00
Xu Xingliang
f07df9dfc8 net: Forward socket option only when the socket type is usrsock
Change-Id: I5e102c4c648936f96834120e2c508f7072436246
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-05-19 03:07:04 -05:00
Jukka Laitinen
105f305b1b fs/fat/fat32util.c: Fix calculation of current sector with invalid cluster
If the current cluster is invalid, don't use the error code for calculating
the sector number. Instead just return the error code.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-05-19 03:06:34 -05:00
Abdelatif Guettouche
65e9ff5a48 xtensa/esp32/esp32_start.c: Remove an old and unnecessary piece of code.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-05-19 03:05:52 -05:00
Xiang Xiao
5f7c98b6e1 drivers/syslog: Remove emergstream implementation and caller
since emergstream always call syslog_force, but syslog_force is designed
for the interrupt context, and then doesn't mean any emergency thing.
On the other hand, emergstream has other bad side effect:
1.Can't output to file or dev channel
2.Can't work well with the interrupt buffer

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-05-18 09:26:28 -03:00
Dong Heng
f12de4f7d9 riscv/esp32c3: Add ESP32-C3 ADC driver 2021-05-18 09:20:46 -03:00
Gustavo Henrique Nihei
26a5cb2094 risc-v/esp32c3: Add support for DMA transfers on SPI driver 2021-05-17 13:21:12 +01:00
Gustavo Henrique Nihei
132ffdd28d risc-v/esp32c3: Add burst transfer support for GDMA 2021-05-17 13:21:12 +01:00
Jiuzhu Dong
5ec3ef0e56 group/group_signal: cancel dispatch signal when
the number of members in the group is zero.

Repetition step:
If using waitpid() to wait a task has exited, the waitpid will use
nxsing_kill with signal number 0 to determine if that task is still
alive, and will call group_signal to dispatch signal for each member
of the group and perform signal handing checks, it will assert at
sched/group/group_signal.c:261.

Change-Id: I75ef015a261101277436d742897ce68fed44b5da
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-05-17 07:14:27 -05:00
Xiang Xiao
b3e1d1c3df tools/ci: Remove sim01.dat and sim02.dat
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-05-16 21:03:22 -07:00
Masayuki Ishikawa
d8ca691e2a boards: sabre-6quad: Add ELF support to netnsh and netnsh_smp
Summary:
- This commit adds ELF support to netnsh and netnsh_smp

Impact:
- None

Testing:
- Tested with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-05-16 22:30:55 -05:00
Masayuki Ishikawa
a036546feb boards: sabre-6quad: Add posix_spawn/defconfig
Summary:
- This commit adds sabre-6quad/configs/posix_spawn/defconfig

Impact:
- None

Testing:
- Tested with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-05-16 22:30:55 -05:00
Masayuki Ishikawa
bd0e586c23 boards: sabre-6quad: Add elf/defconfig
Summary:
- This commit adds sabre-6quad/configs/elf/defconfig

Impact:
- None

Testing:
-Tested with QEMU

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2021-05-16 22:30:55 -05:00
Dong Heng
4a7f998c33 riscv/esp32c3: Fix RT timer issues
1. Enable alarm if there is timer active
2. Wake up main thread to delete timer
3. Wake up main thread when timer is timeout in ISR
2021-05-16 13:23:43 -05:00
Anthony Merlino
fa2b9ca43b stm32/stm32f7 tickless: Fix up_timer_getmask to be correct for the width of the timer. 2021-05-16 13:04:31 -05:00