Fix build break on thumb2 mode:
opus/celt/arm/celt_pitch_xcorr_arm-gnu.S: Assembler messages:
opus/celt/arm/celt_pitch_xcorr_arm-gnu.S:146: Error: thumb conditional instruction should be in IT block -- `movle pc,lr'
Reference:
https://developer.arm.com/documentation/100067/0612/armclang-Command-line-Options/-mimplicit-it
In A32 code, the integrated assembler accepts all conditional instructions
without giving an error or warning. In T32 code, the integrated assembler
outputs an implicit IT block when there is a conditional instruction
without an enclosing IT block. The integrated assembler does not give an
error or warning about this.
Signed-off-by: chao an <anchao@xiaomi.com>
The option '-mthumb' is only valid for C source files and it is not passed to the assembler.
If 'thumb' is not considered in some assembly projects, the system will generate
'undefined instructions' when running incompatible instruction:
arm_undefinedinsn: Undefined instruction at 0x380cfc98
This assembly file should be compiled with .thumb but it doesn't:
380cfc90 <hobot_i8_i32_gemm_nn_m4_n8_neon>:
380cfc90: e92d4ff0 push {r4, r5, r6, r7, r8, r9, sl, fp, lr}
380cfc94: ed2d8b10 vpush {d8-d15}
380cfc98: e59d4064 ldr r4, [sp, #100] ; 0x64 <-- Undefined instruction
380cfc9c: e59d5068 ldr r5, [sp, #104] ; 0x68
380cfca0: e59d606c ldr r6, [sp, #108] ; 0x6c
380cfca4: e59d7070 ldr r7, [sp, #112] ; 0x70
380cfca8: e1a08120 lsr r8, r0, #2
380cfcac: e1a091a1 lsr r9, r1, #3
380cfcb0: e1a0a122 lsr sl, r2, #2
After enable thumb:
.syntax unified
.thumb
or
-Wa,-mthumb
.Lhobot_i8_i32_gemm_nn_m4_n8_neon:
38001100: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
38001104: ed2d 8b10 vpush {d8-d15}
38001108: 9c19 ldr r4, [sp, #100] ; 0x64
3800110a: 9d1a ldr r5, [sp, #104] ; 0x68
3800110c: 9e1b ldr r6, [sp, #108] ; 0x6c
3800110e: 9f1c ldr r7, [sp, #112] ; 0x70
38001110: ea4f 0890 mov.w r8, r0, lsr #2
38001114: ea4f 09d1 mov.w r9, r1, lsr #3
38001118: ea4f 0a92 mov.w sl, r2, lsr #2
This commit will enable the thumb option of the assembly file by default,
so that when compiling the assembly file, the machine code and the system will be in a consistent state.
----------------------------------------------------------------
https://gcc.gnu.org/onlinedocs/gcc-4.5.2/gcc/ARM-Options.html
GCC Manual:
-mthumb
Generate code for the Thumb instruction set. The default is to use the 32-bit ARM
instruction set. This option automatically enables either 16-bit Thumb-1 or mixed 16/32-bit
Thumb-2 instructions based on the -mcpu=name and -march=name options.
** This option is not passed to the assembler. **
** If you want to force assembler files to be interpreted as Thumb code,
either add a `.thumb' directive to the source or pass the -mthumb option
directly to the assembler by prefixing it with -Wa. **
Signed-off-by: chao an <anchao@xiaomi.com>
arch/arm/src/sama5/Kconfig:819:error: recursive dependency detected!
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:819: choice <choice> contains symbol SAMA5_FLEXCOM0_USART
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:824: symbol SAMA5_FLEXCOM0_USART is part of choice SAMA5_FLEXCOM0_USART
For a resolution refer to Documentation/kbuild/kconfig-language.txt
subsection "Kconfig recursive dependency limitations"
arch/arm/src/sama5/Kconfig:824: symbol SAMA5_FLEXCOM0_USART is part of choice <choice>
Signed-off-by: chao an <anchao@xiaomi.com>
SAMA5Dx ADC and TSD fixes
Ensures ADC and TSD work together. TSD now works on SAMA5D2 and should be OK, still, for other SAMA5D familiy members
Fix CI error
checkpatch error
Update arch/arm/src/sama5/sam_tsd.h
Squash commits to arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Update arch/arm/src/sama5/hardware/sam_adc.h
Squash commits to arch/arm/src/sama5/sam_tsd.c
Update arch/arm/src/sama5/sam_tsd.c
Update arch/arm/src/sama5/sam_tsd.c
Update arch/arm/src/sama5/sam_tsd.c
Update sam_tsd.c
Fixes after feedback from PR and additional testing
Update sam_tc.c
checkpatch.sh error was missed when fixing someone else's error...
feedback corrections missed
Co-Authored-By: Xiang Xiao <xiaoxiang781216@gmail.com>
Co-Authored-By: Petro Karashchenko <petro.karashchenko@gmail.com>
squashed everything after 248072e02C
/arch/arm/src/libarch.a(stm32_flash.o): in function `up_progmem_write':
/arch/arm/src/chip/stm32_flash.c:419: undefined reference to `stm32_waste'
Seems like the symbol definition + declaration were completely missing
Use correct path to include mutex.h
Fixes:
chip/stm32_bbsram.c:42:10: fatal error: mutex.h: No such file or directory
42 | #include <mutex.h>
| ^~~~~~~~~
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
add the task from the specified task list to reduce time consuming.
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
delete the task from the specified task list to reduce time consuming.
chip/stm32_adc.c:2529:32: warning: shifting a negative signed value is undefined [-Wshift-negative-value]
setbits = ADC_CCR_DUAL_IND | ADC_CCR_DELAY(0) | ADC_CCR_MDMA_DISABLED |
^~~~~~~~~~~~~~~~
In the past, header file paths were generated by the incdir command
Now they are generated by concatenating environment variables
In this way, when executing makefile, no shell command will be executed,
it will improve the speed of executing makfile
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
common/arm_backtrace_sp.c: In function 'up_backtrace':
common/arm_backtrace_sp.c:253:15: warning: assignment to 'long unsigned int' from 'uint8_t *' {aka 'unsigned char *'} makes integer from pointer without a cast [-Wint-conversion]
253 | top = g_intstacktop;
|
to fix the following clang warning:
Error: chip/eoss3_irq.c:138:47: error: format specifies type 'unsigned int' but the argument has type 'uint32_t' (aka 'unsigned long') [-Werror,-Wformat]
_err("PANIC!!! Bus fault received: %08x\n", getreg32(NVIC_CFAULTS));
~~~~ ^~~~~~~~~~~~~~~~~~~~~~
%08lx
/github/workspace/sources/nuttx/include/debug.h:126:57: note: expanded from macro '_err'
__arch_syslog(LOG_ERR, EXTRA_FMT format EXTRA_ARG, ##__VA_ARGS__)
~~~~~~ ^~~~~~~~~~~
/github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:134:24: note: expanded from macro 'getreg32'
^~~~~~~~~~~~~~~~~~~~~~~~~~~
Error: chip/eoss3_irq.c:146:49: error: format specifies type 'unsigned int' but the argument has type 'uint32_t' (aka 'unsigned long') [-Werror,-Wformat]
_err("PANIC!!! Usage fault received: %08x\n", getreg32(NVIC_CFAULTS));
~~~~ ^~~~~~~~~~~~~~~~~~~~~~
%08lx
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
1.Don't check the return value of nxsem_init or nxmutex_init
2.Fix some style issue
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Not all boards have an interrupt line from the phy to
the Soc. This commit allows the phy to be polled for
link status.
This may not work on all MAC/PHY combination that
have mutually exclusive link management and operating
modes. The STM32H7 and LAN8742AI do not have such a
limitation.
Fix typos
1. add 'ARM' prefix to choice menu
2. rename 'Generic Clang toolchain' to 'LLVM Clang toolchain'
to avoid confuse with CONFIG_ARM_TOOLCHAIN_ARMCLANG
Signed-off-by: chao an <anchao@xiaomi.com>
armv6-m/arm_exception.S:139:2: error: invalid instruction, any one of the following would fix this:
sub r1, #(4 * (10))
^
armv6-m/arm_exception.S:139:2: note: instruction requires: thumb2
sub r1, #(4 * (10))
^
armv6-m/arm_exception.S:139:10: note: invalid operand for instruction
sub r1, #(4 * (10))
^
armv6-m/arm_exception.S:139:2: note: no flag-preserving variant of this instruction available
sub r1, #(4 * (10))
^
armv6-m/arm_exception.S:139:10: note: operand must be a register in range [r0, r7]
sub r1, #(4 * (10))
^
-----------------------------------------
bringup.c:125:18: warning: variable 'ret' is uninitialized when used here [-Wuninitialized]
return ret;
^~~
bringup.c:73:10: note: initialize the variable 'ret' to silence this warning
int ret;
^
= 0
Signed-off-by: chao an <anchao@xiaomi.com>
chip/flash.c: In function '_spif_read_status_reg_x':
chip/flash.c:46:9: warning: this 'while' clause does not guard... [-Wmisleading-indentation]
46 | while ((AP_SPIF->fcmd &0x02)==0x02); \
| ^~~~~
chip/flash.c:128:3: note: in expansion of macro 'SPIF_STATUS_WAIT_IDLE'
128 | SPIF_STATUS_WAIT_IDLE(SPIF_WAIT_IDLE_CYC);
| ^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: chao an <anchao@xiaomi.com>
If you specify a file path on SPI-Flash in CONFIG_CXD56_GNSS_CEP_FILENAME,
it causes a deadlock issue in the inter-CPU communication. To resolve it,
introduce a new CONFIG_CXD56_GNSS_CEP_ON_SPIFLASH and then use pre-read
buffers during checking CEP file. So this needs the large of free memory.
Remove hardware zero length packet enhancement because of driver
logic already processed the ZLP correctly. It is unnecessary and cause
of IN interrupt lost.
On armv8-m the MPU region limits are inclusive. Thus, we must substract
one byte of size from (base + limit).
Signed-off-by: Michael Jung <michael.jung@secore.ly>
When a function is known to preserve eight-byte alignment of the stack, armclang assigns the build
attribute Tag_ABI_align_preserved to that function. However, the armclang integrated assembler does
not automatically assign this attribute to assembly code.
Signed-off-by: xiangdong6 <xiangdong6@xiaomi.com>
common/arm_backtrace_fp.c: In function 'up_backtrace':
common/arm_backtrace_fp.c:126:23: warning: assignment to 'void *' from 'uintptr_t' {aka 'unsigned int'} makes pointer from integer without a cast [-Wint-conversion]
126 | istacklimit = arm_intstack_top();
| ^
Signed-off-by: chao an <anchao@xiaomi.com>
1. rename arm_backtrace_thumb.c to arm_backtrace_sp.c
2. use EHABI stack unwinder instead of instruction unwind
Signed-off-by: chao an <anchao@xiaomi.com>
In SMP mode, if all cores start at same time, all from __start(),
then only primary need do initialize, so others core should wait
primary, use 'sev' let the non-primary continue to __cpuN_start().
Signed-off-by: ligd <liguiding1@xiaomi.com>
NON-primary cpu will invalidate cpu0's cache L2, that will caused cpu0's data mismatch, and then system crash
Signed-off-by: ligd <liguiding1@xiaomi.com>
The IDMA needs to have 32 bit word alignment, in fact it will
AND off the lower 2 bits of the value stored in IDMABASE0R.
This bug was masked by CONFIG_ARMV7M_DCACHE causing proper word alignment
and also FAT_DMAMEMORY being aligned.
This commit extends the unaligned logic (used for dcache) to take into account
the need for a buffer copy when the buffer is ot 32 bit word.
It leverages the fact that when CONFIG_ARMV7M_DCACHE is not defined the up_xxxxx_dcache are nops.
Fix build break:
Error: L6218E: Undefined symbol _sbss (referred from arm_head.o).
Error: L6218E: Undefined symbol _ebss (referred from arm_head.o).
Error: L6218E: Undefined symbol _eronly (referred from arm_head.o).
Error: L6218E: Undefined symbol _sdata (referred from arm_head.o).
Error: L6218E: Undefined symbol _edata (referred from arm_head.o).
Signed-off-by: chao an <anchao@xiaomi.com>
Summary:
- I noticed that lc823450-xgevk does not boot due to the recent
changes on g_current_regs
- This PR fixes this issue
Impact:
- None
Testing:
- Tested with lc823450-xgevk:rndis
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
1. some arm instructions are not compatible with arch tlsr:
{standard input}: Assembler messages:
{standard input}:53: Error: bad instruction `svc #0'
2. remove unsupport compile option
cc1: error: unrecognized command line option "-mlittle-endian"
Signed-off-by: chao an <anchao@xiaomi.com>
