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3239 Commits

Author SHA1 Message Date
Gregory Nutt
0eea9f2ebe SAMA5: Add RTC and WDT register definition header files 2013-10-18 14:47:50 -06:00
Gregory Nutt
b661ba3e2a STM32 DMA Priority: Select the correct default for F1 and other family members 2013-10-18 14:13:53 -06:00
Gregory Nutt
1b3127149c SAMA5 LCD: Move framebuffers to center of free memory region. That creates a guard band around the framebuffers that gives a little protection from any bad writes into the framebuffer 2013-10-18 10:11:20 -06:00
Gregory Nutt
5c3f7f118c Add SDIO preflight method 2013-10-18 08:15:09 -06:00
Gregory Nutt
fd468d219f Changes to stm32_dmacapable interfaces from Mike Smith 2013-10-18 08:06:23 -06:00
Gregory Nutt
0c44715f07 STM32 DMA priority corrections from Mike Smith 2013-10-18 07:37:24 -06:00
Gregory Nutt
cda1fd00c7 Typo fixes for UART7 and UART8 DMA configs. From Mike Smith 2013-10-18 07:17:55 -06:00
Gregory Nutt
2d831bc717 SAMA5 TSD: Fix to prohibit reading samples when not valid 2013-10-17 17:26:06 -06:00
Gregory Nutt
8924101566 STM32 F103C: Correct some errors in pinmapping. From David Sidrane 2013-10-16 07:26:41 -06:00
Gregory Nutt
83982f3ef9 Misc changes to README files; Update SAMA5D3x-EK NxWM configuration to use Calibration instruction messages 2013-10-14 14:53:38 -06:00
Gregory Nutt
98ffd096a0 SAMA5 LCDC: Correct how framebuffer memory was being mapped; Remove options to get framebuffer memory in various. Because of the mapping and aligment requirements, those options really cannot be supported 2013-10-13 13:08:05 -06:00
Gregory Nutt
a3bb8d3d94 SAMA5 LCDC: Move framebuffer to lower memory; I suspect some corruption by interference 2013-10-13 10:42:14 -06:00
Gregory Nutt
34557b8c6b SAMA5 LCDC: Fixed backlight PWM divider. Backlight no longer flashes 2013-10-11 17:12:35 -06:00
Gregory Nutt
1d0e7aaeff SAMA5 LCDC: Wait when the LCDC is resynchronizing (SIF); Try start-up parameters from Barebox (this still don't work) 2013-10-10 18:44:08 -06:00
Gregory Nutt
57d04d3ff5 SAMA5 LCDC: Default resolution if now RGB565; Add option to select a different output resolution than the sofware resolution (needs to the 24BPP for this LCD). 2013-10-10 18:41:42 -06:00
Gregory Nutt
c79ae66fc2 SAMA5 LCDC: Move DMA descriptors out of internal SRAM and into SDRAM. I am not completely clear, but it looks like the LCDC cannot support DMA from internal SRAM 2013-10-10 12:02:41 -06:00
Gregory Nutt
1dfcee203c SAMA5: Allow portions of external memory to be added to the heap instead of the whole thing 2013-10-10 12:00:32 -06:00
Gregory Nutt
e4e4912712 SAMA5 LCDC: Fix a few compilation errors that show up when additional layers are enabled 2013-10-09 18:46:05 -06:00
Gregory Nutt
b7f4a51ee2 SAMA5 LCDC: Few more bug fixes but still not working 2013-10-09 18:22:21 -06:00
Gregory Nutt
cc23806fa1 SAMA5 LCDC: Corrections from first debug sessions. Still a way to go 2013-10-09 13:21:27 -06:00
Gregory Nutt
f3a4fc42d7 SAMA5: LCDC driver incorporated into the build system. 2013-10-08 15:30:38 -06:00
Gregory Nutt
3ccbb7a07f SAMA5: LCD driver is code complete but untested 2013-10-08 12:16:30 -06:00
Gregory Nutt
3fd7f4f855 SAMA5: More LCDC driver progress 2013-10-08 08:57:48 -06:00
Gregory Nutt
f6dc32c30c SAMA5: More LCDC driver progress 2013-10-07 15:54:08 -06:00
Gregory Nutt
c7c6186356 SAMA5: LCDC driver progress 2013-10-07 12:05:16 -06:00
Gregory Nutt
cfd257cc0c SAMA5 LCDC: Add 'skeleton' files that will eventually become an LCDC driver for the SAMA5 2013-10-06 09:08:52 -06:00
Gregory Nutt
74db990b7e SAMA5: Completes LDCDC register definition file 2013-10-04 15:43:19 -06:00
Gregory Nutt
021bdecb05 SAMA5: Add LCD register definition header file 2013-10-04 10:11:12 -06:00
Gregory Nutt
5c9926b61e SAMA5: Touchscreen driver now works 2013-10-04 08:03:38 -06:00
Gregory Nutt
ac66287ba7 SAMA5: First changes from touchscreen debug 2013-10-03 17:11:30 -06:00
Gregory Nutt
889ea78194 SAMA5: ADC and touchscreen drivers now build without errors 2013-10-03 14:32:21 -06:00
Gregory Nutt
0001191f6c SAMA5: Integrate touchscreen and ADC drivers into the build 2013-10-03 12:49:13 -06:00
Gregory Nutt
db6d76baf5 SAMA5 ADC and touchscreen: Drivers are code complete and ready for test 2013-10-03 10:06:14 -06:00
Gregory Nutt
8b8523f935 SAMA Touchscreen/ADC: More progress 2013-10-02 16:55:22 -06:00
Gregory Nutt
b885459624 Add framework for Spark Core board support. The initial commit is a clone of the Maple Mini and still needs Spark customizations 2013-10-02 08:24:46 -06:00
Gregory Nutt
afa475e948 SAMA5 ADC/Touchscreen: A little more logic 2013-10-01 14:40:34 -06:00
Gregory Nutt
183421fe07 KL: Now builds up_puts 2013-10-01 11:51:27 -06:00
Gregory Nutt
e4074e1e21 KL: Missing header file in low level getc logic 2013-10-01 11:25:01 -06:00
Gregory Nutt
bb6b31f495 SAMA5 touchscreen and ADC: A little more progress 2013-10-01 11:23:24 -06:00
Gregory Nutt
7120517af0 SAMA5 ADC/Touchscreen: A little more progress. Still not complete 2013-09-30 14:28:42 -06:00
Gregory Nutt
d4e689ef1a Add freedom-kl25z/minnsh configuration: This is an experiment to see just how small we and get an NSH configuration. From Alan Carvalho de Assis. 2013-09-30 09:20:11 -06:00
Gregory Nutt
dc3ac21264 KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis 2013-09-30 09:15:31 -06:00
Gregory Nutt
babcd56908 KL25Z: Add low-level up_lowgetc function that can be used to provide an NSH console when the file system (and hence the serial driver) is disabled. From Alan Carvalho de Assis 2013-09-30 09:11:54 -06:00
Gregory Nutt
3027dd3c54 SAMA5: Framework for an touchscreen driver (incomplete) 2013-09-30 09:04:21 -06:00
Gregory Nutt
e1fc3f51b3 SAMA5 ADC: Framework for an ADC driver (incomplete) 2013-09-30 07:22:34 -06:00
Gregory Nutt
05eb7e3da4 SAMA5 ADC: Beginning ADC register definition file 2013-09-29 18:34:09 -06:00
Gregory Nutt
fbf5359a39 Work around a start-up error in the GMAC that I still do not understand 2013-09-29 16:46:22 -06:00
Gregory Nutt
0e5caa2ae3 SAMA5 GMAC: Various fixes from initial debug 2013-09-29 15:03:57 -06:00
Gregory Nutt
7c81618f2f Dependency generation fix for directories that keep object files in a sub-directory 2013-09-29 11:46:10 -06:00
Gregory Nutt
4aaee6fb3c Clean up some naming: fd vs. fildes vs. filedes and filep vs filp 2013-09-28 16:50:07 -06:00
Gregory Nutt
22d0ebeb07 configs/compal_e88 converted to use the kconfig-frontends tools 2013-09-27 16:12:44 -06:00
Gregory Nutt
9fcbd8879a SAMA5 GMAC and GMII support is code complete and ready for test 2013-09-27 13:12:04 -06:00
Gregory Nutt
f519f94926 Networking: Fix backward conditional in test to see if address is in ARP table. From Max Holtzberg 2013-09-27 08:27:35 -06:00
Gregory Nutt
fbd09bd75f Beginng of support for GMII/RGMII PHYs 2013-09-26 15:55:21 -06:00
Gregory Nutt
48f1227fbf SAMA5 GMAC: Initial driver check-in is just the EMAC driver forced to compile with the GMAC register definitions 2013-09-26 10:35:52 -06:00
Gregory Nutt
9dd0680f0e SAMA5: Completes GMAC register definition header file 2013-09-26 09:13:14 -06:00
Gregory Nutt
5f4682c874 SAMA5 EMAC: Need to pace RX and TX because and RX can result in a TX; Process TX interrupt events before TX interrupt events for the same reason 2013-09-25 14:22:35 -06:00
Gregory Nutt
d53a0189f7 SAMA5 EMAC: Add some need D-Cache Flush/Invalidate operations. Add support for CONFIG_NET_DUMPPACKET 2013-09-25 11:51:49 -06:00
Gregory Nutt
ea4c8bbf68 Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled 2013-09-25 11:50:31 -06:00
Gregory Nutt
52b0a16cd3 Move CONFIG_NET_DUMPPACKET from LPC17 and STM32 to commong network drivers. Automatically enabled CONFIG_NETDEVICES when any Ethernet driver is enabled 2013-09-25 11:50:05 -06:00
Gregory Nutt
694080ba47 Fix badly applied patch to ENCX24J600 2013-09-25 08:26:56 -06:00
Gregory Nutt
d979859754 SAMA5 UDPHS: Dont' reject read request submissions while stalled. That causes an infinite loop. When stalling, cancel all pending write requests, but cancel only a reqd request if it is in progress. It will be immediately requeued 2013-09-24 15:06:17 -06:00
Gregory Nutt
5783fec78b Comment out assertion that apparently fires inappropriately 2013-09-24 15:01:25 -06:00
Gregory Nutt
245f5ad32d Slightly improved debug output 2013-09-24 13:47:03 -06:00
Gregory Nutt
f0ca9c2a8d Stack monitor fixes 2013-09-24 12:14:52 -06:00
Gregory Nutt
a8461747b9 Standardize stack checking interface 2013-09-24 11:45:13 -06:00
Gregory Nutt
7c767c4ebe SAMA5 UDPHS: Minor clean-up of STALL logic 2013-09-23 18:10:41 -06:00
Gregory Nutt
a070e748fd SAMA5 HSMCI: Disable TX DMA. it is not reliable 2013-09-23 13:54:32 -06:00
Gregory Nutt
d167a09c74 SAMA5 HSMCI DMA clean-up. There are still some issues 2013-09-23 11:25:39 -06:00
Gregory Nutt
306a8743e0 Cosmetic changes to comments and coding style fixes 2013-09-22 14:48:22 -06:00
Gregory Nutt
b2e3a95565 Un-neccesary, cosmetic changes to label names and comments 2013-09-22 08:54:06 -06:00
Gregory Nutt
a768f32532 SAMA5 OHCI: Back out a change, the real root cause was a bug in the cache logic so the hack is no longer necessary 2013-09-22 07:53:51 -06:00
Gregory Nutt
d1ac44242f ARMv7-A: Fix some error in alignment to cache line boundaries in the cache operations 2013-09-21 15:47:00 -06:00
Gregory Nutt
da37aa6413 SAMA5 OHCI: Fix some strange Dcache problems that I still don't understand; end address on cache operations is end+1, not end 2013-09-21 12:21:10 -06:00
Gregory Nutt
c9050ae5fd ARMv7-A: Clarify end address paramet in cache operations: It is the end+1 address, not the end address 2013-09-21 12:16:34 -06:00
Gregory Nutt
f3d56e8695 SAMA5 OHCI: Fix some problems with D-Cache coherency and physical addressing related to interrupt endpoints 2013-09-20 15:22:09 -06:00
Gregory Nutt
f72ad05d0f SAMA5 OHCI: When UPLL drives OHCI the logically correct divider of 10 does not work; But a divider of 5 does. Why? 2013-09-19 16:10:46 -06:00
Gregory Nutt
07cca4b318 SAMA5 EHCI: Fix bits being clobbered in PORTSC on hand-off to OHCI. OHCI: Fix some more trace configuration issues. Both: Don't muck with SFR port selection bits once they have been initialized 2013-09-19 10:52:33 -06:00
Gregory Nutt
f7436ee22f More USB host trace conditional compilation problems 2013-09-19 09:08:55 -06:00
Gregory Nutt
48ed2b88d3 Fix inconsistency in USB host tracing definitions 2013-09-19 08:46:33 -06:00
Gregory Nutt
ef9032b4d6 SAMA5: Add support for the FPU OS test 2013-09-18 10:35:03 -06:00
Gregory Nutt
71354eb2c3 LPC17xx SPI: Remove an unused static prototype that caused a compile time warning 2013-09-17 17:14:08 -06:00
Gregory Nutt
425c26d27a SAMA5 EMAC: Changes from early debug sessions. Still a way to go 2013-09-17 15:52:19 -06:00
Gregory Nutt
2c63995099 SAMA5 EMAC: Resolve issues with DUAL PHY support needed for both EMAC and GMAC peripherals. EMAC driver is now code complete and builds without complaint 2013-09-17 10:55:13 -06:00
Gregory Nutt
82cd614b66 Add prefex ETH0 to all PHY configurations to support multiple NICs 2013-09-17 10:45:07 -06:00
Gregory Nutt
a634dc0f33 SAMA4 EMAC: Remove some editor garbage that ended up in the last commit 2013-09-16 18:04:38 -06:00
Gregory Nutt
ec499a3aa8 SAMA5 EMAC: Add basic PHY logic 2013-09-16 18:00:21 -06:00
Gregory Nutt
2a10afb311 SAMA5 EMAC: Packet transmission logic 2013-09-16 14:58:11 -06:00
Gregory Nutt
97a0e3b74b SAMA4 EMAC: Add basic interrupt handling logic 2013-09-16 13:57:57 -06:00
Gregory Nutt
f267cea5b6 SAMA5 EMAC: Incremental progress. Still not code complete 2013-09-16 11:36:12 -06:00
Gregory Nutt
47d4b41bad Freescale Kinetis KL25Z PIT and TPM module register definitions 2013-09-15 17:00:50 -06:00
Gregory Nutt
ec03861315 SAMA4 EMAC buffer allocation logic 2013-09-15 14:26:25 -06:00
Gregory Nutt
45e4425687 SAMA5 Ethernet: Add support for PHY interrupts 2013-09-15 12:24:42 -06:00
Gregory Nutt
7c13790901 SAMA5: Update Ethernet initalization logic to handle both EMAC and GMAC 2013-09-14 08:19:36 -06:00
Gregory Nutt
7b6a1a57eb SAMA5 EMAC: Create a empty, skeleton file that will eventually become the SAMA5 EMAC driver 2013-09-13 15:04:46 -06:00
Gregory Nutt
64825db9c2 STM32: Support for the LeafLabs Maple and Maple Mini boards. From Librae 2013-09-13 12:45:33 -06:00
Gregory Nutt
e31f62e1b5 STM32 Kconfig: Fix STM32 UART7/8 kconfig names and UART DMA. Provided by Lorenz Meier 2013-09-13 11:45:32 -06:00
Gregory Nutt
1b17b8fbea Make filter register accessible for CAN1 and CAN2. Provided by Lorenz Meier 2013-09-13 11:20:10 -06:00
Gregory Nutt
363df90d81 SAMA5 EMAC and GMAC: More additions to register definition files 2013-09-13 03:35:56 -06:00
Gregory Nutt
91a065e9fc SAMA5: Beginning of EMAC and GMAC register definition header files 2013-09-12 15:45:12 -06:00
Gregory Nutt
9f937bc0e4 SAMA5D3x-EK README update 2013-09-12 14:17:56 -06:00
Gregory Nutt
1d40c068fb SAMA5 TWI: Misc improvements during debug (still not getting interupts) 2013-09-12 12:25:31 -06:00
Gregory Nutt
3bb6a8b164 SAMA5 TWI: Cleanup compilation errors that occur when I2C debug is enabled 2013-09-12 09:46:20 -06:00
Gregory Nutt
950ea5830a SAMA5 TWI: Add support for I2C readwrite and transfer methods 2013-09-11 17:52:23 -06:00
Gregory Nutt
42b547f73c SAMA5: Barebones TWI driver implementation 2013-09-11 16:48:56 -06:00
Gregory Nutt
f2a5c43b25 SAMA5: Framework for a TWI driver (incomplete) 2013-09-11 12:28:52 -06:00
Gregory Nutt
f9afaf89fc SAMA5: TWI register definition file 2013-09-11 10:23:46 -06:00
Gregory Nutt
11a515eca0 SAMA5D3x-EK demo configuration now supports HSMCI0 and HSMCI1 2013-09-11 09:50:36 -06:00
Gregory Nutt
dac363d43e Clean-up a few USB trace formats 2013-09-10 16:17:06 -06:00
Gregory Nutt
9f3e2e3bec SAMA5: Add tracing support to the OHCI driver 2013-09-10 16:01:44 -06:00
Gregory Nutt
92aa5785bf SAMA5 EHCI: Did not work with DEBUG off. Appears to be because of some D-Cache flushing that was performed only with DEBUG ON. Now is unconditional 2013-09-10 10:12:51 -06:00
Gregory Nutt
a4e6a3b80f Extent the the USB host trace logic to include verbose debug output 2013-09-09 17:27:21 -06:00
Gregory Nutt
1a18d1e3e7 USB monitor extended so that it can also be used with USB host trace data 2013-09-09 15:02:33 -06:00
Gregory Nutt
8f69c6c66c Beginning of support for USB host side tracing 2013-09-09 14:01:52 -06:00
Gregory Nutt
31e1e7506a USB MSC host class driver: Don't bother retrying to initialize the FLASH if the interface is returning fatal transfer errors 2013-09-09 10:00:16 -06:00
Gregory Nutt
10a9fcff30 Trivial updates assocaited with USB host mass storage and SAMA5 EHCI 2013-09-08 13:42:56 -06:00
Gregory Nutt
e5841a74a9 SAMA5: Add support EHCI/OHCI to sama5d3x-ek/demo (does not work yet); Fix some EHCI/OHCI compilation issues when DEBUG is disabled 2013-09-07 11:43:06 -06:00
Gregory Nutt
6e5df6259e SAMA5D3x-EK: Add a new 'demo' configuration 2013-09-06 11:40:46 -06:00
Gregory Nutt
1fcc8894e6 CDC/ACM and PL2303 device drivers: Don't use the max packet size assigned to an endpoint in order to determine the request buffer size. The endpoint has not yet been configured that max packet size may be wrong. 2013-09-05 18:00:16 -06:00
Gregory Nutt
ec01a41da7 SAMA5 UDPHS: Fix bad setup for sam_req_write call introduce in last commit 2013-09-05 15:51:27 -06:00
Gregory Nutt
54d5e1a49d SAMA5 UDPHS: Major changes to DMA interrupt and request handling to better handle DMA 2013-09-05 14:33:27 -06:00
Gregory Nutt
9861f18ee1 SAMA5 UDPHS: Fix DMA channel vs. matching endpoint 2013-09-04 15:08:19 -06:00
Gregory Nutt
75b53ad12b SAMA5 UDPHS: More USB fixes mostly related to byte counts, endpoint configuration, and dma configuration 2013-09-04 13:36:52 -06:00
Gregory Nutt
2d9c62d3ef SAMA5 UDPHS: More zero length packet fixes; revamped request queue structures 2013-09-04 09:48:08 -06:00
Gregory Nutt
c09b08f4a5 SAMA5 UDPHS: Fixes related to null packet and SETUP OUT data handling 2013-09-03 19:13:34 -06:00
Gregory Nutt
3e505efe73 SAMA5 UDPHS: Small change to zero length packet handling 2013-09-03 16:24:11 -06:00
Gregory Nutt
adc7248d6c SAMA5 UDPHS: Fix some issues with TX interrupt handling 2013-09-03 14:53:10 -06:00
Gregory Nutt
74d0e02850 SAMA5 UDPHS: A little debugging progress. Not all transfers are working yet 2013-09-03 13:09:50 -06:00
Gregory Nutt
4e2894c6ae SAMA5 UDPHS: Changes from initial debug session. Still a long way to go 2013-09-02 16:59:07 -06:00
Gregory Nutt
abd29a5ede SAMA5 UDPHS: Fixes related to soft connect pullup and DMA buffer allocation 2013-09-02 14:55:33 -06:00
Gregory Nutt
df39b67fd6 SAMA5 UDPHS: Some very early debug corrections. Not yet working. 2013-09-02 12:26:15 -06:00
Gregory Nutt
8905de3826 SAMA5 UDPHS: Add logic to handle deferred address setting; add logic to handle EP0 SETUP OUT data 2013-09-02 10:08:18 -06:00
Gregory Nutt
928d0ddd8a STM32 Timer Register Bit Definitions: Some CCER bit settings changed per SourceForge bug #18 submitted by CCCTSAO 2013-09-02 08:01:09 -06:00
Gregory Nutt
4cbe61cdd3 SAMA5 UDPHS: Clean up some write request handling 2013-09-01 16:56:22 -06:00
Gregory Nutt
7fd159779e SAMA5 UDPHS: Resolve a few of easier REVISIT pre-processor warnings 2013-09-01 15:36:17 -06:00
Gregory Nutt
80a498aa8b SAMA5 UPPHS: Fix a small mountain of compilation errors. Still things to REVISIT so it is not ready for test 2013-09-01 11:31:12 -06:00
Gregory Nutt
3ba3dfd9bc SAMA5 UDPHS: Support USPHS clock configuration 2013-09-01 11:29:51 -06:00
Gregory Nutt
06355a17e1 SAMA UDPHS: Add pull-up and stall logic. Added to build system but does not yet build 2013-08-31 17:37:51 -06:00
Gregory Nutt
5693f4b8b0 Remove empty README.txt files 2013-08-31 13:17:04 -06:00
Gregory Nutt
30cf03d3e8 SAMA5 UDPHS: Add endpoint configuration and read DMA logic 2013-08-31 12:20:00 -06:00
Gregory Nutt
f22b388cb4 SAMA5 UDPHS: Bring in UDPHS endpoint interrupt handling logic 2013-08-31 10:43:58 -06:00
Gregory Nutt
ab1c21609d SAMA5 UDPHS: Write DMA logic added. Still incomplete 2013-08-30 15:41:06 -06:00
Gregory Nutt
07ffab9308 SAMA5: Updated UDPHS driver. Still incomplete 2013-08-30 14:51:41 -06:00
Gregory Nutt
ca2709296d SAMA5 UDPHS interrupt decoding logic 2013-08-29 18:11:34 -06:00
Gregory Nutt
eeaeb369fe SAMA5 UDPHS interrupt decoding logic 2013-08-29 17:34:05 -06:00
Gregory Nutt
a4f58596d4 SAMA5: Initial framework for a UDPHS USB device side driver 2013-08-29 16:29:27 -06:00
Gregory Nutt
b47e1933f5 SAMA5: Add high-speed USB register definition header file 2013-08-28 17:50:05 -06:00
Gregory Nutt
4508986dbb SAMA5 EHCI: Implemented (but did not test) interrupt endpoint logic 2013-08-28 13:07:35 -06:00
Gregory Nutt
6acb286c39 SAMA5 EHCI: Correct and extend pool allocation logic; Fix data toggle values 2013-08-28 10:03:48 -06:00
Gregory Nutt
556446e3a1 SAMA5: Fixes a bug in the way that the heap regions were being allocated 2013-08-27 16:43:19 -06:00
Gregory Nutt
e1fe1c3037 SAMA5 OHCI+EHCI: Using cp15_clean instead of cp15_coherent; EHCI: Need to set alt pointer in order to handle short transfers. 2013-08-27 13:07:21 -06:00
Gregory Nutt
56f9092a87 Fix all occurrences of "the the" in documentation and comments 2013-08-27 09:40:19 -06:00
Gregory Nutt
a55dda98b3 Add hooks to select Cortex-A8 2013-08-27 08:46:37 -06:00
Gregory Nutt
f69688422f SAMA4 EHCI: Correct some backward conditional compilation; fix some warnings 2013-08-26 17:03:52 -06:00
Gregory Nutt
56f2b3b963 Add a new method to the USB host driver interface: getdevinfo. This method will return information about the currently connected device. At present, it only returns the device speed. The speed is needed by the enumeration logic in order to set a credible initial EP0 max packet size 2013-08-26 15:46:16 -06:00
Gregory Nutt
f500338401 SAMA5 EHCI: Status phase is the opposite direction as the data phase 2013-08-26 14:28:13 -06:00
Gregory Nutt
78812d5b80 SAMA5 EHCI: Taking direction from wrong bit in SETUP request; need to flush data buffer before starting SETUP request 2013-08-26 11:05:23 -06:00
Gregory Nutt
57eb83da9d #17 Fix if CONFIG_SDIO_BLOCKSETUP defined, OS will crash. From CCTSAO 2013-08-26 08:54:46 -06:00
Gregory Nutt
250956c803 SAMA5 EHCI: Data toggle and status phase fixes 2013-08-25 14:45:08 -06:00
Gregory Nutt
d35e1c6bd4 EHCI reset bit was not being set correctly 2013-08-25 10:46:41 -06:00
Gregory Nutt
21566c02d6 SAMA5 OHCI: Fix semaphore handling bug. OHCI is now function by itself again after changes to integrate with EHCI 2013-08-25 08:57:35 -06:00
Gregory Nutt
254ebdaa4c SAMA5 OHCI: Fix backward conditional compilation. Clean-up OHCI/EHCI debug output 2013-08-25 08:30:21 -06:00
Gregory Nutt
02fc7a5a08 SAMA5D3x-EK: Fix some backward conditional compilation 2013-08-24 14:06:47 -06:00
Gregory Nutt
26c03779f8 SAMA5: OHCI various bugfixes for interrupt handling 2013-08-24 13:03:15 -06:00
Gregory Nutt
28a103f1f2 SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt 2013-08-24 11:34:24 -06:00
Gregory Nutt
1f3cebdb40 SAMA5 EHCI: Added logic to detect port speed. Handling is insufficient 2013-08-24 07:36:05 -06:00
Gregory Nutt
3786e72947 Fix #endif with missing #if condition. Reported by Andrew Bradford 2013-08-23 16:40:30 -06:00
Gregory Nutt
d7cba5e5ca SAMA5/ECHI: Debug register access, add logic to determine transfer size, fix setting of control bit in token 2013-08-23 16:23:15 -06:00
Gregory Nutt
e36a0e868d SourceForge bug #16 Fix IO pin map. Add CONFIG_SERIAL_TERMIOS support. From CCTSAO 2013-08-23 11:48:53 -06:00
Gregory Nutt
1383701e7e SAMA5 EHCI: cosmetic changes 2013-08-23 11:26:17 -06:00
Gregory Nutt
189174e26b SAMA5: Add support for sharing ports when both OHCI and EHCI are enabled 2013-08-23 10:58:30 -06:00
Gregory Nutt
e59924a9e6 SAMA5 EHCI: Fix some list traversal bugs 2013-08-22 19:32:24 -06:00
Gregory Nutt
b7330bc849 SAMA5 EHCI: Initial debug changes 2013-08-22 17:25:00 -06:00
Gregory Nutt
e581bfeb29 SAMA5 EHCI: No complete for bulk and control endpoints 2013-08-22 13:36:16 -06:00
Gregory Nutt
ea2e4c11f8 SAMA5 EHCI: Add data transfer logic for asynchronous endpoints 2013-08-22 10:27:46 -06:00
Gregory Nutt
da3ff83fc3 SAMA5 EHCI: Add IOC error handling 2013-08-22 09:23:01 -06:00
Gregory Nutt
73efdf8d05 SAMA5 EHCI: transfer termination logic. Incomplete 2013-08-21 17:08:12 -06:00
Gregory Nutt
f831c8fe94 SAMA5 EHCI: Hardware initialization logic 2013-08-21 13:45:54 -06:00
Gregory Nutt
c109c39be7 Move all SAMA5 EHCI interrupt handling to the worker thread 2013-08-21 11:07:42 -06:00
Gregory Nutt
9f6ae9332f SAMA5 EHCI: At list-oriented cache operations 2013-08-20 18:06:04 -06:00
Gregory Nutt
514826eeb1 Add SAMA5 EHCI list traversal logic 2013-08-20 17:01:30 -06:00
Gregory Nutt
6a79cea2c0 Beginning of support for SAMA5 EHCI. Not much there yet 2013-08-20 15:46:36 -06:00
Gregory Nutt
609dc65235 Add kernel/user memalign functions. Not fully integrated 2013-08-20 13:04:49 -06:00
Gregory Nutt
4d5789dfdd SAMA5 OHCI+EHCI mostly cosmetic changes 2013-08-19 15:03:14 -06:00
Gregory Nutt
4bf3dbe149 USB host: Add device address management support in preparation for USB hub support 2013-08-18 14:31:57 -06:00
Gregory Nutt
a6e6b4ba2d Add few more EHCI definitions 2013-08-18 13:01:13 -06:00
Gregory Nutt
07bd7c2168 STM32 F1 I2C: Fix a typo that crept in with some recent changes. From Yiran Liao 2013-08-18 07:45:14 -06:00
Gregory Nutt
b33de2b618 Add EHCI header file (not quite complete) 2013-08-17 14:19:18 -06:00
Gregory Nutt
a0837fca6c SAMA5 OHCI: Driver is now basically functional 2013-08-16 13:13:21 -06:00
Gregory Nutt
db42d9350c SAMA5 OHCI: Re-organize some endpoint list data structures.. Strange things happen when semaphores lie in DMA memory which is occasionally invalidated 2013-08-16 11:36:51 -06:00
Gregory Nutt
ddc93e1da3 STM32 SPI: nbits interface extended to handle LSB- or MSB-first operation. From Teemu Pirinen 2013-08-16 11:35:22 -06:00
Gregory Nutt
94bcdc66b0 SAMA5 OHCI: Don't prealloc RH port TDs and EDs. Allocate from a free list like other cases 2013-08-15 17:15:08 -06:00
Gregory Nutt
41c068f652 SAMA5 OHCI: Fix errors in cache handling; Don't add ED to control list until port is connected 2013-08-15 15:28:27 -06:00
Gregory Nutt
e23a92243c SAMA5: ports should not be reset state (seems to make no difference) 2013-08-14 17:33:31 -06:00
Gregory Nutt
49f3831e11 SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz 2013-08-14 15:16:04 -06:00
Gregory Nutt
e32b60a78c SAMA5 OHCI: Use physical address and flush and/or invalidate data caches as necessary 2013-08-14 12:23:06 -06:00
Gregory Nutt
bdbe4a4f25 Clean up some LP17xx and STM32 USB host configuration compilation errors due to the massive changes to the USB host interfaces needed to support the SAMA5 2013-08-13 17:43:19 -06:00
Gregory Nutt
8f429fd54d SAMA5: Major restructuring of the the OHCI driver drivers to better handle the multiple root hub ports and concureent transfers on each port. 2013-08-13 16:48:14 -06:00
Gregory Nutt
34418d12bb Separate wait() and enumerate() methods from struct usbhost_driver_s and move to new interface, struct usbhost_connection_s. This is part of the necessary restructuring of the USB host interface to support multiple root hub ports. 2013-08-13 15:03:46 -06:00
Gregory Nutt
b4645f73ec Back out most of the changes of 3b04d08043742b9e65cf38d45988b35bff91daed 2013-08-13 14:12:27 -06:00
Gregory Nutt
d0fbea35eb Separate SAMA5 OHCI interrupt handling into separate functions 2013-08-13 13:34:35 -06:00
Gregory Nutt
7339c1c5e6 SAMA5 OHCI: Fix some erors in the loop that waits for device connection changes 2013-08-13 09:44:16 -06:00
Gregory Nutt
6d72cccdf0 Fix re-entry problem in SAMA5 up_putc 2013-08-13 09:42:40 -06:00
Gregory Nutt
f3bfd6a515 STM32 F3 fixes from John Wharington 2013-08-13 07:48:18 -06:00
Gregory Nutt
a4c195482f More changes to USB host interface to support multiple downstream ports 2013-08-12 16:29:33 -06:00
Gregory Nutt
39696cbf96 First of several changes needed to support multiple USB host root hubs 2013-08-12 14:44:06 -06:00
Gregory Nutt
f5a0ce709c SAMA5: Add logic to control VBUS power for OHCI 2013-08-12 11:59:10 -06:00
Gregory Nutt
dfe6452b8e Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes 2013-08-11 17:11:32 -06:00
Gregory Nutt
9cf1365cde SAMA5: Some improvements to the HSCMI card removal/insertion logic 2013-08-11 11:13:11 -06:00
Gregory Nutt
69bc6afbd3 Add CAN configuration to STM32 config menu 2013-08-10 19:37:35 -06:00
Gregory Nutt
03130ca5a3 STM32: Fix STM32 serial init for non-reordered serial ports. From Lorenz Meier 2013-08-10 19:33:16 -06:00
Gregory Nutt
217ed87aad Added option to disable STM32 serial port re-ordering 2013-08-10 19:29:44 -06:00
Gregory Nutt
3c38992727 SAMA5: Fix HSMCI race condition. Now memory card interface is functional with DMA 2013-08-10 18:01:23 -06:00
Gregory Nutt
6622714c5d Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, sharable level 2013-08-10 09:06:53 -06:00
Gregory Nutt
75d0fc2a10 Extend the virtual-to-physical address conversion logic to handle NFS SRM, UDPH SRAM, and external SRAM and PSRAM. 2013-08-09 17:55:27 -06:00
Gregory Nutt
d8b3921972 SAMA5: Centralize logic for conversion between physical and virtual addresses 2013-08-09 17:25:53 -06:00
Gregory Nutt
ad6b8726c2 Fix some cache-related issues with the SAMA5 DMA driver 2013-08-09 15:25:13 -06:00
Gregory Nutt
a2ba8992a9 SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers 2013-08-09 13:12:16 -06:00
Gregory Nutt
2b36e7e266 SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit settings to match Atmel example. Still no DMA 2013-08-08 15:51:16 -06:00
Gregory Nutt
53c4a1e647 SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; the maximum transfer size in bytes depends on the number of bytes per transfer 2013-08-08 13:15:52 -06:00
Gregory Nutt
05242e41ef More SAMA5 DMAC driver fixes. Still does not work. 2013-08-07 17:19:48 -06:00
Gregory Nutt
e015c6edd6 SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers 2013-08-07 11:32:08 -06:00
Gregory Nutt
159635bc2a Fix SAM bug: Parmaters reversed in DMA function call 2013-08-06 15:47:09 -06:00
Gregory Nutt
d1da100cf0 SAM3,4,A5 DMAC driver fixes 2013-08-06 13:27:48 -06:00
Gregory Nutt
03f24c7a1d SAM3,4,A5: Fix some masked status checks that can generate false error reports 2013-08-06 12:36:56 -06:00
Gregory Nutt
dfe42d0254 SAMA5: A few early, easy bug fixes. The rest will all be difficult 2013-08-06 11:29:53 -06:00
Gregory Nutt
e8a34ea3ac SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts 2013-08-06 10:20:17 -06:00
Gregory Nutt
a68a3a0366 SAMA5: Add HSMCI memory card driver support 2013-08-05 16:21:24 -06:00
Gregory Nutt
cff3e713f1 SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n 2013-08-05 10:29:43 -06:00
Gregory Nutt
36f4cb53dd SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH 2013-08-05 08:24:39 -06:00
Gregory Nutt
412aaa83a2 SAMA5D3x-EK: At support for the AT25 serial FLASH 2013-08-04 16:56:41 -06:00
Gregory Nutt
5fe6e4df26 SAMA5: Add register level debug option for SPI 2013-08-04 14:45:24 -06:00
Gregory Nutt
d516baa73f SAMA5: SPI driver now supports both SPI0 and SPI1 2013-08-04 12:50:20 -06:00
Gregory Nutt
487866b2b6 SAMA5: Add basic SPI suppport (untested) 2013-08-04 11:08:20 -06:00
Gregory Nutt
8194e6bbcf SAMA5: Add DMA suppport (untested) 2013-08-04 10:44:18 -06:00
Gregory Nutt
a93b095ce4 SAMA5: Add DMA controller register definitions 2013-08-03 12:13:42 -06:00
Gregory Nutt
8b317e9ea3 Standard configuration variables used to enable interupt controller debug; SAMA5: Correct handling of spurious interrupts 2013-08-03 08:22:37 -06:00
Gregory Nutt
c7293535fe Various changes to get SAMA5 SDRAM working. Marginally functional, but there is more to be done 2013-08-02 18:30:27 -06:00
Gregory Nutt
08a1ff5c79 Correct some typos int he MPADDRCS register address definitions 2013-08-02 12:06:11 -06:00
Gregory Nutt
b00d72a7f2 SAMA5: More MMU-related changes to properly initialize SDRAM 2013-08-02 11:11:57 -06:00
Gregory Nutt
894618f894 SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM 2013-08-01 16:58:55 -06:00
Gregory Nutt
70e1028d41 SAMA5: Add DDR controller register definitions 2013-08-01 12:27:41 -06:00
Gregory Nutt
35c3a49e1c ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and caching. This is simpler and avoids fears I have about caching 2013-08-01 10:05:33 -06:00
Gregory Nutt
f0e6d4f101 ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file. Too much conditional compilation. 2013-08-01 07:41:00 -06:00
Gregory Nutt
b0045bc7e2 SAMA5: Add an NSH configuration of the SAMA5D3x-EK board 2013-07-31 10:46:13 -06:00
Gregory Nutt
8695c89aa4 SAMA5: Modification of some CPSR-related inline functions 2013-07-31 09:11:24 -06:00
Gregory Nutt
db20c5fc43 Fix Cortex-A CPSR register field definition 2013-07-30 19:05:24 -06:00
Gregory Nutt
391d300d4d SAMA5: Change mapping of vector tables to work around that fact that I don't understand how the AXI MATRIX remap works 2013-07-30 16:19:52 -06:00
Gregory Nutt
16371b50e4 ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM 2013-07-30 13:20:33 -06:00
Gregory Nutt
6f99994722 More DAC changes from John Wharington 2013-07-30 11:41:53 -06:00