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18663 Commits

Author SHA1 Message Date
Xiang Xiao
17a7d612df arch: Replace nx_vsyslog with vsyslog 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-14 09:41:45 -03:00
chao.an
4be416a2a8 arm/backtrace: fix the compile warning 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-14 16:29:38 +08:00
Huang Qi
b8477f857b k210: Use common cpu idle stack implementation 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-14 11:32:34 +08:00
Huang Qi
55d88627a0 risc-v: Implement common up_cpu_idlestack 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-14 11:32:34 +08:00
raiden00pl
00917bfe9d stm32/fdcan: add CAN FD frames support 2022-02-14 10:42:01 +08:00
raiden00pl
dd8408a973 stm32/fdcan: use array indexes when accessing RX/TX FIFO 2022-02-14 10:42:01 +08:00
Michael Jung
70dae3bb3b Add arm_tcbinfo.c to stm32u5's common C sources 
And re-order the list of common C sources alphabetically.

Signed-off-by: Michael Jung <mijung@gmx.net>
 2022-02-13 16:32:35 +08:00
Michael Jung
5c1c939cdc stm32u5: Architecture Support for STM32U5 
Architecture support for STMicroelectronics STMU585xx MCUs.  This is
based on corresponding code for STM32L5, but has been considerably
adjusted.  Tested with a B-U585I-IOT02A board and a simple NSH
configuration, but only running NuttX in the non-secure world with
TrustedFirmware-M.

Signed-off-by: Michael Jung <mijung@gmx.net>
 2022-02-13 16:32:35 +08:00
Huang Qi
64130b4775 risc-v: Use _ebss instead of _default_stack_limit as idle stack base 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-13 14:37:57 +08:00
Michal Lenc
56b3fc0ef9 arch/arm/src/samv7: added support for PWM driver 
This commit adds initial support for PWM driver to SAM MCU series.
Only general PWM on PWMH output is currently supported, complementary
output on PWML is not allowed. The current state of the driver also does
not support external triggering of other perihperals.

Multichannel option is supported. The functionality of the driver was
tested on an example pwm application and with a real time control system.

Signed-off-by: Michal Lenc <michallenc@seznam.cz>
 2022-02-13 03:20:07 +08:00
Huang Qi
95b0c85f58 arch: Add xxx_tcbinfo.c to SoC level Make.defs 
Fix build break with CONFIG_DEBUG_TCBINFO enabled.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-12 21:07:35 +09:00
Peter Kalbus
271518a5ff sim: detect clang native compiler on MacOS. 2022-02-11 21:23:07 +08:00
Huang Qi
3fe9c9523c risc-v: Fix style issue in SoC's Make.defs 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-11 15:20:17 +08:00
Alan C. Assis
d49ad207ef esp32c3: Fix issue #5377 UART1 not working because clock as disabled 2022-02-11 10:01:25 +08:00
zhuyanlin
c833048484 xtensa:kconfig: move ARCH_HAVE_TESTSET config to chip 
Some xtensa arch have not implentment testset instructions

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-10 14:22:58 +08:00
Huang Qi
7134220ae2 risc-v: Remove duplicated up_idle logic 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-10 13:09:32 +08:00
Huang Qi
9223547afc risc-v: Support cpu activity led in up_idle 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-10 13:09:32 +08:00
Huang Qi
6f18747dc2 risc-v: Add WFI to up_idle and fix compile issue 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-10 13:09:32 +08:00
zhuyanlin
3ab65f9b08 armv7-a/r: use flush/clean_all if size large than cache size 
For cache flush/clean performance

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-09 18:16:31 +01:00
zhuyanlin
4eba2f3527 armv7-a/r:cache: add cp15_cache_size function 
Add cp15_cache_size function for armv7-a/r

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-09 18:16:31 +01:00
Huang Qi
9d91d69ee0 arch/risc-v/mpfs: Remove riscv_pthread_exit.c in Make.defs 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-09 21:21:43 +08:00
Huang Qi
c0a0de97ce Revert "libc: Call pthread_exit in user-space by up_pthread_exit" 
This reverts commit f4a0b7aedd.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-02-09 21:21:43 +08:00
Alin Jerpelea
0cfdfde6c7 arch: sim: update licenses for FishSemi 
FishSemi is part of Xiaomi and according to xiaoxiang781216
the SGA covers those files

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2022-02-09 19:58:52 +08:00
Alin Jerpelea
7a674b6287 Makefiles: change license to Apache 
Make files are recipes based on contributions from from Gregory Nutt

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2022-02-09 19:58:52 +08:00
Alin Jerpelea
e2725d536a arch: sim: update licenses to Apache 
Gregory Nutt is the copyright holder for those files and he has submitted the
SGA as a result we can migrate the licenses to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2022-02-09 19:58:52 +08:00
zhuyanlin
cc8ab23550 armv7-r/a: fix a4 register use in xxx_invalidate/flush/clean_all.S 
Use sub loop instead of add loop

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-08 19:39:43 +09:00
SPRESENSE
8de07b2ae8 boards: cxd56xx: audio: Support I2S input 
Enable the driver setting of I2S input.
 2022-02-08 10:47:03 +01:00
Xiang Xiao
963feca4a1 arch/sim: Don't add up_tls_size in up_use_stack before foward to up_create_stack 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-07 08:45:34 +01:00
Xiang Xiao
202b8141a6 arch/sim: Adjust the stack size for up_use_stack too 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-07 13:36:51 +08:00
Xiang Xiao
5749ea6604 arch/sim: Unify the return value of usrsock_xxx_handler 
All handler should return the result of usrsock_send_[dack|event]

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-07 13:18:19 +08:00
raiden00pl
bc178344a9 net/can: add an option to control CAN EXTID support 2022-02-06 17:09:11 +08:00
raiden00pl
341bbe38d5 arch/stm32: add FDCAN SocketCAN support 2022-02-06 17:09:11 +08:00
Petro Karashchenko
e545c440f4 arch/arm/samv7/sam_progmem: insert DMB instruction into data write loop 
This change fix the regression that was introduced with
https://github.com/apache/incubator-nuttx/pull/4904

In case if D-Cache in configured in Write-Through mode there is
Cortex-M7 erata 1313001 that describes a situation when linefill
buffer or cache contains stale data. Even if progmem write loop
does not fully matches the description there is a possibility
to program stale data if there is no DMB instruction after each
write operation to progmem latch buffer.

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-02-05 03:14:07 +08:00
Petro Karashchenko
47a09ed255 arch/arm/samv7: add arm_systemreset.c to CMN_CSRCS 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-02-04 16:40:50 +08:00
Abdelatif Guettouche
f826e053ae arch/xtensa/esp32: Remove the QEMU special case when initializing the 
heap.

QEMU had a different ROM image that used the regions of PRO CPU for both
CPUs.  This was causing crashes when running SMP mode as the heap was
being corrupted when the APP CPU starts.

QEMU is now loading the same image as the hardware chip and thus this
special case doesn't exist anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-02-03 16:18:09 -03:00
chao.an
3ab557e748 arch/xtensa: correct the netlock handling 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-03 11:09:18 -03:00
chao.an
ed4f852073 arch/arm: correct the sched_lock/spin_lock handling 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-03 11:09:18 -03:00
zouboan
ad3f16358e enable sparc's daily ci and eliminate some warnings 2022-02-03 14:43:21 +01:00
chao.an
0be55bef64 arch/renesas: fix nxstyle warning 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-02 21:45:13 +08:00
chao.an
8e004839b6 arch/renesas: fix leaving from critical section 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-02 21:45:13 +08:00
chao.an
d59931159a arch/arm: fix leaving from critical section 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-02 21:45:13 +08:00
Xiang Xiao
4c167b0729 Correct the code alignment 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-01 21:22:21 -03:00
Xiang Xiao
f987668068 serial: Consolidate the general termios in the common place 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-01 21:22:21 -03:00
zouboan
95542f193b sparc adaptive patch 2022-02-01 17:16:21 +08:00
Petro Karashchenko
601a0e8a32 arch/arm/samv7: fix leaving from critical section in HSMCI callback 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-31 16:56:52 -03:00
Abdelatif Guettouche
f49a579721 esp32c3/: Remove unused exported variables from ROM and add declaration 
for the one used.
 2022-01-31 23:35:50 +08:00
Xiang Xiao
2c3020ddaf arch/Toolchain.defs: Replace --print-file-name=libgcc.a with --print-libgcc-file-name 
to more compatable with clang: https://reviews.llvm.org/D25338

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-31 09:46:04 +01:00
Xiang Xiao
e0b62bf677 arch/Toolchain.defs: Don't expand EXTRA_LIBS immediately 
since board's Make.defs may overwrite ARCHCPUFLAGS

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-30 11:04:35 +09:00
David Sidrane
0f1342f36b stm32:Add OTG ID GPIO disable 2022-01-30 01:50:37 +08:00
David Sidrane
99083b8dd1 stm32{f|h}7:Fixed typo in Kconfig help 2022-01-30 01:49:57 +08:00