Commit Graph

4 Commits

Author SHA1 Message Date
Devansh Purohit
0ffbff84d1 Changed ESP32S3 Chip names based on their configuration and added ESP32S3_CUSTOM chip module
As suggested in PR:12530, changed the default names of ESP32S3WROOM chips to ESP32S3WROOM1N4,
ESP32S3WROOM2N16R8, ESP32S3WROOM2N32R8, ESP32S3MINI1N8.
Also regenerated all the defconfigs for board configurations.
Added a custom ESP32S3 module for custom flash configurations.
Declared ESP32S3_PSRAM_8M variable with prompt
2024-06-21 17:55:42 +08:00
chenwen@espressif.com
62a6a0ab4d xtensa/esp32s3: Tasks use SPIRAM as stack can do SPI flash read/write/erase/map/unmap
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
2023-12-12 22:10:38 -08:00
chenwen@espressif.com
5239d01dba xtensa/esp32s3: Disable psram as task stack
1. Disable psram as task stack to avoid system blocking.
2. Add some function comments.
2023-11-08 16:25:57 -03:00
chenwen@espressif.com
8d94c1b3cb xtensa/esp32s3: Support malloc from external RAM and internal RAM
Enables the allocation of the entire Userspace heap into SPI RAM and reserving the Internal RAM exclusively for the Kernel heap.
2023-11-08 16:25:57 -03:00