This commit adds support for dead time delay to SAMv7 PWM driver. The
dead time can be used to delay an active PWM output at the begining
of the period. This can be used for H bridge control for example.
The values are to be set from the application level. It is required
to allow config option PWM_DEADTIME in order to support dead time delay.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Summary:
add arm64_serialinit/arm64_earlyserialinit function prototype
to arm64_internal.h as common function for arm64 based chip.
Testing with ostest in SP and SMP
Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
Hardware flow control for serial requires the usage of DMAC channels
which is not yet supported for SAMv7 MCU. However the same config option
CONFIG_SERIAL_IFLOWCONTROL is also used for USB CDC/ACM flow control which
works well. Therefore the warning message should be raised only if
flow control is configured for USART driver and not for USB CDC/ACM.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
A list of breaking changes:
- SoftDevice libraries was renamed and libaries are now cmpatible with all platfroms with a given faimily.
- The random number generator was decoupled from the controller and must now be provided by the user.
We use arc4random_buf NuttX API for this.
- sdc_support_ API must be called before sdc_cfg_set()
- update public API terms to Bluetooth Core Specification v5.3 (mainly change slave/master to central/peripheral)
NuttX NRF52 configuration options properly updated.
- BLE features are supported only if the proper BLE role is selected
- sdc_hci_evt_get() and sdc_hci_data_get() have been replaced by sdc_hci_get()
If transfer is restarted in irq handler the interrupts shall be
cleared before the start bit is set in control register. This is
to avoid ints being accidentally cleared before they are handled leading
to timeout error.
In spi_irq handler the data is written into txfifo and transfer
is started before the TXDONE interrupt is cleared. If the bus/memory
access is in some cases delayed, the spi transfer may have been
finished already before the interrupt register is cleaned for the
transfer. This leads the early arrived interrupt to be just removed
and never handled, which would cause a timeout error.
This patch moves the clearing of the interrupt to the place before
the tx is started, so the interrupt is not missed in above cases.
Summary:
Adding virtual evaluate platform FVP. This FVP board configuration
will be used to emulate generic ARM64v8-R (Cotex-R82)series hardware
platform and provide support for these devices:
- GICv3 interrupt controllers for ARMv8-r
- PL011 UART controller(FVP)
Note:
1. ostest is PASSED at fvp ( single core and SMP)
2. the FVP tools can be download from ARM site, please check FVP
board readme.txt
TODO: merge PL011 UART driver to common place
Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
This commit adds configurable fault protection to SAMv7 PWM driver.
The fault input can be used from peripherals as ADC or GPIO inputs.
Inputs from GPIO have configurable polarity (high or low). The PWM output
is automatically set to zero if fault input is active and restored
if fault input is not actived.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
