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40 Commits

Author SHA1 Message Date
Alin Jerpelea
cb2ecefbf1 arch: xtensa: fix nxstyle errors 
Fix for errors reported by nxstyle tool

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-07 21:21:51 -05:00
Alin Jerpelea
778f050102 arch: xtensa: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-04-02 03:14:31 -05:00
Abdelatif Guettouche
27d5c9340a esp32_allocateheap.c: Don't allocate the ROM CPU regions the same way in 
QEMU, the image is different.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-18 11:28:36 +09:00
Dong Heng
b2f5031e96 xtensa/esp32: Refactor ESP32 WiFi driver to support station and softAP coexistence 2021-03-16 10:20:59 -03:00
Abdelatif Guettouche
28160823b6 arch/xtensa/esp32: ~6KB of memory at address 0x3ffae6f0 is not used by 
the ROM bootloader, add that to the heap as well.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
8389e83742 esp32/memory_layout.h: Update the layout taking under consideration the 
changes to the heap regions and to the internal heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
9cfc30fa85 memory_layout.h: Fix the start of region2 when a QEMU image generation 
is enabled.

That region is technically part of the PRO CPU and we should be able to
allocate it early.  However, QEMU uses a slightly different bootloader
image that uses the same part for both CPU.  So, when APP CPU starts
during the SMP bring up it will corrupt some data.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
5c7d041b91 arch/xtensa/esp32: In SMP case move the internal memory to region 3. 
Region 2 is only 15KB in SMP, so we don't have enough memory to play
with.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
cba44928d2 arch/xtensa/esp32: Part of the ROM regions in middle of DRAM are not 
used, retrieve them as heap.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
Abdelatif Guettouche
a68a39c785 xtensa/esp32: Move internal heap to the beginning of region 2. 
Internal heap was occupying the region straight after .data up to
HEAP_REGION1.  The issue with this is if static allocation is large,
we'll end up with too little memory left for the internal heap.
Moving it to the beginning of region 2 gives us more room to play with.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-03-16 16:22:08 +09:00
YAMAMOTO Takashi
e05762c488 esp32/memory_layout.h: Replace Gregory Nutt's copyright notice 
The old copyright notice was inherited from esp32_allocateheap.c.
The new copyright notice was copy-and-pasted from sched_getcpu.c.
 2021-03-05 10:15:52 +00:00
YAMAMOTO Takashi
3857d7491f esp32: Extract memory layout definitions to a separate header 2021-03-05 10:15:52 +00:00
Alan C. Assis
6a87b85285 xtensa/esp32: Add efuse driver 2021-01-26 18:23:43 -08:00
Sara Souza
0faf861256 xtensa/esp32: Added Timer Support 2020-10-07 14:12:22 -03:00
Abdelatif Guettouche
62732dd6b8 arch/xtensa/src/esp32/esp32_gpio.c: ESP32_NIRQ_GPIO was used instead of 
ESP32_NGPIOS

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-10-02 11:42:49 -03:00
Abdelatif Guettouche
769d68a762 arch/xtensa: Fix some typos and correct some comments. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2020-09-30 13:55:28 -03:00
Alan C. Assis
79a3fd1932 ESP32: Add driver support to SPI Master and Slave 
This driver was implemented by Dong Heng <dongheng@espressif.com>
and modified to fix coding style by Alan Carvalho de Assis.
 2020-07-19 21:26:58 +01:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly 
This typo had been copied and pasted into numerous irq and syscall
headers.
 2020-04-05 22:31:15 +01:00
YAMAMOTO Takashi
7774cdd7aa Appease many of nxstyle errors for esp32 related files 
I skipped the following files because they were not simple.
I'll create separate PRs.

    arch/xtensa/src/esp32/esp32_cpustart.c
    arch/xtensa/src/common/xtensa_abi.h
    boards/xtensa/esp32/esp32-core/include/board.h

Also, I skipped the following files and directories because
they looked too huge and/or foreign.

    arch/xtensa/include/esp32/tie.h
    arch/xtensa/include/xtensa/xtensa_corebits.h
    arch/xtensa/src/esp32/hardware/
    arch/xtensa/include/esp32/tie-asm.h
    arch/xtensa/include/esp32/core-isa.h
    arch/xtensa/include/xtensa/core.h

I also fixed a few "is is" style typos when unwrapping long lines.
 2020-03-12 07:45:44 -06:00
Xiang Xiao
bd4e8e19d3 Run codespell -w against all files 
and fix the wrong correction
 2020-02-22 14:45:07 -06:00
Gregory Nutt
cdd8dc72a5 Xtensa ESP32: Basically a redesign of the interrupt dispatch logic. 2016-12-16 15:36:52 -06:00
Gregory Nutt
b5e979d58f ESP32: Fix a couple of bugs associated with handling of CPU interrupts. 2016-12-14 13:31:44 -06:00
Gregory Nutt
a8e3f79494 Xtensa/ESP32: Add User Exception handler 2016-10-31 12:04:52 -06:00
Gregory Nutt
a787a99071 ESP32: Add inter-cpu interrupts 2016-10-31 08:29:28 -06:00
Gregory Nutt
85ed3dae9a Update some compilation issues 2016-10-30 15:38:51 -06:00
Gregory Nutt
fdede8099b Xtensa/ESP32: Add Level1 handler, panic handler, remove EXECHOOKS. 2016-10-30 10:57:57 -06:00
Gregory Nutt
b4b26285f1 ESP32: Add tie-asm.h 2016-10-28 10:53:14 -06:00
Gregory Nutt
76788040d5 ESP32: Add esp32_config.h 2016-10-26 15:45:03 -06:00
Gregory Nutt
650757bbf0 ESP32: Add GPIO support 2016-10-26 12:11:24 -06:00
Gregory Nutt
b8462d3e04 ESP32: Need to take priority into account when allocating CPU interrupts 2016-10-25 16:27:58 -06:00
Gregory Nutt
2a59205ffa ESP32: Add CPU interrupt managmement logic; improve level interrupt decoding. 2016-10-25 12:02:53 -06:00
Gregory Nutt
1dabbd8489 Costmetic changes 2016-10-24 16:18:30 -06:00
Gregory Nutt
6bbe55602c Xtensa: Add tie.h 2016-10-23 13:25:41 -06:00
Gregory Nutt
1fcced12eb Xtensa: Timer code now compiles okay 2016-10-23 11:31:48 -06:00
Gregory Nutt
764ef72641 Xtensa: Restore XCHAL_ naming convenction 2016-10-22 09:03:43 -06:00
Gregory Nutt
1ea22b680d Xtensa: Add timer dispatch logic 2016-10-21 13:23:28 -06:00
Gregory Nutt
9e1600b7d3 Xtensa: Trivial interrupt-related changes 2016-10-20 12:56:35 -06:00
Gregory Nutt
5c3afd088e Xtensa: A little more interrupt handling logic 2016-10-20 11:44:14 -06:00
Gregory Nutt
6f35ced002 ESP32: Add peripheral interrupt IRQ numbers 2016-10-15 08:39:15 -06:00
Gregory Nutt
852330876b arch/xtensa: A little more ESP32 configuration logic 2016-10-12 14:50:28 -06:00