sergiotarxz/nuttx
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26 Commits

Author SHA1 Message Date
Xiang Xiao
3c1c29f2c4 arch: move non arm g_current_regs defintion to common place 
to avoid the code duplicaiton

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-09-21 22:23:11 +02:00
chao.an
7c02432f0e arm/armv7-a/r: set the default CPU mode to System 
In SVC mode, the banked register will be inconsistent with the user mode register:

arch/arm/src/armv7-a/arm_vectors.S

 276   .globl  arm_syscall
 277   .globl  arm_vectorsvc
 278   .type arm_vectorsvc, %function
 279
 280 arm_vectorsvc:
...
 286   sub   sp, sp, #XCPTCONTEXT_SIZE        // < SVC mode SP
...
 308   stmia   r0, {r13, r14}^                // < USR mode SP/LR
...

[    2.200000] [ 4] [ ALERT] SYSCALL Entry: regs: 0x80202708 cmd: 4
[    2.200000] [ 4] [ ALERT]   R0: 00000004 80001229 00000001 80202018 00000000 00000000 00000000 802027d0
[    2.200000] [ 4] [ ALERT]   R8: 00000000 00000000 00000000 00000000 00000000 802027d0 1080f710 1080f710
[    2.200000] [ 4] [ ALERT] CPSR: 00000073
[    2.200000] [ 4] [ ALERT] SYSCALL Exit: regs: 0x80202708
[    2.200000] [ 4] [ ALERT]   R0: 1 80202018 1 80202018 0 0 0 802027d0
[    2.200000] [ 4] [ ALERT]   R8: 0 0 0 0 0 802027d0 1080f710 80001229
[    2.200000] [ 4] [ ALERT] CPSR: 00000070

SVC SP is 0x80202708
USR SP is 0x802027d0
0x802027d0 - 0x80202708 should be XCPTCONTEXT_SIZE

[    2.200000] [ 4] [ ALERT] SYSCALL Entry: regs: 0x80202708 cmd: 51
[    2.200000] [ 4] [ ALERT]   R0: 00000033 00000000 80202780 00000000 00000000 00000000 00000000 80202710
[    2.200000] [ 4] [ ALERT]   R8: 00000000 00000000 00000000 00000000 00000000 80202710 800039d5 800039b2
[    2.200000] [ 4] [ ALERT] CPSR: 00000070
[    2.200000] [ 4] [ ALERT] SYSCALL Exit: regs: 0x80202708
[    2.200000] [ 4] [ ALERT]   R0: 2b 0 80202780 0 0 0 0 80202710
[    2.200000] [ 4] [ ALERT]   R8: 0 0 0 0 0 10843d80 800039d5 10801425
[    2.200000] [ 4] [ ALERT] CPSR: 00000073

SVC SP is 0x80202708
USR SP is 0x80202710
SP overlap in SVC and USR mode

This commit change the default CPU mode to System and ensure the consistency of SP/LR in USR/SYS mode during syscall.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-14 19:54:53 +09:00
Xiang Xiao
54e630e14d arch: Merge up_arch.h into up_internal.h 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-14 09:32:17 +02:00
Xiang Xiao
2935751bfd Fix error: implicit declaration of function 'up_cpu_index' 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-20 23:21:21 +08:00
Xiang Xiao
0779f34390 arch/arm: Add PSR_ prefix to the mode state like armv7-a 
no real function change

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-04-07 16:18:27 +09:00
Alin Jerpelea
20ce2f274a arch: arm: lpc17xx_40xx: fix nxstyle errors 
Fix nxstyle errors to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-28 00:32:09 -05:00
Alin Jerpelea
75a8f353d4 arch: arm: lpcxxxx: Author Gregory Nutt: update licenses to Apache 
Gregory Nutt has submitted the SGA and we can migrate the licenses
 to Apache.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2021-03-28 00:32:09 -05:00
Gregory Nutt
2aa85fd17e arch/arm, board/arm: Rename all up_* functions to arm_* 
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private functions begin with the name of the architecture, not up_.

This PR addresses only these name changes for the ARM-private functions prototyped in arm_internal.h

This change to the files only modifies the name of called functions.  nxstyle fixes were made for all core architecture files.  However, there are well over 5000 additional complaints from MCU drivers and board logic that are unrelated to to this change but were affected by the name change.  It is not humanly possible to fix all of these.   I ask that this change be treated like other cosmetic changes that we have done which do not require full nxstyle compliance.

Impact

There should be not impact of this change (other that one step toward more consistent naming).
Testing

stm32f4discovery:netnsh
 2020-05-01 18:28:13 +01:00
Gregory Nutt
037c9ea0a4 arch/arm: Rename all up_*.h files to arm_*.h 
Summary

The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_.

This PR addresses only these name changes for the up_*.h files.  There are only three, but almost 1680 files that include them:

    up_arch.h
    up_internal.h
    up_vfork.h

The only change to the files is from including up_arch.h to arm_arch.h (for example).

The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm.

Impact

There should be not impact of this change (other that one step toward more consistent naming).

Testing

stm32f4discovery:netnsh
 2020-05-01 03:43:44 +01:00
Gregory Nutt
51be83aa3a ARM: Fix missing header file. Update comments in all *_irq.c files. 2016-03-09 15:08:58 -06:00
Gregory Nutt
4d4f54a789 Rename current_regs to g_current_regs; For ARM, g_current_regs needs to be an array to support multiple CPUs 2016-03-09 13:41:48 -06:00
Gregory Nutt
83bc1c97c3 Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore() 2016-02-14 16:11:25 -06:00
Gregory Nutt
70e502adb0 Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section() 2016-02-13 19:11:09 -06:00
Gregory Nutt
6fc6d17760 Fix some spacing problems 2015-10-04 14:59:08 -06:00
Gregory Nutt
ae15c6963c Make some file section headers more consistent with standard 2015-04-08 08:04:12 -06:00
Gregory Nutt
6455f60c60 Remove os_internal.h it has been replace by several new header files under sched/. There have been some sneak inclusion paths via os_internal.h, so expect a few compilation errors for some architectures 2014-08-08 18:39:28 -06:00
patacongo
36df84c843 Email address change in nuttx/ 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5145 42af7a65-404d-4744-a932-0658087f49c3
 2012-09-13 18:32:24 +00:00
patacongo
7bb3b4c8a1 current_regs should be volatile; add support for nested interrupts; enable interrupts during syscall processing 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3475 42af7a65-404d-4744-a932-0658087f49c3
 2011-04-06 23:01:06 +00:00
patacongo
265e49fc38 Fixes for recent header file reorganization 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2450 42af7a65-404d-4744-a932-0658087f49c3
 2009-12-28 23:35:21 +00:00
patacongo
c23f8334c8 Changing NuttX fixed size type names to C99 standard names -- things will be broken for awhile 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2359 42af7a65-404d-4744-a932-0658087f49c3
 2009-12-16 20:05:51 +00:00
patacongo
35d3c22576 Make sure all ARM targets still compile 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1798 42af7a65-404d-4744-a932-0658087f49c3
 2009-05-19 18:46:14 +00:00
patacongo
af924c567f LPC2148 timer irq fixes 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@931 42af7a65-404d-4744-a932-0658087f49c3
 2008-09-18 22:12:52 +00:00
patacongo
10e928c723 Update lpc214x stuff 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@923 42af7a65-404d-4744-a932-0658087f49c3
 2008-09-17 18:44:34 +00:00
patacongo
4dc4614914 Completes coding of basic interrupt handling logic 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@199 42af7a65-404d-4744-a932-0658087f49c3
 2007-05-03 00:29:56 +00:00
patacongo
361027289c Added some interrupt definitions 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@198 42af7a65-404d-4744-a932-0658087f49c3
 2007-05-02 01:14:06 +00:00
patacongo
af000ee096 Initial lpc214x support 
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@193 42af7a65-404d-4744-a932-0658087f49c3
 2007-04-29 21:29:30 +00:00