Commit Graph

15988 Commits

Author SHA1 Message Date
hujun5
c35e25b7e5 arch: rename xxxx_pause.c to xxxx_smpcall.c
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
d54bc8a9f8 arch: remove up_cpu_pause up_cpu_resume up_cpu_paused up_cpu_pausereq
reason:
  To remove the "sync pause" and decouple the critical section from the dependency on enabling interrupts,
  after that we need to further implement "schedlock + spinlock".
changelist
  1 Modify the implementation of critical sections to no longer involve enabling interrupts or handling synchronous pause events.
  2 GIC_SMP_CPUCALL attach to pause handler to remove arch interface up_cpu_paused_restore up_cpu_paused_save
  3 Completely remove up_cpu_pause, up_cpu_resume, up_cpu_paused, and up_cpu_pausereq
  4 change up_cpu_pause_async to up_send_cpu_sgi

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
4fd92edee7 sched: replace sync pause with async pause for nxsig_process
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
487fcb3bce signal: adjust the signal processing logic to remove the judgment
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
hujun5
8275a846b1 arch: move sigdeliver to common code
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-11 01:30:51 +08:00
buxiasen
ec58a6ab25 arch: cpu pause when sigaction only necessary if tcb running
Signed-off-by: buxiasen <buxiasen@xiaomi.com>
2024-10-11 01:30:51 +08:00
ligd
1fb4f8f50e arch: change nxsched_suspend/resume_scheduler() called position
for the citimon stats:

thread 0:                     thread 1:
enter_critical (t0)
up_switch_context
note suspend thread0 (t1)

                              thread running
                              IRQ happen, in ISR:
                                post thread0
                                up_switch_context
                                note resume thread0 (t2)
                                ISR continue f1
                                ISR continue f2
                                ...
                                ISR continue fn

leave_critical (t3)

You will see, the thread 0, critical_section time is:
(t1 - t0) + (t3 - t2)

BUT, this result contains f1 f2 .. fn time spent, it is wrong
to tell user thead0 hold the critical lots of time but actually
not belong to it.

Resolve:
change the nxsched_suspend/resume_scheduler to real hanppends

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-10-10 15:31:50 +02:00
Yongrong Wang
c48f158e66 arm_gicv2.c: fix armv7a compile error
/vela/nuttx/drivers/pci/pci_ecam.c:432:(.text.pci_ecam_get_irq+0x16): undefined reference to `up_get_legacy_irq'

Signed-off-by: Yongrong Wang <wangyongrong@xiaomi.com>
2024-10-10 15:31:08 +02:00
lipengfei28
1cb81f9a8f armv7a pci irq support
Signed-off-by: lipengfei28 <lipengfei28@xiaomi.com>
2024-10-10 15:31:08 +02:00
zhaohaiyang1
45bb7a9c1c char driver CAN: add tx_confirm function in upperCAN driver.
add tx_confirm function in upperCAN driver1

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-10-10 17:58:36 +08:00
hujun5
a8717c6453 arch: We can use an independent SIG interrupt to handle async pause, which can save processing time.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-09 23:32:31 +08:00
hujun5
ed998c08c4 sched: change the SMP scheduling policy from synchronous to asynchronous
reason:
Currently, if we need to schedule a task to another CPU, we have to completely halt the other CPU,
manipulate the scheduling linked list, and then resume the operation of that CPU. This process is both time-consuming and unnecessary.

During this process, both the current CPU and the target CPU are inevitably subjected to busyloop.

The improved strategy is to simply send a cross-core interrupt to the target CPU.
The current CPU continues to run while the target CPU responds to the interrupt, eliminating the certainty of a busyloop occurring.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-09 23:32:31 +08:00
raiden00pl
a8ffa96b65 arch/arm/Kconfig: fix copy-paste error
ARCH_CHIP_CSK6 has nothing to do with ST chips:
fix option string and move below ST related options
2024-10-09 23:00:06 +08:00
hujun5
d573952790 irq: use up_interrupt_context to replace up_current_regs
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-09 18:16:43 +08:00
hujun5
4ecb6efee8 arm: tc32 nested interrupts are not supported
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-09 18:16:43 +08:00
hujun5
ee81823546 arm: g_current_regs is only used to determine if we are in irq, with other functionalities removed.
reason:
by doing this we can reduce context switch time,
When we exit from an interrupt handler, we directly use tcb->xcp.regs

before
size nuttx
   text    data     bss     dec     hex filename
 225920     409   30925  257254   3ece6 nuttx

after
   text    data     bss     dec     hex filename
 225604     409   30925  256938   3ebaa nuttx

 szie change -316

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-10-09 18:16:43 +08:00
chenrun1
ab4d72756e arch/samd2l2:Ignore atomic warning when using clang compiler
When the toolchain does not support atomic, it will use the version implemented by NuttX (low performance version). This scenario is consistent with the original design, so we can ignore it.

see bug here:
https://bugs.llvm.org/show_bug.cgi?id=43603

Error: inode/fs_inodeaddref.c:50:7: error: large atomic operation may incur significant performance penalty; the access size (4 bytes) exceeds the max lock-free size (0  bytes) [-Werror,-Watomic-alignment]
   50 |       atomic_fetch_add(&inode->i_crefs, 1);
      |       ^
/tools/clang-arm-none-eabi/lib/clang/17/include/stdatomic.h:152:43: note: expanded from macro 'atomic_fetch_add'
  152 | #define atomic_fetch_add(object, operand) __c11_atomic_fetch_add(object, operand, __ATOMIC_SEQ_CST)
      |                                           ^
1 error generated.
make[1]: *** [Makefile:83: fs_inodeaddref.o] Error 1
Error: inode/fs_inodefind.c:74:7: error: large atomic operation may incur significant performance penalty; the access size (4 bytes) exceeds the max lock-free size (0  bytes) [-Werror,-Watomic-alignment]
   74 |       atomic_fetch_add(&node->i_crefs, 1);

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-09-23 14:07:03 +08:00
chenrun1
4cec713dbf fs_inode:Change the type of i_crefs to atomic_int
Summary:
  1.Modified the i_crefs from int16_t to atomic_int
  2.Modified the i_crefs add, delete, read, and initialize interfaces to atomic operations
The purpose of this change is to avoid deadlock in cross-core scenarios, where A Core blocks B Core’s request for a write operation to A Core when A Core requests a read operation to B Core.

Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
2024-09-23 14:07:03 +08:00
wangmingrong1
469418f3c9 mm/kasan: Kasan global support setting alignment length
1. Similar to asan, supports single byte out of bounds detection
2. Fix the script to address the issue of not supporting the big end

Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
2024-09-20 21:47:23 +08:00
wangjianyu3
b14b15ac2d nrf91: Update GPS to GNSS
Related: 03f4ec7765ed8b3551f1a2bc8198c5007a542788

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-20 14:38:43 +08:00
chao an
b82717b9e6 arm/cortex-a,r: replace cp15 instruct to macros to align operation
This is continue work of https://github.com/apache/nuttx/pull/13486

Discussion here:
https://github.com/apache/nuttx/pull/13486#discussion_r1764354675

1. move cp15.h to arch public
2. replace cp15 instruct to macros to align operation
3. add memory barrier to avoid compiler optimization

Signed-off-by: chao an <anchao@lixiang.com>
2024-09-20 09:29:57 +08:00
Petro Karashchenko
f0267bc507 arch/arm/samv7: add support of SocketLIN interface
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-09-19 09:39:54 +08:00
hujun5
0561b55860 arm: optimize up_interrupt_context used in armv[6/7/8]-m
resson:
using percpu storage for g_current_regs or leveraging interrupt status
registers to determine if code is running within an interrupt context can enhance performance.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-19 08:30:09 +08:00
hujun5
6a3a32b185 arch: move up_interrupt_context to arch specific irq.h
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-19 08:30:09 +08:00
hujun5
a754c517cc irq: use per-cpu reg to replace g_current_regs
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-19 08:30:09 +08:00
Xiang Xiao
f76c2ed83b can: Add g_ prefix to can_dlc_to_len and len_to_can_dlc.
detail: Add g_ prefix to can_dlc_to_len and len_to_can_dlc to
follow NuttX coding style conventions for global symbols,
improving code readability and maintainability.

Signed-off-by: zhaohaiyang1 <zhaohaiyang1@xiaomi.com>
2024-09-18 23:50:11 +08:00
wanggang26
ae95623b8d arm_addrenv:fix app crash when enable shm in kernel mode
Hello, World!!
ap> [    2.566000] [ 1] arm_addrenv_destroy_region: listlen=1
vaddr=80000000
[    2.566000] [ 1] gran_free: granmask:0xfff, gatmask:0x10000,
gatidx:0x8, priv->gat[gatidx]:0xffffffff granno:0x110 [mem:0x48110000
free_size:0x1000]
[    2.566000] [ 1] gran_free: granmask:0xfff, gatmask:0x8000,
gatidx:0x8, priv->gat[gatidx]:0xfffeffff granno:0x10f [mem:0x4810f000
free_size:0x1000]
[    2.567000] [ 1] arm_addrenv_destroy_region: listlen=1 vaddr=80100000
[    2.567000] [ 1] gran_free: granmask:0xfff, gatmask:0x40000,
gatidx:0x8, priv->gat[gatidx]:0xfffe7fff granno:0x112 [mem:0x48112000
free_size:0x1000]
[    2.567000] [ 1] gran_free: granmask:0xfff, gatmask:0x20000,
gatidx:0x8, priv->gat[gatidx]:0xfffa7fff granno:0x111 [mem:0x48111000
free_size:0x1000]
[    2.568000] [ 1] arm_addrenv_destroy_region: listlen=1 vaddr=80200000
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x100000,
gatidx:0x8, priv->gat[gatidx]:0xfff87fff granno:0x114 [mem:0x48114000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x200000,
gatidx:0x8, priv->gat[gatidx]:0xffe87fff granno:0x115 [mem:0x48115000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x400000,
gatidx:0x8, priv->gat[gatidx]:0xffc87fff granno:0x116 [mem:0x48116000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x800000,
gatidx:0x8, priv->gat[gatidx]:0xff887fff granno:0x117 [mem:0x48117000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x1000000,
gatidx:0x8, priv->gat[gatidx]:0xff087fff granno:0x118 [mem:0x48118000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x2000000,
gatidx:0x8, priv->gat[gatidx]:0xfe087fff granno:0x119 [mem:0x48119000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x4000000,
gatidx:0x8, priv->gat[gatidx]:0xfc087fff granno:0x11a [mem:0x4811a000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x8000000,
gatidx:0x8, priv->gat[gatidx]:0xf8087fff granno:0x11b [mem:0x4811b000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x10000000,
gatidx:0x8, priv->gat[gatidx]:0xf0087fff granno:0x11c [mem:0x4811c000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x20000000,
gatidx:0x8, priv->gat[gatidx]:0xe0087fff granno:0x11d [mem:0x4811d000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x40000000,
gatidx:0x8, priv->gat[gatidx]:0xc0087fff granno:0x11e [mem:0x4811e000
free_size:0x1000]
[    2.568000] [ 1] gran_free: granmask:0xfff, gatmask:0x80000000,
gatidx:0x8, priv->gat[gatidx]:0x80087fff granno:0x11f [mem:0x4811f000
free_size:0x1000]
[    2.574000] [ 1] gran_free: granmask:0xfff, gatmask:0x80000,
gatidx:0x8, priv->gat[gatidx]:0x87fff granno:0x113 [mem:0x48113000
free_size:0x1000]
[    2.574000] [ 1] arm_addrenv_destroy_region: listlen=1 vaddr=80300000
[    2.574000] [ 1] gran_free: granmask:0xfff, gatmask:0x80000,
gatidx:0x8, priv->gat[gatidx]:0x7fff granno:0x113 [mem:0x48113000
free_size:0x1000]
[    2.575000] [ 1] _assert: Current Version: NuttX  0.0.0
fa1e301238-dirty Apr 16 2024 23:18:10 arm
[    2.575000] [ 1] _assert: Assertion failed : at file:
mm_gran/mm_granfree.c:131 task: lpwork process: Kernel 0x602769

Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-17 15:26:42 -03:00
simbit18
583f025422 Fix Kconfig style
Remove spaces from Kconfig files
Add TABs
Replace help => ---help---
2024-09-17 22:16:41 +08:00
SPRESENSE
237087f61a arch: cxd56xx: Fix issue by update of inode reference
Fix an issue of driver open failure caused by the following commit
that changes the initial value of inode reference.

43d0d95f81 fs/inode: using inode reference to indicate unlink and simply code
2024-09-17 20:13:15 +08:00
wanggang26
a6c3de6e89 goldfish:add kernel mode support
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-17 20:10:13 +08:00
wanggang26
02287a2976 shm:fix build error
after enable both CONFIG_BUILD_KERNEL and CONFIG_ARCH_VMA_MAPPING
arch.h:141:18: error: 'ARCH_SHM_MAXPAGES' undeclared here

Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-17 20:09:39 +08:00
hujun5
c16fd8c911 gicv2:g_gic_init_done need to be protect
Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-16 10:30:41 +08:00
ligd
cd88cb1e48 armv7-a/r: check gic init wait done when using sgi
In SMP mode, qemu/goldfish platform, cpu0 use up_cpu_start()
to start others cpus.

But in previous patch(mathion ahead), arm_gic_initialize() will
wait others cpus start, so deadlocked!

Resolve:
Move the wait logic when use using sgi

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-16 10:30:41 +08:00
Bowen Wang
4f5b3f3d82 arm_gicv2: always enable GIC_ICCICRS_ACKTCTL
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-16 10:30:41 +08:00
Bowen Wang
7f0ab52b12 arm_gicv2: cpu 0 wait other cpu gic init done
After move the SGI irq to group1, other cpu can't response the
sgi request from cpu0 when its gic not initialized.
So let cpu0 wait until all other cpus gic initialize done.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-16 10:30:41 +08:00
ligd
4358eba13a armv7-a/r: export __start symbol
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-16 10:30:41 +08:00
ligd
07b55cf7ab armv7-a/r: set up_cpu_start() to wakefunction
cause some platform will have their special way

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-16 10:30:41 +08:00
Masayuki Ishikawa
df298c186f Revert "build depend:Revert Make.dep intermediate ddc file"
This reverts commit ddc3119c4e.
2024-09-15 19:29:47 +08:00
wanggang26
2c24e5b430 arch/arm-m: Clear lr before jump to __start
to fix issue about https://github.com/apache/nuttx/issues/12687

Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-15 17:31:12 +08:00
xuxin19
ddc3119c4e build depend:Revert Make.dep intermediate ddc file
Revert "Parallelize depend file generation"
This reverts commit d5b6ec450f.

parallel depend ddc does not significantly speed up compilation,
intermediately generated .ddc files can cause problems if compilation is interrupted unexpectedly

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-09-15 10:01:58 +08:00
xuxin19
ab488800bb cmake:enhance the module for adding extra libraries
change the extra library from a file to an import target;
this will avoid differences in the handling of static libraries
between different versions of cmake and different platforms.

after unifying as a target, extra libraries can be
handled as the same as other compiled libraries

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-09-15 10:01:07 +08:00
p-szafonimateusz
ceb2921d79 drivers: prepare 16550 UART driver to support PCI
prepare 16550 UART driver to support PCI:

- [breaking change] change argument of uart_ioctl() from `struct file *filep` to `FAR struct u16550_s *priv`
  Also fix moxart_16550.c build related to this change

- [breaking change] change argument of uart_getreg() and uart_putreg from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`
  Also fix arch/x86/src/qemu/qemu_serial.c and arch/x86_64/src/intel64/intel64_serial.c related to this change

- [breaking change] change argument of uart_dmachan() from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`

- move `struct u16550_s` to public header

- generalize UART_XXX_OFFSET so we can use it with any register increment

- make u16550_bind(), u16550_interrupt(), u16550_interrupt() public

- remove arch/or1k/src/common/or1k_uart.c and use common 16550 MIMO interfacve

- change irq type in `struct u16550_s` from uint8_t to int to match MSI API

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
hujun5
908df725ad arch: use up_current_regs/up_set_current_regs replace CURRENT_REGS
reason:
1 On different architectures, we can utilize more optimized strategies
  to implement up_current_regs/up_set_current_regs.
eg. use interrupt registersor percpu registers.

code size
before
    text    data     bss     dec     hex filename
 262848   49985   63893  376726   5bf96 nuttx

after
       text    data     bss     dec     hex filename
 262844   49985   63893  376722   5bf92 nuttx

size change -4

Configuring NuttX and compile:
$ ./tools/configure.sh -l qemu-armv8a:nsh_smp
$ make
Running with qemu
$ qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic \
   -machine virt,virtualization=on,gic-version=3 \
   -net none -chardev stdio,id=con,mux=on -serial chardev:con \
   -mon chardev=con,mode=readline -kernel ./nuttx

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-13 23:18:58 +08:00
ligd
72bdc9d9b4 armv7/8-m: change enter_critical_section to up_irq_save
caused critical_monitor will gettime, that will caused
enter_critical_seciton recursive

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-13 23:08:00 +08:00
ligd
32f56c3c62 armv8m: support busfault forward to TEE in REE handler mode
Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-09-13 23:08:00 +08:00
hujun5
1aab457b4c sched:add parameters to restore_critical_section
reason:
In SMP, when a context switch occurs, restore_critical_section is executed.
To reduce the time taken for context switching, we directly pass the required
parameters to restore_critical_section instead of acquiring them repeatedly.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2024-09-10 23:14:09 +08:00
adriendesp
42f471ba4d Fix xmc4_spi.c DX select.
Added option to have different DX for each USIC channel.
2024-09-10 11:36:59 +08:00
meijian
a7224cf35a net/netstatistics: add tx/rx bytes statistics for dev
We can see them in ifconfig:

ap> ifconfig
wlan0   Link encap:Ethernet HWaddr 42:64:7f:b3:12:03 at UP mtu 1500
        inet addr:10.0.1.2 DRaddr:10.0.1.1 Mask:255.255.255.0
        inet6 DRaddr: ::

        RX: Received Fragment Errors   Bytes
            00000b9b 00000000 00000000 21daf5
            IPv4     IPv6     ARP      Dropped
            00000a33 00000137 00000031 00000000
        TX: Queued   Sent     Errors   Timeouts Bytes
            00000ac4 00000ac4 00000000 00000000 1a2103
        Total Errors: 00000000

Signed-off-by: meijian <meijian@xiaomi.com>
2024-09-10 11:36:03 +08:00
yanghuatao
c43c91816d toolchain/ghs: add ghs link script for mps2-an500 platform
Signed-off-by: yanghuatao <yanghuatao@xiaomi.com>
2024-09-09 01:26:13 +08:00
George White
3f00c4aae0 rp2040: support pico-sdk 2.0.0
Since the introduction of the rp2350, the pico-sdk project has been
re-arranged and elf2uf2 has been merged in to a new 'picotool' binary
which is supplied and installed separately.
2024-09-08 21:43:22 +08:00