Commit Graph

12 Commits

Author SHA1 Message Date
p-szafonimateusz
b1fd3da0f6 intel64/intel64_irq.c: support interrupts up to 255
From now all intel64 interrupts are supported.
Required step towards MSI/MSI-X

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-08 20:18:39 -03:00
p-szafonimateusz
d4b17f963d arch/intel64: add HPET timer support as oneshot timer
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-03-03 02:24:40 +08:00
p-szafonimateusz
3a3341ba0e arch/intel64: enable FPU and implement up_fpucmp to pass ostest
enable FPU and implement up_fpucmp to pass ostest

With aggressive optimization enabled (-O2/-O3), ostest FPU test will fail.
This is because the compiler will generate additional vector
instructions between subsequent up_fpucmp() calls (loop vectorization
somewhere in usleep() call), which will consequently overwrite
the expected FPU context (XMM registers).

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-02-26 18:17:37 -03:00
Xiang Xiao
fcc48c2254 arch/arm: Don't include arch/arch.h in include/irq.h
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-04 13:25:56 +03:00
Xiang Xiao
3d1ce144df arch: Move up_getsp from arch.h to irq.h
since all other special register operation in irq.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-07-01 10:44:55 -03:00
anjiahao
9d6c92f0fa arch:move debug.h form headfile to c file
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2021-12-07 04:01:27 -08:00
Xiang Xiao
b3f9ffbe72 Replace all __attribute__((aligned(x)) with aligned_data(x)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-07-29 21:55:21 -03:00
Juha Niskanen
abcb67a292 Remove final remaining CONFIG_DISABLE_SIGNALS and CONFIG_DISABLE_SIGNAL 2021-05-10 17:04:38 -03:00
Xiang Xiao
0dc6990166 Fix nxstyle warning
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-13 08:57:58 +01:00
Xiang Xiao
0536953ded Kernel module should prefer functions with nx/kmm prefix
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-01-13 08:57:58 +01:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly
This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
Sonic Yang
b984752aec Flat address x86_64 port of Nuttx (#411)
* arch: x86_64: Pour-in the x86_64 code from cRTOS repository, excluding modifications of NuttX kernel, jailhouse support and linux compatibility layer

* arch: x86_64: Refactor x86_64 loading procedure for better comprehension and included support for multiboot2

* arch: x86_64: Locate the kernel at 4GB~ and modify the page table initializing procedure accordingly

* arch: x86_64: Implemented kconfig option for various x86_64 capabilities, dynamic probe and check capability on lowsetup before enabling

* arch: x86_64: inte64_check_capability: Use Marco to prettify the capability checking procedure

* arch: x86_64: intel64_timerisr.c: Refactor with new frequency calibrating method

* arch: x86_64: Fix C alias of page table and GDT/IST

* arch: x86_64: Reload GTDR with GDT in high address in up_lowsetup

* arch: x86_64: Consolidate MSR definition in arch/arch.h

* arch: x86_64: Edit the way of handling GDT/IST in C into structures

* arch: x86_64: Correct the starting point of isr/irq stack

* arch: x86_64: Update up_initialize.c with the new initializing procedure

* arch: x86_64: up_map_region now take flags instead of assuming WR/PRESENT

* arch: x86_64: Overhual of interrupt initialization procedure

* arch: x86_64: Properly configure the heap to be memory as [_ebss, end of memory]

* arch: x86_64: Try to probe the TSC frequency, fall-back to user specified frequency on failure

* arch: x86_64: Remove debug printing during restore_aux, causing infinite CTX bug

* arch: x86_64: for X86 16500 serial interrupt to work, OUT2 of MCR must be 1. Make it stuck at 1 after boot

* arch: x86_64: Correctly apply license header, comment and format code

* arch: x86_64: properly send a SIGFPE on floating point error

* arch: x86_64: Remove unused variable in up_restore_auxstate

* arch: x86_64: properly trash the processor with an infinite loop

* arch: x86_64: Fix typo in ISR handler causing ISR not handled

* arch: x86_64: Fix possibile race conditions with scheduler debug option on in signal handling path

* arch: x86_64: Fix typo in MSR_X2APIC_LVTT_TSC_DEADLINE

* arch: x86_64: Migrate tickless implementation to the new MSR naming and frequency calibration method

* board: x86_64: qemu: Add guard to exclude up_netinitialize when compiling without net support

* arch: x86_64: update defconfigs

* arch: x86_64: rename qemu as qemu-intel64

* arch: x86_64: update Board readme
2020-03-03 19:02:59 -06:00