Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution: Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly. This commit is for all USB host drivers under arch/.
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution: Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly. This commit is for all SPI drivers under arch/.
Resolution of Issue 619 will require multiple steps, this part of the first step in that resolution: Every call to nxsem_wait_uninterruptible() must handle the return value from nxsem_wait_uninterruptible properly. This commit is for all I2C drivers under arch/.
* stm32h7_qspi: Board.h now may define the BOARD_QSPI_CLK macro to select one of
RCC_D1CCIPR_QSPISEL_{HCLK,PLL1,PLL2,PER} clocks to use with QUADSPI peripherial.
Defaults to HCLK for backward compatibility.
New macros in qspi.h: QSPICMD_IDUAL and QSPICMD_IQUAD for selecting the bit
width for instruction code (1,2 or 4 bits) of a qspi_cmdinfo_s, and
QSPIMEM_IDUAL and QSPIMEM_IQUAD for selecting the bit width of a qspi_meminfo_s.
* NX style fixes
Unfortunately nxstyle is still not happy because it doesn't
like the following construct. I'm not sure what to do here.
struct
{
const char *pathname;
long mode;
size_t len;
} open =
{
.pathname = pathname,
.mode = host_flags_to_mode(flags),
.len = strlen(pathname),
};
* stm32h7: New timer output mode STM32_TIM_CH_OUTTOGGLE.
In this mode timer generates a square waveform on given timer channel.
The maximal waveform freq is timer clock divided by 4 (prescaler 1, period 1 results in 2 clocks '0' and 2 clocks '1').
* stm32_tim.h styling fixes.
Also fix the following build warning:
chip/sam_serialinit.c: In function 'sam_earlyserialinit':
chip/sam_serialinit.c:71:4: warning: implicit declaration of function 'uart_earlyserialinit'; did you mean 'sam_earlyserialinit'? [-Wimplicit-function-declaration]
71 | uart_earlyserialinit();
| ^~~~~~~~~~~~~~~~~~~~
| sam_earlyserialinit
Change-Id: I93adc5be739c222482b552b6e143e44c8c047794
Signed-off-by: liuhaitao <liuhaitao@xiaomi.com>
This reverts commit f735584514.
These header changes introduce unacceptable errors:
1. The changes alter the width of the initial block comment. That will cause nxstyle failures on most of the files.
2. The third line of the header is an (optional) short description of content of the the file. This change erroneously removes that line.
Automated header file changes can screw up a lot of files, very quickly.
The DBGMCU_APB1_FZ bit persists over regular software resets until next POR-reset. It can impact device power consumption and things that persist over resets are a bane for FOTA updates so make it disabled by default.
OpenOCD sets this via DAP when connecting to target so enabling this from Kconfig is only useful for users of some other debug tooling.
* SAMA5D27 peripheral support - USB Host working
- updated nsh defconfig with vfat for testing USB Host
- sama5d2_xult: USB Host worked.
- ported sam_bringup.c code from sama5d3-xplained
- USB 2.0 HS now working
- other perpherals may work, but haven't been tested
* update license headers to approve NuttX Apache-2.0
Run all .c files modified by PR424 through nxstyle and correct most of the complaints (many long line complaints ignored for now). Update file headers to use Apache 2.0 license.
Not canceling the I2C timeout watch dog immediately after finishing
all I2C transactions in interrupt context can lead to a race condition
due to nxsem_wait(&priv->wait) in lpc17_40_i2c_start() not resuming
execution fast enough (this can be easily triggered if another task /
thread is using a lot of cpu time).
Falling to cancel the watchdog up to time will cause the priv->wait
semaphore to be incremented twice (first by lpc17_40_i2c_stop() then
by lpc17_40_i2c_timeout()), so all I2C transactions after that will
return immediately and priv->msgs will hold pointers to memory it
doesn't own anymore.
Canceling the priv->timeout watch dog in lpc17_40_i2c_stop() prevents
this as it is executed from the I2C interrupt handler.
arch/arm/src/lpc17xx_40xx/lpc17_40_i2c.c: Fix timeout calculation
For each byte received / transmitted, an acknowledge bit is also
transmitted / received, requiring effectively 9 bits for each byte.
* imxrt: GPIO make tables const
* imxrt: Call out to board to set up FlexRAM
* imxrt: Add Knob for adding the ROM bootloaders 40Kib of RAM to heap
* imxrt: imxrt1060-evk:Add the ability to run from OCRAM
* arch/arm/src/imxrt/imxrt_usbdev.c: Add USB Device support for i.MX RT (USB OTG1)
Based on the LPC43xx USB Device driver.
* imxrt:usbotg Nxstyle fixes
Co-authored-by: thomasactia <61285689+thomasactia@users.noreply.github.com>
There are cases that USE_SERIALDRIVER is defined but USE_EARLYSERIALINIT not defined in some configs. So use ifdef USE_EARLYSERIALINIT to include up_earlyserialinit anyway.
An error was introduced from:
commit f982ee43db
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Date: Tue Feb 18 09:55:04 2020 +0800
drivers/serial: Remove the lowconsole driver
Replace with the syslog console driver which has more capability than lowconsole
* arch/arm/src/tiva/Make.defs: Compile only when enabled by configuration CONFIG_ARM_SEMIHOSTING_HOSTFS
* arch/arm/src/common/up_hostfs.c: Remove the ifdef conditional because it's redundant with the make logic.
Largely copy-and-paste from stm32f4discovery.
Also arch/arm/src/armv7-m/mpu.h: Ensure RBAR alignment
Fix crashes on init task startup I observed on qemu-system-arm -M lm3s6965evb.
And remove syslog_init_e because all initialization is later now and we don't
distinguish the initialition phase anymore after ramlog don't need special
initialize.
Because we can get the same function by CONSOLE_SYSLOG/syslog_console_init.
BTW, it isn't a good choice to use g_ramlogfops as /dev/console since nsh
will read back what it send out which will surprise most people.
it doesn't make sense that iob initialization is in up_initialize
but other memory components initialization is called in nx_start
Change-Id: Id43aeaa995f340c5943f59a0067a483ff3ac34a2
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Currently up_allocate_heap() assumes that g_idle_topstack points
top of the heap memory. However, g_idle_topstack pointed incorrect
address in SMP mode which resulted in heap corruption. This PR
moves g_idle_topstack at the end of .noinit to avoid this issue.
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
Call xxx_timer_initialize from clock subsystem to make timer ready for use as soon as possiblei and revert the workaround:
commit 0863e771a9
Author: Gregory Nutt <gnutt@nuttx.org>
Date: Fri Apr 26 07:24:57 2019 -0600
Revert "sched/clock/clock_initialize.c: clock_inittime() needs to be done with CONFIG_SCHED_TICKLESS and clock_initialize should skip clock_inittime() for external RTC case since the RTC isn't ready yet."
This reverts commit 2bc709d4b9.
Commit 2bc709d4b9 was intended to handle the case where up_timer_gettime may not start from zero case. However, this change has the side-effect of breaking every implementation of tickless mode: After this change the tickless timer structures are used before they are initialized in clock_inittime(). Initialization happens later when up_initialize is called() when arm_timer_initialize().
Since the tickless mode timer is very special, one solution might be to
1. Rename xxx_timer_initialize to up_timer_initialize
2 Move up_timer_initialize to include/nuttx/arch.h
3. Call it from clock subsystem instead up_initialize
Basically, this change make timer initialization almost same as rtc initialization(up_rtc_initialize).
For now, however, we just need to revert the change.
* S32K add support for Nxp drone boards
* Update arch/arm/src/s32k1xx/hardware/s32k1xx_rtc.h codestyle
Co-Authored-By: David Sidrane <David.Sidrane@Nscdg.com>
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>
Co-authored-by: David Sidrane <David.Sidrane@Nscdg.com>
* Serial Fixed interrupt storm
The target would randomly hang in the serial isr.
The priv->ie and the hardware were inconsistent.
The isr used the priv->ie to gate offloading
the RX data. Bang! Hung.
imxrt_disableuartint(priv, &ie);
ret = imxrt_setup(dev);
/* Restore the interrupt state */
imxrt_restoreuartint(priv, ie);
interrupt-> Of no return
priv->ie = ie;
On a fast cpu with FIFO, this will not work
with out proper protections.
* Serial: Conditionally enable 9 bit mode
* armv7-mi/mpu.hi: Restructure API
Preserve the existing API and enabled better granualriy on
setting.
* Enable MPU for non protected builds to set cache
* mpuinit use symbolic values for addresses
* Allow DTCM on HEAP
* allocateheap Fix Coding style
All STM32L4 MPUs have FLASH_CR_PNB bits (8 bits), and some MPUs have FLASH_CR_BKER bit to change bank if page >= 256.
The code wasn't setting or clearing FLASH_CR_BKER correctly.
Author: Gregory Nutt <gnutt@nuttx.org>
Run .c modified by the PR through tools/nxstyle and correct all reporting coding style problems noted in the file.
Author: Satoshi Togawa <togawa@develcb210.centurysys.co.jp>
STM32L4: Add workaround of data cache corruption on RWW.
Some STM32L4 chips has eratta "Data cache might be corrupted during Flash Read While Write operation". This is also in STM32, and arch/arm/src/stm32/stm32f20xxf40xx_flash.c has workaround.
To enable this workaround, define CONFIG_STM32L4_FLASH_WORKAROUND_DATA_CACHE_CORRUPTION_ON_RWW.
Recent changes removed CONFIG_TIME_ENHANCED and unmasked some warnings. These warnings were caused by nuttx/time.h not being included by files that now referenced clock_daysbeforemonth() and clock_isleapyear().
This commit adds those missing inclusions and eliminates the warnings.
Co-authored-by: Gregory Nutt <gnutt@nuttx.org>
Fix these build errors which occurred if there was no PHY:
chip/lpc17_40_ethernet.c:1643:31: error: expected expression before ';' token
ret lpc17_40_phyinit();
chip/lpc17_40_ethernet.c:3941:1: error: expected identifier or '(' before '{' token
{
chip/lpc17_40_ethernet.c:448:13: warning: 'lpc17_40_macmode' used but never defined
static void lpc17_40_macmode(uint8_t mode);
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
Fix warning: selects SDIO_DMA or SDIO_BLOCKSETUP which has unmet direct dependencies (MMCSD)
Fix warning: selects NETDEV_TELNET which has unmet direct dependencies (NETDEVICES && NET && NET_TCP)
Fix warning: selects ARCH_PHY_INTERRUPT which has unmet direct dependencies (NETDEVICES && ARCH_HAVE_PHY)
Fix warning: selects USBHOST_HAVE_ASYNCH which has unmet direct dependencies (USBHOST)
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Gregory Nutt <gnutt@nuttx.org>
Run all .c and .h files modified in this PR through nxstyle and correct all coding standard problems.
Xiang Xiao <xiaoxiang@xiaomi.com>
Remove TIME_EXTENDED option to more conform C standard
Note: the code/data size increment is small
Fix warning found in build testing: "warning: 'dac_interrupt' defined but not used [-Wunused-function]. The compiler is right, dac_interrupt is not used. It is, apparently, a placeholder for future interrupt support. Now conditioned out with #if 0 to suppress build test warnings.
Co-authored-by: Gregory Nutt <gnutt@nuttx.org>
sama5d3-xplained:ethernet-over-phy configuration found in build testing:
arch/arm/src/sama5/sam_irq.c: Fix "Control reaches end of non-void function " warning
arch/arm/src/sama5/sam_udphs.c: Fix "unused variable 'epno'" warning
boards/arm/sama5/sama5d*-*/src/sam_usb.c: Fix "warning 'HAVE_USBHOST' not defined" warnings
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle against .c and .h files and fix it
Author: Juha Niskanen <juha.niskanen@haltian.com>
Fix typos and some incorrect comments
* arch/arm/src/nrf52/hardware/nrf52_twi.h: fix typo
* arch/arm/src/nrf52/nrf52_i2c.c: add interrupts support and some debug messages
* boards/arm/nrf52/nrf52840-dk: add support for hts221 and lsm303agr; boards/arm/nrf52/nrf52840-dk: fix issues noted by nxstyle
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle on .c and .h files and fix it
Author: raiden00pl <raiden00pl@gmail.com>
arch/arm/src/nrf52: use the same naming convention for register defs
arch/arm/src/nrf52/hardware/nrf52_ficr.h: remove invalid defs
arch/arm/src/nrf52/hardware: add TIMER register defs
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle again .c file and fix error message
Author: Daniel P. Carvalho <danieloak@gmail.com>
Add SPWM example to test STM32L4 PWM driver low level operations.
Fix BUGs.
1. No .c file should include a "Public Types" section. Only a header file can define a public type. A .c file can only define a private type. Several files contained private type definitions. The section that they were defined in, however, was incorrectly named "Public Types." Those were easilty changed to "Private Types" which is what they are.
2. No .c file should include a "Public Function Prototypes" section. All global function prototypes should be provided via a header file and never declared with a .c file.
For No. 2, I corrected as many cases as was reasonable for the time that I had available. But there are still a dozen or so .c files that declare "Public Function Prototypes" within a .c file. This is bad programming style. These declarations should all be moved to the proper header files.
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle on .c files and fix the issues
Author: Xiang Xiao <xiaoxiang@xiaomi.com>
arch/stm32 ensure all spi dma handler check the result
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
Author: Alan Carvalho de Assis <acassis@gmail.com>
Run nxstyle against .c .h files and fix it
Author: Adam Feuer <adam@starcat.io>
Summary
Adds CDC ECM Ethernet over USB High Speed for SAMA5D36-Xplained
(and maybe other boards) (most of the code was there already,
but didn't work out of the box for the SAMA5D36-Xplained)
Only SAMA5D36-Xplained has been tested so far
Impact
None if you don't use the CDC ECM Ethernet driver
On SAMA5D36-Xplained, this adds high-speed Internet connectivity
over USB 2.0 High Speed. via the USB CDC ECM Gadget driver.
It may work on other boards too.
This also fixed full-speed (low-speed) mode for the board too.
Limitations
Hasn't been tested on anything other than SAMA5D36-Xplained board.
TODO
Ideally this would include a composite RNDIS device so it would
also work seamlessly on Windows. That is for a future PR
Ideally this would include software to help configuration via
mDNS/DNS-SD for plug and play compatibility with Linux and macOS.
That is for a future PR.
Detail
Only a few lines of C driver code needed to be changed, since the
capability was there already. The rest is config and documentation.
Changes the SAMA5D3-Xplained board bringup to match the SAMA5D3-EK
board bringup
A helper script to configure Linux routing and iptables NAT is also
provided, along with documentation on how to use it.
Testing
Manual, on a Ubuntu Linux 19.10 system and MacOS 10.14.6 Mojave
MacBook Pro.
How To Verify
Follow the new CDC ECM Ethernet over USB instructions in the board
README.txt file
Commits:
remove non-UTF-8 chars in comment and reformat
removed unneeded comment markers
instructions for using the defconfigs
removed EMAC from config
- to prove this example only needs the CDC ECM Ethernet over USB to work
added CDC-ECM Ethernet over USB info to README
added U-Boot image
added netusb helper script
- this can configure the Linux network interface and routes
so you can ping or access the NuttX system via TCP/IP.
renamed defconfig dirs to be ethernet-over-usb
- was usb-over-ethernet which is not right
added USB DMA to defconfigs
updated readme with autoboot and debugging info
bringing ethernet-over-usb examples into parity
added cdc ecm ethernet over usb with telnetd config
added defconfig
only use phy interrupt if netdevices is ethernet
- because now netdevice could be CDC ECM ethernet over usb
which has no PHY interrupt
add bringup to Makefile
add bringup
app init cleanup
init cdc ecm driver and rndis driver; some cleanup
fixed some typos and odd characters
usb over ethernet working over usb 2.0 hs
