Gregory Nutt
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1bd74b4dcc
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Tiva Timer: Allow timeout interrupts even if the reload value is zero. That is the value that is need to get an interrupt on the wrap from 0xffffffff to 0x00000000
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2015-01-13 08:29:25 -06:00 |
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Gregory Nutt
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cfc0732c57
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Tiva Timer: Add conditional compilation to enable/disable each timer feature. Not only does this reduce the footprint by suppressing unused features, it also protects from partially implemented features that are now conditioned on EXPERIMENTAL
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2015-01-13 07:49:20 -06:00 |
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Gregory Nutt
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73e6fc8142
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Tiva Timer: Rename tiva_timer.c to tiva_timerlib.c
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2015-01-12 15:55:41 -06:00 |
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Gregory Nutt
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f93e69e94e
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Tiva Timer: First cut at timer driver lower half (still incomplete)
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2015-01-12 15:52:48 -06:00 |
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Gregory Nutt
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4510be6c7d
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Tiva Interrupts: Changes corresponding to the last needed in the Tiva Kconfig file as well
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2015-01-12 10:14:48 -06:00 |
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Gregory Nutt
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90da8aa71d
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Tiva Timers: Add interfaces to read the current timer value
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2015-01-12 10:00:41 -06:00 |
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Gregory Nutt
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e5a0dcd0f9
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USB host drivers: Change all parmeters named class to usbclass to avoid C++ conflicts
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2015-01-11 08:05:09 -06:00 |
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Gregory Nutt
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b75c43f6ef
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Tiva Timer: Fix a typo
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2015-01-10 12:42:39 -06:00 |
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Gregory Nutt
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3c06976ba7
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Tiva Timer: Implements configuration of the 32-bit RTC timer
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2015-01-10 12:41:15 -06:00 |
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Gregory Nutt
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c0e1dc3b8a
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Tiva Timer: Add support for RTC match interrupts
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2015-01-10 12:22:37 -06:00 |
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Gregory Nutt
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a2a5c47d9d
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Tive Timer: Add support for ADC trigger generation from one-shot and periodic timers for timeout and match evetns
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2015-01-10 10:07:56 -06:00 |
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Gregory Nutt
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2eeca96330
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Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled
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2015-01-10 08:34:39 -06:00 |
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Gregory Nutt
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2871677362
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Tiva Timer: Add support for input clock prescaler in 16-bit one-shot/periodic modes
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2015-01-09 16:49:00 -06:00 |
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Gregory Nutt
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df48abcc47
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Tiva Timer: Add logic to acknowledge Tiva Timer interrupts
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2015-01-09 15:01:49 -06:00 |
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Gregory Nutt
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9ae597c441
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Tive System Control: Add logic to configure the alternatie clock source (ALTCLK). Needed by the Tiva timer module
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2015-01-09 14:10:31 -06:00 |
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Gregory Nutt
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7384857658
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Tiva Timer: Add more interrupt management logic
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2015-01-09 13:29:03 -06:00 |
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Gregory Nutt
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626d6cdab4
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Tiva Timer: Add functions to set match registers; Add logic to select count direction
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2015-01-09 12:05:26 -06:00 |
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Gregory Nutt
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8552b2f679
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Tiva Timer: Add interfaces to start/stop timers and to set the interval load registers.
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2015-01-09 11:07:52 -06:00 |
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Gregory Nutt
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d5d3a23ac3
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Tiva Timers: Add framework to support tmer interrupts
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2015-01-09 10:21:59 -06:00 |
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Gregory Nutt
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09bd382697
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Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer configurations
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2015-01-08 13:44:10 -06:00 |
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Gregory Nutt
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58818e1afd
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Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode.
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2015-01-08 11:08:54 -06:00 |
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Gregory Nutt
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d3bc0b7223
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Tiva Timer: Add register level debug support
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2015-01-08 10:14:38 -06:00 |
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Gregory Nutt
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6c612cf967
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Tiva Timer: Add basic framework to configure timers. Incomplete on initial commit
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2015-01-08 09:47:38 -06:00 |
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Gregory Nutt
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92dc58c376
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Tiva Timer: SYNC regiser is only available on GPTM0
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2015-01-08 08:07:31 -06:00 |
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Gregory Nutt
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e55df605a8
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Tiva Timer: Update timer register bit definitions for the LM4F
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2015-01-08 08:03:47 -06:00 |
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Gregory Nutt
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1ed2956ad5
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Tiva Timer: Extend timer register definitions to handle other chips
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2015-01-08 07:56:00 -06:00 |
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Gregory Nutt
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5c68f0dd34
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Tiva Timer: Missed one register bit field definition
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2015-01-07 12:03:08 -06:00 |
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Gregory Nutt
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9eb693845e
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TM4C129X Timer: Completes timer register definition header file
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2015-01-07 11:43:56 -06:00 |
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Gregory Nutt
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81afc06f54
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TM4C129X Timer: Add some missing addresses and some of the register bit definitions. Still incomplete
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2015-01-07 10:07:47 -06:00 |
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Gregory Nutt
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28a52cbd23
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TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions
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2015-01-07 08:57:48 -06:00 |
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Gregory Nutt
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0748291ce9
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Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a problem for higher numbered IRQs on many platforms
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2015-01-06 10:49:47 -06:00 |
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Gregory Nutt
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c429a4d93f
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Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as EXPERIMENTAL)
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2015-01-06 10:48:08 -06:00 |
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Gregory Nutt
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10b349bd1a
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Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt
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2015-01-05 15:12:45 -06:00 |
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Gregory Nutt
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52c4334429
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Tiva: Fixes to support building Tiva TM4C129X I2C driver
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2015-01-05 13:15:40 -06:00 |
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Gregory Nutt
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67aeab7105
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Tiva: Update I2C register definitions to include support for the TM4C129X
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2015-01-05 13:08:07 -06:00 |
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Gregory Nutt
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c4f64c72c8
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Tiva Ethernet: Add support for PHY interrupts
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2015-01-03 13:16:26 -06:00 |
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Gregory Nutt
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40113f0b93
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Tiva Ethernet: Configure external PHY interrupt pin
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2015-01-03 10:59:12 -06:00 |
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Gregory Nutt
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a7e0acbc6f
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Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK
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2015-01-03 09:28:54 -06:00 |
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Gregory Nutt
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15f0a046fd
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Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers
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2015-01-03 06:52:19 -06:00 |
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Gregory Nutt
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6bb12a34dc
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Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion
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2015-01-02 14:05:42 -06:00 |
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Gregory Nutt
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28d44e1b30
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Cosmetic changes
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2015-01-02 13:59:47 -06:00 |
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Gregory Nutt
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b828741900
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Tiva: Fix typos in conditional compilation
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2015-01-02 13:59:30 -06:00 |
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Gregory Nutt
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91a92fc538
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Tiva Ethernet: Add lots of debug output for testing
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2015-01-02 13:10:25 -06:00 |
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Gregory Nutt
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ce3dac34b2
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Tiva: If peripheral ready register not available, then lets say the peripheral is ready
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2015-01-02 12:58:20 -06:00 |
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Gregory Nutt
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194e5a9600
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Tiva: Wait for the console UART to be ready before configuring it
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2015-01-02 12:57:41 -06:00 |
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Gregory Nutt
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47b8ce855e
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Tiva Ethernet: Fix compile problem when debug enabled
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2015-01-02 12:04:22 -06:00 |
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Gregory Nutt
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86dc1726aa
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Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129X
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2015-01-02 11:53:02 -06:00 |
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Gregory Nutt
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9688a9aacb
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Tiva Ethernet: MMC interrupts need to be disable initially
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2015-01-02 11:40:48 -06:00 |
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Gregory Nutt
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ea3895c2e8
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Tiva Ethernet: Update DMA BUSMODE settings based on TI example code
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2015-01-02 11:10:41 -06:00 |
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Gregory Nutt
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67699b8cae
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Tiva Ethernet: Update PHY initialization
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2015-01-02 10:11:57 -06:00 |
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