This revises PROTECTED build for qemu-rv mainly to avoid hard-coded
addresses in linker scripts. It also added rv32 support, cleaned up
config `pnsh64` and added config `pnsh`.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
The ESP32-S3-Korvo-2 is a multimedia development board based on the
ESP32-S3 chip. It is equipped with a two-microphone array which is
suitable for voice recognition and near/far-field voice wake-up
applications. The board integrates multiple peripherals such as
LCD, camera, and microSD card. It also supports JPEG video stream
processing. With all of its outstanding features, the board is an
ideal choice for the development of low-cost and low-power
network-connected audio and video products.
Provide `up_copy_section` function that enables copying data using
the data bus. If the memory destination address is accessible
through the instruction bus, the data is copied using the
correspondent address accessible through the data bus.
This change implements a driver for the two watchdog timers on the BL808, and enables it as part of the timer config. The driver is based on the GP timer driver.
arch/xtensa: add support for capture driver on ESP32 and ESP32|S3|
Squashed:
Initial settings for MCPWM Capture on board level
Created lower half files - compilation ok
Using capture debug features. Simple example on fops works
Successful duty and freq calculation
Documentation update
Fixed and added interupt capabilities for all 3 capture channels
Cleaned defconfig
Renamed macros, added S3 options and moved arch source to common dir
Added support for ESP32S3
Added capture example to defconfig and renamed
Basic bring up ready. New Kconfig options for motor.
Good motor registration
Working on enabling pwm generators
Working on enabling pwm generators
Added fops functions
Success on PWM 50%
stable pwm operation for bdc
Added loopback option for testing
Improved rules on fsm
Working motor direction control
Testing new ISR for fault handling
Issues on fault ISR
Removed fault implementation (not working)
Added support for esp32s3
Documentation improvements
Added default motor spin direction
Added parameter change while running
Review fixes
arch/xtensa: add support for fault signal on motor control
Squashed:
Initial settings for MCPWM Capture on board level
Created lower half files - compilation ok
Using capture debug features. Simple example on fops works
Successful duty and freq calculation
Documentation update
Fixed and added interupt capabilities for all 3 capture channels
Cleaned defconfig
Renamed macros, added S3 options and moved arch source to common dir
Added support for ESP32S3
Added capture example to defconfig and renamed
Basic bring up ready. New Kconfig options for motor.
Good motor registration
Working on enabling pwm generators
Working on enabling pwm generators
Added fops functions
Success on PWM 50%
stable pwm operation for bdc
Added loopback option for testing
Improved rules on fsm
Working motor direction control
Testing new ISR for fault handling
Issues on fault ISR
Removed fault implementation (not working)
Added support for esp32s3
Documentation improvements
Added default motor spin direction
Added parameter change while running
Got responsive fault indicator
Working brakes - still need to work on starting isr
Fixed single-time ISR initializiation
Working soft brake on fault
Improved KConfig for BDC and BLDC
Kconfig fixed at board level
- This PR adds the LED Driver for QEMU RISC-V 32-bit and 64-bit (User LEDs and Auto LEDs)
- QEMU RISC-V LED Driver will be used by the Rust Blinky App for Google Summer of Code
- Blinking the LED is probably the most common Embedded Demo, and now it's supported by QEMU RISC-V
- We added NuttX Configs `rv-virt:leds` and `rv-virt:leds64` to support User LEDs for 32-bit and 64-bit RISC-V
- Turning on/off a Simulated User LED will print a log message: "LED 1 set to 1"
- The code is derived from NuttX PinePhone LED Driver
NuttX generates the app main name from Kconfig symbol
xxxx_PROGNAME. The documentation was defining manually
the entry point as custom_hello(int char, char *argv[])
and pointing CONFIG_INIT_ENTRYPOINT="custom_hello".
The right thing to do is creating the application entry
point as "int main(int char, char *argv[])" and the build
system will add "_main" to the PROGNAME.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
This adds out-of-tree usage guide of CMake for FLAT, PROTECTED and KERNEL
configs so that more kernel developers can enjoy cmake for their daily
work.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This does the following:
1. Fetches mkimage_imx8 (same used with imx9) source code
2. Fetches the ELE / AHAB binary
3. Extracts the ELE / AHAB binary
4. Compiles the mkimage with hostcc
5. Utilizes the mkimage tool to create a bootable SD image,
combining the ELE / AHAB image with the NuttX bootloader
6. dd is used to prepend empty space in place of BL31
7. Outputs sdimage.img which is a bootable binary
8. Removes all binaries, sources code images that have been
downloaded
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32 targets and removes the need
for running 'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
Squashed:
Initial settings for MCPWM Capture on board level
Created lower half files - compilation ok
Using capture debug features. Simple example on fops works
Successful duty and freq calculation
Documentation update
Fixed and added interupt capabilities for all 3 capture channels
Cleaned defconfig
Renamed macros, added S3 options and moved arch source to common dir
Added support for ESP32S3
Added capture example to defconfig and renamed
This PR adds support for Milk-V Duo S 64-bit RISC-V SBC, based on SOPHGO SG2000 SoC (T-Head C906 Core). Most of the code is derived from NuttX for Ox64 BL808. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-sg2000
Modified Files:
`boards/Kconfig`: Added Milk-V Duo S board
`arch/risc-v/src/sg2000/sg2000_timerisr.c`: Fixed MTIMER_FREQ for sleep() to work correctly
New Files in boards/risc-v/sg2000/milkv_duos:
`src/sg2000_appinit.c`: Startup Code
`include/board.h`: Milk-V Duo S Definitions
`include/board_memorymap.h`: Memory Map
`src/etc/init.d/rc.sysinit`, `rcS`: Startup Script
`src/.gitignore`: Ignore the tmp filesystem
`scripts/ld.script`: Linker Script
`scripts/Make.defs`: Milk-V Duo S Makefile
`src/Makefile`: Milk-V Duo S Makefile
`Kconfig`: Milk-V Duo S Config
`configs/nsh/defconfig`: Build Config for `milkv_duos:nsh`
Updated Documentation:
`platforms/risc-v/sg2000/index.rst`: New page for SOPHGO SG2000 SoC
`platforms/risc-v/sg2000/boards/milkv_duos/index.rst`: Building and booting NuttX for Milk-V Duo S
As kernel mode is not necessary for S mode build, update related
information for the rv-virt board.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s2 targets and removes the need
for running 'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
This adds basic API description for ADC and DAC peripherals. External
ADC/DAC controllers are listed as well.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
1. Adjust code to avoid PM wakelock->count less than or equal to 0.
2. Fix some document format issues.
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
Since SSTC is support by QEMU 7.2.9, kernel mode nuttx is no
longer worked for older QEMU.
Add necessary requirement information for rv-virt board.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
The qemu-rv use a small init code for M mode in kernel build.
It is hard-coding and is difficult to change. Due to the fact,
introduce a already mature SBI implement (e.g OpenSBI) to
replace existing code is a better choice.
This patch introduce some change for qemu-rv:
1. use SSTC to provide time interrupt in kernel build
2. remove uncessary M mode trap.
For simplicity, this patch does not add support for booting
nuttx for any core, but force boot core to start core 0 and
let core 0 do the initialization.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
1. pm configuration demonstrates the use of power management present on the ESP32-S3.
2. You can use the pmconfig command to test the power management, for details look at
``Documentation/platforms/xtensa/esp32s3/boards/esp32s3-devkit/index.rst``
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
It is advisable to set bootdelay to 0 when using bootcmd to disable
dcache on u-boot. Using bootdelay -1 will definitely work as it disables
bootcmd altogether (and leaves the dcache enabled). This step is added
to remove confusion.
Notes:
1. This version of NAT66 is a stateful one like NAT44, corresponding to Linux's MASQUERADE target of ip6tables. We can support stateless NAT66 & NPTv6 later by slightly modify the address & port selection logic (maybe just match the rules and skip the entry find).
2. We're using same flag `IFF_NAT` for both NAT44 & NAT66 to make control easier. Which means, if we enable NAT, both NAT44 & NAT66 will be enabled. If we don't want one of them, we can just disable that one in Kconfig.
3. Maybe we can accelerate the checksum adjustment by pre-calculate a difference of checksum, and apply it to each packet, instead of calling `net_chksum_adjust` each time. Just a thought, maybe do it later.
4. IP fragment segments on NAT66 connections are not supported yet.
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
To prepare for future IPv6 NAT functions.
- Rename common ipv4_nat_xxx to nat_xxx
- Move some common definitions into header
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
The symmetric NAT limits one external port to be used with only one peer ip:port.
Note:
1. To avoid using too much #ifdef, we're always passing peer_ip and peer_port as arguments, but won't use them under full cone NAT, let the compiler optimize them.
2. We need to find port binding without peer ip:port, so don't add peer ip:port into hash key.
3. Symmetric NAT needs to *select another external port if a port is used by any other NAT entry*, this behavior is exactly same as Full Cone NAT, so we don't need to change anything related to `ipv4_nat_port_inuse`.
Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
