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6,339 Commits 1 Branch 0 Tags 291 MiB
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Commit Graph

30 Commits

Author SHA1 Message Date
Gregory Nutt
02f7c5d8d5 SAMA5 LCDC: Fixed backlight PWM divider. Backlight no longer flashes 2013-10-11 17:12:35 -06:00
Gregory Nutt
e9187d3199 SAMA5 LCDC: Wait when the LCDC is resynchronizing (SIF); Try start-up parameters from Barebox (this still don't work) 2013-10-10 18:44:08 -06:00
Gregory Nutt
ff64ccb539 SAMA5 LCDC: Corrections from first debug sessions. Still a way to go 2013-10-09 13:21:27 -06:00
Gregory Nutt
f8397f8238 SAMA5: LCDC driver incorporated into the build system. 2013-10-08 15:30:38 -06:00
Gregory Nutt
ed980b51f7 SAMA5: LCDC driver progress 2013-10-07 12:05:16 -06:00
Gregory Nutt
9d6bfb5238 SAMA5: ADC and touchscreen drivers now build without errors 2013-10-03 14:32:21 -06:00
Gregory Nutt
97a4ecb306 SAMA Touchscreen/ADC: More progress 2013-10-02 16:55:22 -06:00
Gregory Nutt
e92ed407aa SAMA5 ADC/Touchscreen: A little more logic 2013-10-01 14:40:34 -06:00
Gregory Nutt
9b22dafd5f SAMA5D3x-EK: Always use UPLL for USB clocking 2013-09-21 12:20:11 -06:00
Gregory Nutt
dbf07d6d01 SAMA5 OHCI: When UPLL drives OHCI the logically correct divider of 10 does not work; But a divider of 5 does. Why? 2013-09-19 16:10:46 -06:00
Gregory Nutt
9d59d5ef13 SAMA5 EMAC: Incremental progress. Still not code complete 2013-09-16 11:36:12 -06:00
Gregory Nutt
ed7c7a25e7 SAMA5 Ethernet: Add support for PHY interrupts 2013-09-15 12:24:42 -06:00
Gregory Nutt
5c950889cf SAMA5 UDPHS: Support USPHS clock configuration 2013-09-01 11:29:51 -06:00
Gregory Nutt
cd84d1bec4 SAMA5: EHCI now handles low- and full-speed connections by giving them to OHCI; OHCI now uses the work queue to defer interrupt processing; If both OHCI and EHCI are enabled, EHCI is the master of the UHPHS interrupt 2013-08-24 11:34:24 -06:00
Gregory Nutt
320a2e2a0a Beginning of support for SAMA5 EHCI. Not much there yet 2013-08-20 15:46:36 -06:00
Gregory Nutt
371639637f SAMA5: Correct the PLL 48MHz divisor. It was off by a factor of two... no idea why 2013-08-14 19:38:48 -06:00
Gregory Nutt
0098c9ec5f SAMA5: ports should not be reset state (seems to make no difference) 2013-08-14 17:33:31 -06:00
Gregory Nutt
fe73fe2e23 SAMA5: Alternatie clock configuration that yields a perfect 48MHz full speed USB clock and a CPU clock of 384MHz 2013-08-14 15:16:04 -06:00
Gregory Nutt
152a5e6da6 SAMA5: Fix out of range USB PLL divisor 2013-08-14 14:20:01 -06:00
Gregory Nutt
ed49812d2c Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes 2013-08-11 17:11:32 -06:00
Gregory Nutt
fa011d9aca SAMA5: Add PIO interrupt support. Massive name changes for consistency in PIO vs GPIO naming. SAMA5D3x-EK: Add support for SD card detection PIO interrupts 2013-08-06 10:20:17 -06:00
Gregory Nutt
0a32db5e05 SAMA5: Delay loop calibrated; Correct sense of the RED LED 2013-07-31 11:44:30 -06:00
Gregory Nutt
9a94a3707c SAMA5: The ostest configuration have been converted to run out of NOR flash. There is more to be done, however 2013-07-28 15:07:35 -06:00
Gregory Nutt
f0e3011fc3 Removed unused ARMv7-A cache function 2013-07-27 14:03:02 -06:00
Gregory Nutt
77e1c27005 Update SAMA5D3x-EK board configuration to support on-board UART connections, LEDs, and push buttons 2013-07-24 12:27:12 -06:00
Gregory Nutt
e67d610347 SAMA5 clock configuration should now agree with Atmel sample code; Added header file with macros to enable and disable peripheral clocking 2013-07-22 17:00:02 -06:00
Gregory Nutt
a9b0f304e6 Add SAMA5 clock logic. Cloned from SAM3U and not yet verified 2013-07-22 14:42:05 -06:00
Gregory Nutt
87f54f7d0b Add system timer logic for the SAMA5 2013-07-21 15:49:17 -06:00
Gregory Nutt
b26d5c7164 A few more SAMA5D3 files 2013-07-19 17:45:28 -06:00
Gregory Nutt
4a81d47c86 Basic framework to support the AT91SAMA5D3 family and the SAMA5D3x-EK board(s) in particular 2013-07-19 15:23:03 -06:00