Commit Graph

1542 Commits

Author SHA1 Message Date
Inochi Amaoto
1d7afb571f arch/risc-v: report correct interrupt stack base
As `up_get_intstackbase` supports per cpu stack base, fix
the report value with the cpu specific one.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
Inochi Amaoto
a33313413d arch/risc-v: introduce dynamic stack allocation.
It is misleading to allocate stack from static array and heap,
make all stack allocated from heap area.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
Inochi Amaoto
1ef3767f85 arch/risc-v: unfiy IPI access
Add ipi process abstract function support.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
chao an
1f7147129a arch/risc-v: fix break on kernel mode
merge conflicts lead to incorrect ifdef/endif scope

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-26 12:44:57 +09:00
chao an
a51ebeab4b arch/risc-v: decouple Per-CPU scratch with ARCH_USE_S_MODE
In some special chipsets, multiple CPUs may be bundled in one hardware
thread cluster, which results in hartid and cpuindex not being exactly
the same. The new option will decouple Scratch-based Per-CPU storage
with S-Mode to distinguish the real cpu index.

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-25 09:48:59 -03:00
chao an
da4c229312 arch/riscv: replace atomic operations to AMO
RISC-V provided fetch-and-op style atomic primitives as they scale
to highly parallel systems better than LR/SC or CAS. A simple
microarchitecture can implement AMOs using the LR/SC primitives,
provided the implementation can guarantee the AMO eventually
completes. More complex implementations might also implement AMOs
at memory controllers, and can optimize away fetching the original
value when the destination is x0.

Signed-off-by: chao an <anchao@lixiang.com>
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2024-04-25 18:23:58 +09:00
chao an
6086b1410b arch/risc-v: remove the hard code array of cpu idle stack
Do not limit the number of CPU idle stacks by hard code

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-24 11:58:19 +08:00
Yanfeng Liu
5c3fc2796b tools/export: fix names for app linker script and program entry.
This fixes names of program entry and linker script files so that to
support building kernel mode apps using CMake and export package.

flat and protected mode should be the same as before.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-04-24 11:40:16 +08:00
chao an
28044f7d5a arch/risc-v: add support of save/restore vector registers
Reference:
https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc
https://github.com/torvalds/linux/blob/master/arch/riscv/include/asm/vector.h

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-23 16:18:46 -03:00
chao an
4b086f595e arch/risc-v: rename local variable name to avoid shadowed declaration
In file included from common/addrenv.h:33,
                 from common/riscv_initialstate.c:36:
common/riscv_initialstate.c: In function 'up_initial_state':
common/riscv_internal.h:136:16: warning: declaration of 'regval' shadows a previous local [-Wshadow]
  136 |      uintptr_t regval; \
      |                ^~~~~~
common/riscv_initialstate.c:74:12: note: in expansion of macro 'READ_CSR'
   74 |   regval = READ_CSR(CSR_VLENB);
      |            ^~~~~~~~
common/riscv_initialstate.c:63:13: note: shadowed declaration is here
   63 |   uintptr_t regval;
      |             ^~~~~~

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-22 16:22:51 +08:00
chao an
d59f9186ca arch/risc-v: add llvm experimental extensions into command line
LLVM supports (to various degrees) a number of experimental extensions.
All experimental extensions have experimental- as a prefix. There is
explicitly no compatibility promised between versions of the toolchain,
and regular users are strongly advised not to make use of experimental
extensions before they reach ratification.

Fix compile error:
riscv64-unknown-elf-clang: error: invalid arch name 'rv64gcv_zfh_zvfh', requires '-menable-experimental-extensions' for experimental extension 'zvfh'

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-19 20:13:54 +08:00
chao an
e863e3dd37 arch/risc-v: add LLVM clang support
Verified on LLVM-Metal:
$ riscv64-unknown-elf-clang --version
(LLVM-Metal 15.9.0-2023.03.0) clang version 15.9.0
Target: riscv64-unknown-unknown-elf
Thread model: posix

Signed-off-by: chao an <anchao@lixiang.com>
2024-04-19 12:27:56 +08:00
Huang Qi
93d75129de riscv: Add Vector CSRs to csr.h
The CSR register definitions from RVV 1.0 spec: https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#vector-registers

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-04-19 00:31:07 +08:00
Almir Okato
f4bbe276e1 esp32[c3|c6|h2]: Fix simple boot map_rom_segments
Currently Simple Boot image have fixed 2 ROM segments and
2 RAM segments, then the parsing iterator must stop when all
ROM segments are found.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
2024-04-17 00:09:58 +08:00
Yanfeng Liu
200424e59d arch/risc-v: fix RV32 up_addrenv_destroy
This patch fixes the issue/12122 for RV32, where the scanning should be
limited to user space only.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-04-14 14:49:36 +08:00
Jakub Janousek
3ce84d1ba0 arch and board esp32c3-legacy: Add optional iCE40 FPGA loading support
Signed-off-by: Jakub Janousek <janouja9@fel.cvut.cz>
2024-04-12 10:19:58 -03:00
Inochi Amaoto
412d2ce113 arch/riscv: add T-HEAD CSR mapping
Add T-HEAD CSR mapping file.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-11 22:20:39 +08:00
Inochi Amaoto
bae686e127 arch/riscv: force using encoding macro for CSR access
Using CSR name depends on compiler support heavily, but CSR
encoding does not have this problem. It also make it easy to
add new CSR support even if the compiler does not support.

Unify CSR access by using the CSR encoding macro.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-11 10:43:48 +08:00
Huang Qi
9e78b235fe riscv: Add more debug related CSR definitions
This patch adds more debug related CSR definitions
to arch/risc-v/include/csr.h.

These definitions are from the RISC-V Debug Specification
Version 1.0 rc1 (https://github.com/riscv/riscv-debug-spec).

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-04-10 21:10:39 +08:00
ligd
3844efb5b8 stack: update up_get_intstackbase API to support cpu id
For crash dump all the CPU intstack

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-04-09 16:59:00 -03:00
simbit18
9967989b02 Fix Kconfig style
Remove spaces from Kconfig files
Remove TABs
Add comments
2024-04-09 10:49:23 +08:00
Eren Terzioglu
c0d7419d11 esp32[c3|h2|c6]: Bugfixes for filesystem errors 2024-04-09 10:48:40 +08:00
W-M-R
0ede3fc377 kasan: Implementing global variable out of bounds detection
Extracting global variable information using scripts:
kasan_global.py:
1. Extract the global variable information provided by the -- param asan globals=1 option
2. Generate shadow regions for global variable out of bounds detection
Makefile:
1. Implement multiple links, embed the shadow area into the program, and call it by the Kasan module

Signed-off-by: W-M-R <mike_0528@163.com>
2024-04-07 23:31:13 +08:00
Tiago Medicci Serrano
65bd548521 esp32[c3|c6|h2]: Fix RTC data placement
RTC data was not being correctly placed on RTC's memory data due to
linker issues. Also, the image's RTC memory segment was not being
properly parsed by the bootloader.
2024-04-05 02:50:19 +08:00
Eren Terzioglu
19b58a78da risc-v/espressif: Fix empty cpuint number 2024-04-02 16:40:24 -03:00
Tiago Medicci Serrano
9520edeb16 espressif/rmt: Fix minor issues regarding formatting and comments
This commit only fix minor issues regarding formatting and comments
2024-04-02 14:50:59 -03:00
Yanfeng Liu
3a59644485 build/cmake: kernel mode revision
This fixes kernel mode regression caused by #12011

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-30 12:21:59 +08:00
xuxin19
741de4b450 cmake:init protected-mode for CMake build
adjust link options for userspace elf
specify system libs and apps lib to only link with nuttx target in flat build mode

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-03-27 23:01:08 +08:00
Eren Terzioglu
f5030573b7 esp32[c3|c6|h2]: Fix filesystem test support 2024-03-26 20:56:48 +08:00
Eren Terzioglu
d322140464 boards/esp32c6: Add esp32c6 DevKitM board support 2024-03-26 09:43:08 +08:00
Eren Terzioglu
cfcedab76b arch/espressif: Fix esp32c6 strange characters on boot 2024-03-26 09:39:12 +08:00
Yanfeng Liu
56b125bb82 risc-v/arch.h: revising comments
This revises comments about page tables to help understanding.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-25 20:39:24 +08:00
Jukka Laitinen
1f6079814a arch/risc-v/src/common/supervisor/riscv_perform_syscall.c: Record the currently running task in risc-v syscall
If a context switch occurs in syscall, the g_running_task need to be recorded for assert logic.
This copies the logic from arm platforms

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-03-21 18:45:41 +08:00
Jukka Laitinen
f1c877d67d arch/risc-v/src/common/riscv_exception.c: Just _exit the user task causing an exception
We shouldn't panic the kernel when a user task excepts, we can just kill the user task and
it's children. Do this by returning to _exit() in kernel context.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2024-03-20 18:03:15 -03:00
Stuart Ianna
401b3e682c arch/risc-v/litex: Allow FDT to be passed from previous boot change.
Allows a flattened device tree to be passed from either openSBI or the LiteX bios. The FDT is registered can be used, if supported.
2024-03-20 20:53:17 +08:00
Yanfeng Liu
ea8682572c build/cmake: add initial KERNEL mode support
Currently only FLAT mode development can enjoy cmake build system. This
patch tries to add initial kernel mode support. It can build NuttX kernel
and libproxies.a, the latter will be further checked though.

This can already help to build an AMP remote node image as it can share
userland apps living in the AMP master node.

Major changes:

- in top folder:
  - CMakeLists.txt    adjust for KERNEL mode, separate from PROTECTED mode.
- in `syscall`:
  - CMakeLists.txt    add mksyscall target for stubs/proxies generation
- in `syscall/stubs`:
  - CMakeLists.txt    use dependency to mksyscall
- in `syscall/proxies`:
  - CMakeLists.txt    use dependency to mksyscall
- in `arch`:
  - CMakeLists.txt    separate KERNEL from PROTECTED mode.
- in `arch/risc-v/src`:
  - CMakeLists.txt    separate from PROTECTED mode, add sub folders.
- in `arch/risc-v/common`:
  - CMakeLists.txt    add sources and sub-folders for KERNEL mode.
- in `arch/risc-v/k230`:
  - CMakeLists.txt    add sources for KERNEL mode.
- in `boards/risc-v/k230/canmv230/src`:
  - CMakeLists.txt    adjust k230 specific scripts for kernel mode.

New additions:

- in `arch/risc-v/src/nuttsbi/`           add CMakeLists.txt
- in `arch/risc-v/src/common/supervisor/` add CMakeLists.txt

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-15 16:21:23 +08:00
Yanfeng Liu
ea7dbdc8ac risc-v/k230: fix k230_hart_is_big issue
This patch fixes the issue that k230_hart_is_big() doesn't work in
S-mode. It also adds convenient debug macros to ease debugging process

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-14 00:05:06 +08:00
Yanfeng Liu
1fa2559f00 riscv/k230: add ARCH_HAVE_RESET revise logging
This patch adds board_reset and revises debug logging.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-13 13:46:02 +08:00
Eren Terzioglu
11efa29192 esp32h2/scripts: Add simpleboot support for esp32h2 2024-03-09 11:53:47 +08:00
Eren Terzioglu
11a061cad8 esp32c6/scripts: Add simpleboot support for esp32c6 2024-03-09 11:53:47 +08:00
Yanfeng Liu
02d097ac4d riscv/k230: minor revision on PMP settings
This patch simplifies PMP handling for K230 using common APIs.
It also uses `g_misa` variable to expose the MISA issue.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-09 11:52:13 +08:00
Xiang Xiao
64ea027b1a Replace PRIxPTR with %p and remove the cast of (uintptr_t)
The cast of (uintptr_t) is not necessary, and it is better to use %p

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-03-07 09:59:42 -03:00
Yanfeng Liu
cc389b1984 riscv/nuttsbi: revise PMP manipulation in NuttX SBI
Current NuttX SBI assumes empty PMP settings but that is not always
true, for example some bootloaders may have PMP entries locked before
handling over to NuttX. This patch revises it by not using hardcoded
PMP region number.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-07 09:58:55 -03:00
Yanfeng Liu
a66c7c3ee1 comments/docs: fix typos in comments
This fix some typos in comments.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-06 13:31:50 +08:00
trns1997
54e9e582d5 Use C++ standard lib from toolchain
Signed-off-by: trns1997 <trns1997@gmail.com>
2024-03-06 08:42:44 +08:00
Tiago Medicci Serrano
c67502d9b4 riscv: Implement page-fault exception and on-demand paging
When an application is being loaded `up_addrenv_create ` calls
`create_region` to create the address environment. Only the first
entry is mapped when the region is created. Virtual memory that is
not mapped will trigger an exception when accessed. Other memory
pages are allocated and mapped on-demand. This enables setting
larger heap and stack for the process without compromising the
overall system memory.
2024-03-05 09:45:49 +08:00
Yanfeng Liu
a4d61dea80 risc-v/k230: improvements to support K230 vendor u-boot
Previously we need turn off the PMP locks in K230 vendor u-boot to use
NuttX, this complicates the setup process. This patch supports running
NuttX with original vendor u-boot so that to reduce setup complexity.

It also enables empty NSH prompt string in AMP master config as the apps
side support is ready.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-03-03 12:04:14 -03:00
Marco Casaroli
447cc9698f use apps-or-nuttx-Make.defs for archs
This will allow apps to tweak build configuration of NuttX
2024-03-01 12:59:16 -03:00
ligd
2241969e5a SMP: fix crash when switch to new task which is still running
cpu0 thread0:                        cpu1:
sched_yield()
nxsched_set_priority()
nxsched_running_setpriority()
nxsched_reprioritize_rtr()
nxsched_add_readytorun()
up_cpu_pause()
                                     IRQ enter
                                     arm64_pause_handler()
                                     enter_critical_section() begin
                                     up_cpu_paused() pick thread0
                                     arm64_restorestate() set thread0 tcb->xcp.regs to CURRENT_REGS
up_switch_context()
  thread0 -> thread1
arm64_syscall()
    case SYS_switch_context
     change thread0 tcb->xcp.regs
    restore_critical_section()
                                     enter_critical_section() done
                                     leave_critical_section()
                                     IRQ leave with restore CURRENT_REGS
                                     ERROR !!!

Reason:
As descript above, cpu0 swith task: thread0 -> thread1, and the
syscall() execute slowly, this time cpu1 pick thread0 to run at
up_cpu_paused(). Then cpu0 syscall execute, cpu1 IRQ leave error.

Resolve:
Move arm64_restorestate() after enter_critical_section() done

This is a continued fix with:
https://github.com/apache/nuttx/pull/6833

Signed-off-by: ligd <liguiding1@xiaomi.com>
2024-03-01 21:05:00 +09:00
chao an
6d50274ebe nuttx/list: rename container_of to list_container_of from public header
Use private naming to avoid conflicts with user applications

In file included from libuv/src/unix/internal.h:25,
                 from libuv/src/unix/udp.c:23:
libuv/src/uv-common.h:57: warning: "container_of" redefined
   57 | #define container_of(ptr, type, member) \
      |
In file included from nuttx/include/nuttx/list.h:47,
                 from nuttx/include/nuttx/tls.h:40,
                 from nuttx/include/nuttx/sched.h:48,
                 from nuttx/include/nuttx/arch.h:87,
                 from nuttx/include/nuttx/userspace.h:35,
                 from nuttx/include/nuttx/mm/mm.h:30,
                 from nuttx/include/nuttx/kmalloc.h:34,
                 from nuttx/include/nuttx/lib/lib.h:31,
                 from nuttx/include/stdio.h:35,
                 from apps/system/libuv/libuv/include/uv.h:59,
                 from libuv/src/unix/udp.c:22:
nuttx/include/nuttx/nuttx.h:48: note: this is the location of the previous definition
   48 | #define container_of(ptr, type, member) \
      |

Signed-off-by: chao an <anchao@lixiang.com>
2024-02-29 19:44:54 +08:00