Xiang Xiao
807d4490da
arch/arm: Minor style fix
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-05 13:19:20 -07:00
Xiang Xiao
2268c19171
arch/arm: Fix the style issue in assemble files
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remove the unused header file and mimic the difference between sub arch
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-04-04 14:39:16 +01:00
Alin Jerpelea
df7bffe8fd
arch: arm: armv7-r: fix nxstyle errors
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Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Alin Jerpelea
2a9e424f9a
arch: arm: armv7-r: Author Gregory Nutt: update licenses to Apache
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Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-03-25 19:42:44 -07:00
Masayuki Ishikawa
32563b15ac
arch: armv7-r: Refactor interrupt stack related code
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Summary:
- Apply the same logic for armv7-a
- NOTE: stack pointer alignment is 8-byte
Impact:
- Affects armv7-r with interrupt stack enabled
Testing:
- Not tested but should work
Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2020-10-26 09:05:49 -07:00
Gregory Nutt
c1a687a4e5
Trivial changes from review of last PR
2016-11-06 08:11:01 -06:00
Heesub Shin
343243c7c0
ARMv7-R: fix CPSR corruption after exception handling
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A sporadic hang with consequent crash is observed when booting:
arm_prefetchabort: Prefetch abort. PC: 04d34a00 IFAR: 04d34a00 IFSR: 00000008
up_assert: Assertion failed at file:armv7-r/arm_prefetchabort.c line: 87 task: init
up_dumpstate: Current sp: 004c3df0
up_dumpstate: Interrupt stack:
up_dumpstate: base: 004c05fc
up_dumpstate: size: 00000800
up_dumpstate: User stack:
up_dumpstate: base: 004c3f58
up_dumpstate: size: 00000fec
up_dumpstate: User Stack
up_stackdump: 004c3de0: 004a0d14 004c3df0 004c3f58 004a0d20 00000057 004c2c58 09000000 004a42a4
up_stackdump: 004c3e00: 00000003 004c3e10 004a0f1c 004bbcef 33c44b00 004a0f28 04d34a00 00000008
up_stackdump: 004c3e20: 00000008 004a01bc 004bfd38 00000001 00007fff 00000001 34134a00 d83e4c00
up_stackdump: 004c3e40: 09000000 00000000 33c44b00 d83e4c00 0c3f4c00 00000000 00000000 00000003
up_stackdump: 004c3e60: 004c3e70 004a1494 04d34a00 200b0253 004c3ed8 004a5298 004c3ed8 6d00006d
up_stackdump: 004c3e80: 0000006d 004bc3f4 00000009 004a4f64 00000009 b9e0784f 333f3ed0 69d4227d
up_stackdump: 004c3ea0: d81f09bd 0f867344 5a7e2c12 8acefd34 5d00dc1b 004bc432 004c3f08 004c0e08
up_stackdump: 004c3ec0: 00000000 00000000 00000000 00000000 00000000 004a4210 004a5258 004a5300
up_stackdump: 004c3ee0: 00000000 00000001 ffffffff 004c3f80 000002b0 004a4234 00000007 004c3f08
up_stackdump: 004c3f00: 004a58b4 004bc432 004bc3f4 004c3f80 000002b0 0000029c 00000000 0000029c
up_stackdump: 004c3f20: 00000000 004a5900 0000ff01 00000000 00000000 004a61f4 00000000 004a5fa4
up_stackdump: 004c3f40: 00000000 004a5f6c 00000000 004a2668 00000000 00000000 b7509f04 004c3f64
up_registerdump: R0: 00000001 00007fff 00000001 34134a00 d83e4c00 09000000 00000000 33c44b00
up_registerdump: R8: d83e4c00 0c3f4c00 00000000 00000000 00000003 004c3e70 004a1494 04d34a00
up_registerdump: CPSR: 200b0253
It seems to be caused by the corrupted or wrong CPSR restored on return
from exception. NuttX restores the context using code like this:
msr spsr, r1
GCC translates this to:
msr spsr_fc, r1
As a result, not all SPSR fields are updated on exception return. This
should be:
msr spsr_fsxc, r1
On some evaluation boards, spsr_svc may have totally invalid value at
power-on-reset. As it is not initialized at boot, the code above may
result in the corruption of cpsr and thus unexpected behavior.
Reported-by: Eunbong Song <eunb.song@samsung.com>
Signed-off-by: Heesub Shin <heesub.shin@samsung.com>
2016-11-06 20:48:09 +09:00
Gregory Nutt
092c681157
TMS570: Add a little more IRQ/FIQ logic
2015-12-21 10:57:01 -06:00
Gregory Nutt
5585f44b7e
Add initial support for ARMv7-R architecture. Initial commit is largely a clone of ARMv7-A and needs further review
2015-12-14 08:40:38 -06:00
