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12230 Commits

Author SHA1 Message Date
Sebastien Lorquet
87d2f86968 Register renames to allow stm32l4 usb device compilation 2016-09-05 08:50:09 +02:00
David Sidrane
944902a24d F7 Usb Fix for FIFO loosing first word 2016-09-02 07:14:16 -10:00
David Sidrane
81ba54b650 Using uinfo 2016-09-02 03:50:26 -10:00
Sebastien Lorquet
e4a713477a Apply stm32 fix to stm32l4 2016-08-31 13:12:49 +02:00
Gregory Nutt
bef7f5be23 STM32 F7: Remove duplicate call to pkt_input from Ethernet driver. 2016-08-30 08:04:18 -06:00
Gregory Nutt
9c3bade7b4 net/tcp: tcp_ipvX_bind() not actually using the ported selected with port==0. Also removes duplicate call to pkt_input(). Issues noted by Pascal Speck. 2016-08-30 07:59:57 -06:00
David Sidrane
f2809d52d3 stm32_otgfsdev.c edited online with Bitbucket 
dup SOF removed as noted by Sébastien Lorquet
 2016-08-26 17:20:38 +00:00
David Sidrane
87f4a8033a BugFix:Lost first word from FIFO 
1) Do not overwrite Reserved Bits in GINTSTS (per ref manual)*
    2) Acknowledge all pending int on entry to ISR that are Only rc_w1*
    3) Do not disable RXFVL*
    4) Loop until RXFVL is cleared*
    5) Only clear the NAK on the endpoint on the OTGFS_GRXSTSD_PKTSTS_SETUPDONE to
       not loose the first WORD of FIFO all the data  (Bug Fix)

Changed marked *are just driver clean up and ensure ints are not lost.
The bug fix is #5

Test case open putty and observer the Set/Get LineCoding
Without this fix #5 the Get will not match the Set, and
infact the data might be skewed by 4 bytes, that are lost
from the FIFO if the OTGFS_DOEPCTL0_CNAK bit is set in the
OTGFS_GRXSTSD_PKTSTS_SETUPRECVD as opposed to the OTGFS_GRXSTSD_PKTSTS_SETUPDONE

Set Line Coding DATA1: 4B | 00 c2 01 00 00 00 08 | c8 1B
Get Line Coding DATA1: 4B | .. .. .. .. 00 00 08   c8 .. 00 00 07 | 7a 72
 2016-08-25 06:51:52 -10:00
Gregory Nutt
4ebace37a9 Fix typos in LPC43 serial driver. Found by Vytautas Lukenskas 2016-08-24 10:34:56 -06:00
Aleksandr Vyhovanec
6bc952a2cc STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and STM32F107RC. 2016-08-24 10:10:33 -06:00
Gregory Nutt
300361539a sched/sched_cpuload_oneshot: Use the oneshot timer with optional entropy to measuer cPU load if so configured. 2016-08-20 12:47:07 -06:00
Gregory Nutt
ae37c9859f Cosmetic changes from review of PR 120 2016-08-19 06:32:28 -06:00
Michał Łyszczek
0f175039ad Fix compilation warnings for stm32 eth with certain configs 2016-08-19 09:18:18 +02:00
Gregory Nutt
c0074fd6b8 Merged in mlyszczek/nuttx/stm32butterfly2_board (pull request #118) 
add stm32butterfly2 development board
 2016-08-18 11:14:10 -06:00
Alan Carvalho de Assis
a3e1bdde14 STM32 SPI: Fix STM32F3XXX SPI driver to read 8-bit correctly. 2016-08-18 08:38:49 -06:00
Gregory Nutt
3c58e8e9b4 SAMA5: Add oneshot max_delay method 2016-08-18 08:11:40 -06:00
Gregory Nutt
d369eeec95 Remove a misleading comment 2016-08-18 07:13:04 -06:00
Gregory Nutt
01ae660c6c Merged in K-man23/nuttx/stm32_adc_fix (pull request #117) 
Change stm32 adc dma callback to send channel number instead of index
 2016-08-17 14:05:37 -06:00
Konstantin Berezenko
9b3bbc0f09 Change stm32 adc dma callback to send channel number instead of index 2016-08-17 13:02:36 -07:00
Gregory Nutt
319ad528cd Revert "sam_tc_clockselect() reworked to calculate frequency error using smallest possible divisor minimizing the frequency error rather than largest possible divisor which maximized the error." 
This reverts commit 5d5851a5cd.
 2016-08-17 12:34:54 -06:00
Michał Łyszczek
a05d9c18da Add connectivity line stm32 to be able to compile SYSCFG, add definitions for 
usb clock divs
 2016-08-17 20:11:15 +02:00
Konstantin Berezenko
42ee88fe89 STM32F411 and STM32F446 map i2c2_sda_4 to different alternate function numbers 2016-08-17 11:01:44 -07:00
Piotr Mienkowski
5d5851a5cd sam_tc_clockselect() reworked to calculate frequency error using smallest possible divisor minimizing the frequency error rather than largest possible divisor which maximized the error. 2016-08-17 09:51:54 -06:00
Gregory Nutt
17e5da96ea SAMV7: DAC1 not available GMAC is enabled 2016-08-17 07:14:59 -06:00
Gregory Nutt
e57891b41f Kinetis I2C: Review and extend I2C register definitions for K40 and K60 2016-08-16 12:17:23 -06:00
Gregory Nutt
a337494221 Kinetis I2C: Remove literal hex register values. Replace with symbolic definitions from kinetis_i2c.h 2016-08-16 11:44:04 -06:00
Gregory Nutt
7f4488dc80 Review I2C register definitions and add support for the K64 2016-08-16 10:18:52 -06:00
Gregory Nutt
a3b061e54f Kinetis: Add support for I2C2 2016-08-16 10:02:28 -06:00
Gregory Nutt
be83e73957 Kinetis I2C: Add comments, DEBUGASSERTions, and some I2C debug output. 2016-08-16 08:42:30 -06:00
Gregory Nutt
32c1189f51 Re-order some fields so that the structure packs better and so is smaller. 2016-08-16 08:20:55 -06:00
Gregory Nutt
f40bb14495 Kinetis: Add support for I2C1 2016-08-16 07:21:03 -06:00
Gregory Nutt
b2be0be3a6 Simulated oneshot max_delay() method should not return a failure. 2016-08-15 11:43:55 -06:00
Gregory Nutt
3f48392974 Add defaults in SAMV7 configuration for all DAC settings 2016-08-15 10:22:12 -06:00
Gregory Nutt
e53118ffc2 SAMV7 DAC configuration needs some conditional logic 2016-08-15 08:55:11 -06:00
Gregory Nutt
c367e4985f Add configuration logic for the SAMV7 DAC module 2016-08-15 08:21:46 -06:00
Piotr Mienkowski
053aea552f Add support for SAMV7 DACC module 2016-08-15 08:00:36 -06:00
Gregory Nutt
f84780f36e Changes from review of PR 114 2016-08-14 13:38:47 -06:00
Gregory Nutt
2b32869b49 Merged in v01d/nuttx/kinetis-i2c-norestart (pull request #114) 
support NORESTART on kinetis i2c
 2016-08-14 13:27:39 -06:00
v01d
239c56f3b9 support NORESTART 2016-08-14 16:25:18 -03:00
Gregory Nutt
014b8268cc Minor stylistic corrections 2016-08-14 10:14:28 -06:00
Gregory Nutt
45e71a140a Fix some alignment and long line issues 2016-08-13 18:04:09 -06:00
Gregory Nutt
3023724cf2 Changes from review of PR 113 2016-08-13 17:32:35 -06:00
Gregory Nutt
8315b051ca Merged in v01d/nuttx/kinetis_i2c (pull request #113) 
I2C and RTC support for Kinetis
 2016-08-13 16:54:14 -06:00
Gregory Nutt
8052dc4955 STM32 SPI: nbits should be unsigned. Valid range is 4-16 for F3 and L4. 8 or 16 for others. 2016-08-13 16:01:50 -06:00
v01d
5a97def131 kinetis k20 i2c fixed 2016-08-13 18:48:45 -03:00
Gregory Nutt
1a10518dae Update ChangeLog 2016-08-13 12:03:12 -06:00
Gregory Nutt
eed5e41626 Add some comments 2016-08-13 10:24:40 -06:00
Gregory Nutt
172761163b STM32F3 SPI: Cannot write 16-bit value to DR register because of how the F3 implements data packing. 2016-08-13 10:11:23 -06:00
Gregory Nutt
51fcd89b98 Add and fix some SPI debug output 2016-08-13 08:31:37 -06:00
Gregory Nutt
42202c6365 STM32 and STM32L4: Enabling DMA loses other bits in CR2 2016-08-13 08:01:41 -06:00
Gregory Nutt
efc9f674d2 Trivial changes to comments and spacing 2016-08-13 07:50:54 -06:00
Alan Carvalho de Assis
805cb5c752 STM32F3 SPI: Fix a typo 2016-08-13 07:23:48 -06:00
Gregory Nutt
da5563c0e7 STM32: Add conditional logic for STM32F37xx 2016-08-13 06:43:13 -06:00
Gregory Nutt
10f90a1738 STM32 F3: Fix more SPI issues 2016-08-12 19:00:34 -06:00
Gregory Nutt
3383a25c38 Some logic missing from last commit 2016-08-12 18:40:25 -06:00
Gregory Nutt
afb02b56d4 STM32F3 SPI: Fix the number of bit setting for the F3. It works differently than for other parts. 2016-08-12 18:32:37 -06:00
Gregory Nutt
ab16ad7530 Fix some bugs in the oneshot driver logic 2016-08-12 14:19:11 -06:00
Gregory Nutt
046acf6b54 Add a simulated oneshot lowerhalf driver 2016-08-12 13:14:03 -06:00
Gregory Nutt
b4e8876b09 Correct some spacing 2016-08-12 12:41:49 -06:00
Gregory Nutt
82b86cdcf3 oneshot interface: max_delay method should return time in a standard struct timespec form. 2016-08-12 11:33:10 -06:00
Gregory Nutt
89135c55e4 drivers/timer: Add an upper-half, oneshot timer character driver. 2016-08-12 10:40:07 -06:00
Gregory Nutt
61b0ac06bf Missed a dependency in last set of commits 2016-08-11 17:20:12 -06:00
Gregory Nutt
1965e25da4 STM32L4: Add oneshot lower half driver. 2016-08-11 17:14:41 -06:00
Gregory Nutt
a5a776e223 SAM4CM: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. 2016-08-11 17:04:19 -06:00
Gregory Nutt
fa6866b046 SAMA5: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. 2016-08-11 16:47:17 -06:00
Gregory Nutt
b4d4a74059 SAMV7: Add option to support oneshot timer without free-running timer. Add oneshot lower half driver. 2016-08-11 16:27:01 -06:00
Gregory Nutt
d0ce5b1d1e Cosmetic changes to comments and function prototypes 2016-08-11 15:15:37 -06:00
Gregory Nutt
fb349508fd STM32 oneshot lower-half: Missed some data initialization. 2016-08-11 14:57:17 -06:00
Gregory Nutt
eb3a565153 STM32: Add oneshot lower half to build system. Fix some build problems. 2016-08-11 14:53:39 -06:00
Gregory Nutt
1bb93021df STM32: Add a experimental oneshot, lower-half driver for STM32 2016-08-11 14:07:43 -06:00
Gregory Nutt
0e35bad987 Update some comments 2016-08-11 10:12:04 -06:00
Gregory Nutt
accbccd78a Merged in mlyszczek/nuttx/stm32f1connline_pllfix (pull request #111) 
Fix bad pllmul values for stm32f1xx connectivity line.
 2016-08-11 06:44:19 -06:00
Michał Łyszczek
81df56086a Fix bad pllmul values for stm32f1xx connectivity line. 
stm32f1xx connectivity line supports only x4, x5, x6, x7, x8, x9 and x6.5 values
 2016-08-11 10:49:57 +02:00
Young
e30a3b780c Fix two bugs of tiva pwm lower-half driver impl. 2016-08-10 13:25:43 +08:00
Gregory Nutt
7823a1680e Update a comment 2016-08-09 17:08:03 -06:00
Gregory Nutt
698d6d1294 SAM3/4: Extend clocking logic to enable clocking on ports D-F 2016-08-09 17:05:11 -06:00
Gregory Nutt
0918dd98ab Merged in gnagflow/nuttx (pull request #109) 
SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input.
 2016-08-09 16:40:48 -06:00
Gregory Nutt
fdcf0f7e5f Correct some comments 2016-08-09 15:15:21 -06:00
Wolfgang Reissnegger
cf35bb0b18 SAM3/4 GPIO: Enable peripheral clock for GPIO port when GPIO is configured as input. 
The value of a GPIO input is only sampled when the peripheral clock for
the port controller the GPIO resides in is enabled. Therefore we need
to enable the clock even when polling a GPIO.
 2016-08-09 13:23:05 -07:00
Gregory Nutt
b5b7a21bb6 Make reference count a uin16_t and save a couple of bytes. 2016-08-09 13:54:57 -06:00
Gregory Nutt
8b5833f7fe A consequence of Max's change to the logic to enable access to the backup domain is that every call to enabledbkp(true) must be followed by a matching call to enablebkp(false). There was one cse in both RTCC drivers where that may not always be true. 2016-08-09 11:33:47 -06:00
v01d
f715e9b787 RTC working, I2C in progress 2016-08-09 14:01:27 -03:00
Gregory Nutt
5d91b8cabb With last change, stm32_pwr_enablebkp() no longer returns a value 2016-08-09 07:50:31 -06:00
Max Neklyudov
1e3ccbac12 Make stm32_pwr_enablebkp thread safe 2016-08-09 07:36:13 -06:00
Alan Carvalho de Assis
8499f42bf9 Add STM32F37XX DMA channel configuration 2016-08-08 13:29:53 -06:00
Alan Carvalho de Assis
fcf1ae7e05 stm32f37xx: Fix SYSCFG_EXTICR_PORTE defined twice 2016-08-08 12:59:29 -06:00
Alan Carvalho de Assis
834f058573 I'm using NuttX on STM32F373 and saw the config was missing SPI2 and 
SPI3, see datasheet:
www.st.com/resource/en/datasheet/stm32f373cc.pdf

I searched for other members of STM32F37XX family and they also have 3 SPIs:
http://www.st.com/content/st_com/en/search.html#q=STM32F37-t=keywords-page=1
 2016-08-08 12:25:15 -06:00
Gregory Nutt
caea59b340 SPI bit order: Add configuration setting to indicate if an architecture-specif SPI implementation does or does not support LSB bit order. 2016-08-08 12:21:20 -06:00
Gregory Nutt
6df28bc74e Make bit-order SPI H/W feature configurable for better error detection 2016-08-08 11:54:13 -06:00
Gregory Nutt
c3cfd37791 Fix cloned variable error in all SPI drivers 2016-08-08 11:04:01 -06:00
Gregory Nutt
2ae3953f9e STM32/EFM32: If any hardware feature other and LSBFIRST is selected, return -ENOSYS. 2016-08-08 10:37:28 -06:00
Gregory Nutt
7d4cb73bd6 STM32 and EFM32 SPI drivers adopted an incompatible conventions somewhere along the line. The set the number of bits to negative when calling SPI_SETBITS which had the magical side-effect of setting LSB first order of bit transmission. This is not only a hokey way to pass control information but is supported by no other SPI drivers. 
This change three things:  (1) It adds HWFEAT_LSBFIRST as a new H/W feature.  (2) It changes the implementations of SPI_SETBITS in the STM32 and EFM32 derivers so that negated bit numbers are simply errors and it adds the SPI_HWFEATURES method that can set the LSB bit order, and (3) It changes all calls with negative number of bits from all drivers: The number of bits is now always positive and SPI_HWFEATUREs is called with HWFEAT_LSBFIRST to set the bit order.
 2016-08-08 08:28:13 -06:00
v01d
d483f7939f I2C0 support for kinetis/teensy-3.x (to be tested) 2016-08-06 22:23:59 -03:00
Gregory Nutt
56f2454c86 Fix names of pre-processor variables used in header file idempotence 2016-08-06 18:48:45 -06:00
Gregory Nutt
d41008e220 Update some header commments 2016-08-06 18:16:31 -06:00
Gregory Nutt
2b23d4b0e7 Correct some comments 2016-08-06 16:25:02 -06:00
Gregory Nutt
5aaba42b0d Update Renesas REAMDE files 2016-08-06 15:43:27 -06:00
Gregory Nutt
f43ded46e6 Rename arch/sh to arch/renesas, cont'd 2016-08-06 14:03:38 -06:00
Gregory Nutt
8ee155da3d Rename arch/sh to arch/renesas 2016-08-06 13:33:41 -06:00
Gregory Nutt
f5ae207516 Changes from Review of last PR adding Tiva PWM driver 2016-08-05 07:17:42 -06:00