15694 Commits

Author SHA1 Message Date
Yanfeng Liu
1e9434e2db arch/: remove duplicated task exit logs
Newly added logging in `sched/task_exit.c` obsoletes the existing
ones in `arch/up_exit()`, thus remove the latter to reduce duplications.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-17 09:18:17 -08:00
chao an
45cca933f8 CMake: arm/armv8-r: init armv8-r cmake build
Test cmake build on aarch32 fvp:
$ cmake -B build -DBOARD_CONFIG=fvp-armv8r-aarch32/nsh -GNinja
$ cmake --build build

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 00:46:52 -08:00
chao an
7c89f943c0 armv8-r/perf: enable perf count only ARCH_PERF_EVENTS is enabled
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-15 00:46:52 -08:00
Yanfeng Liu
3c327efd2f docs/comments: fix some typos
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
2024-01-15 13:22:13 +08:00
chao an
181a31801d arm/armv8r: remove unused serial_pl011.h
Signed-off-by: chao an <anchao@lixiang.com>
2024-01-11 13:39:06 +01:00
chao an
b7bd2e33b1 arm/armv8-r: wfi secondary cores if SMP is disabled
Check cpu affinity in single core mode to avoid secondary cores bootup

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-11 12:29:59 +01:00
chao an
6e940b74f5 arm/fvp-v8r: fix arm_earlyserialinit() is not called correctly
USE_EARLYSERIALINIT will depends on the definition in arm_internal.h

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-11 00:52:17 -08:00
chao an
5eef09b4a1 arm/armv8-r: fix compile warning
armv8-r/arm_gicv3.c: In function 'gic_validate_dist_version':
armv8-r/arm_gicv3.c:730:9: warning: format '%x' expects argument of type 'unsigned int', but argument 3 has type 'uint32_t' {aka 'long unsigned int'} [-Wformat=]
  730 |   sinfo("GICD_TYPER = 0x%x\n", typer);
      |         ^~~~~~~~~~~~~~~~~~~~~  ~~~~~
      |                                |
      |                                uint32_t {aka long unsigned int}
armv8-r/arm_gicv3.c:730:26: note: format string is defined here
  730 |   sinfo("GICD_TYPER = 0x%x\n", typer);
      |                         ~^
      |                          |
      |                          unsigned int
      |                         %lx

Signed-off-by: chao an <anchao@lixiang.com>
2024-01-11 00:51:28 -08:00
Philippe Leduc
e59c95bc9b Fix mx8mp ecspi interruption management. 2024-01-09 05:48:12 -08:00
Rodrigo Sim
21b02f176f stm32f401rc-rs485: Add rs-485 support 2024-01-07 17:15:59 -08:00
David Sidrane
73bfeccc3f imxrt:ENET Use multi PHY
Allow a board to specify a list of PHYs.
  Then use this list, at run-time, to select and use the
  PHY populated on the board.
2024-01-06 04:26:12 -08:00
TimJTi
438439c1a6 SAMA5 - add LCD backlight PWM cLock source selection 2024-01-05 12:56:27 -03:00
Bowen Wang
df3f95ee1f armv7a/qemu: add QEMU_TRUSTZONE config and default n
Add ARCH_CHIP_QEMU_TRUSTZONE to enable/disable the TrustZone
support beacause qemu also support enable/disable Arm Security
Extensions: https://qemu-project.gitlab.io/qemu/system/arm/virt.html
when launch.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-01-04 20:29:06 -08:00
yinshengkai
9d436b624b tools: support sorting symbol tables by name
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2024-01-04 09:22:57 -08:00
YAMAMOTO Takashi
fc53497ea2 arch/arm/src/cmake/Toolchain.cmake: fix inverted conditions for C++ features
Fix inverted CONFIG_CXX_EXCEPTION/CONFIG_CXX_RTTI checks.
2024-01-04 07:20:04 -08:00
Peter van der Perk
40f4cde8f5 armv7-m: Expose section name to allow relocation 2024-01-04 15:07:18 +01:00
Xiang Xiao
087c519dd6 arch/armv7-a: Change space to tab in arm_smccc.S
follow the coding style from other assembler source files

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-28 11:09:09 +08:00
Xiang Xiao
770d579630 arch/arm: Move arm_vectoraddrexcptn into arm_vectors.S
and remove arm_vectoraddrexcptn.S like other exception handler

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-28 11:09:09 +08:00
yinshengkai
9852428953 fs: procfs add poll support
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-12-26 19:23:13 -08:00
Peter van der Perk
0a41d040ac imxrt: flexio guard move lower to allow other drivers to it 2023-12-21 19:20:43 -03:00
Xiang Xiao
31a6ffa15c arm/sama5: Fix error: array subscript 0 is outside array bounds
chip/sam_emaca.c: In function 'sam_emac_interrupt':
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:140:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  140 | #define getreg32(a)    (*(volatile uint32_t *)(a))
      |                        ~^~~~~~~~~~~~~~~~~~~~~~~~~~
chip/sam_emaca.c:364:37: note: in expansion of macro 'getreg32'
  364 | #  define sam_getreg(priv,addr)     getreg32(addr)
      |                                     ^~~~~~~~
chip/sam_emaca.c:1630:9: note: in expansion of macro 'sam_getreg'
 1630 |   tsr = sam_getreg(priv, SAM_EMAC_TSR_OFFSET);
      |         ^~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
d54c79126a am335x_lcdc: Fix error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]'
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:51: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
chip/am335x_lcdc.c:387:3: note: in expansion of macro 'putreg32'
  387 |   putreg32(AM335X_CM_WKUP_CLKMODE_DPLL_DISP, 0x4);
      |   ^~~~~~~~
In function 'am335x_lcd_initialize':
cc1: note: source object is likely at address zero
In function 'am335x_set_refclk',
    inlined from 'am335x_lcd_initialize' at chip/am335x_lcdc.c:607:9:
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:51: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
chip/am335x_lcdc.c:430:3: note: in expansion of macro 'putreg32'
  430 |   putreg32(AM335X_CM_WKUP_CLKMODE_DPLL_DISP, 0x7);
      |   ^~~~~~~~
In function 'am335x_lcd_initialize':
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:780:3: note: in expansion of macro 'putreg32'
  780 |   putreg32(AM335X_LCD_CLKC_ENABLE,
      |   ^~~~~~~~
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:784:3: note: in expansion of macro 'putreg32'
  784 |   putreg32(AM335X_LCD_CLKC_RESET, LCD_CLKC_RESET_MAIN);
      |   ^~~~~~~~
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:790:3: note: in expansion of macro 'putreg32'
  790 |   putreg32(AM335X_LCD_IRQ_EN_SET, regval);
      |   ^~~~~~~~
cc1: note: source object is likely at address zero
Error: /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:141:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  141 | #define putreg32(v,a)  (*(volatile uint32_t *)(a) = (v))
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~
chip/am335x_lcdc.c:796:3: note: in expansion of macro 'putreg32'
  796 |   putreg32(AM335X_LCD_SYSC, LCD_SYSC_IDLE_SMART | LCD_SYSC_STANDBY_SMART);
      |   ^~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
e42780bb0f arch/arm: Disable -Warray-bound for rp2040, dm320 and lpc31xx
since gcc report the false alarm if the pointer offset from zero address:
    inlined from 'up_vectormapping' at chip/dm320_boot.c:162:7,
    inlined from 'arm_boot' at chip/dm320_boot.c:211:3:
Error: chip/dm320_boot.c:117:17: error: array subscript 0 is outside array bounds of 'uint32_t[0]' {aka 'long unsigned int[]'} [-Werror=array-bounds=]
  117 |   ctable[index] = (paddr | mmuflags);
      |   ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
Xiang Xiao
1e696425fd lpc43xx/usb: Fix gcc13.2 compiler error
Error: arch/arm/src/common/arm_internal.h:140:25: error: array subscript 0 is outside array bounds of 'volatile uint32_t[0]' {aka 'volatile long unsigned int[]'} [-Werror=array-bounds=]
  140 | #define getreg32(a)    (*(volatile uint32_t *)(a))
      |                        ~^~~~~~~~~~~~~~~~~~~~~~~~~~
chip/lpc43_usb0dev.c:347:34: note: in expansion of macro 'getreg32'
  347 | #  define lpc43_getreg(addr)     getreg32(addr)
      |                                  ^~~~~~~~
chip/lpc43_usb0dev.c:2605:15: note: in expansion of macro 'lpc43_getreg'
 2605 |   return (int)lpc43_getreg(LPC43_USBDEV_FRINDEX_OFFSET);
      |               ^~~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-19 08:36:49 +08:00
anjiahao
6c4b30736e arm/debug:fix gdbstub clear fpb & dwt when already use jtag/swo bug
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-18 08:47:56 +01:00
Zhe Weng
5aeb15469a netdev/ipv6: Move xxx_ipv6multicast from arch to common code
The `xxx_ipv6multicast` function in each driver is not adapted to
multiple IPv6 addresses yet, and they're redundant, so try to take them
into common code.

Change:
1. Add MAC `g_ipv6_ethallnodes` and `g_ipv6_ethallrouters` in
   `icmpv6_devinit` and call them in `netdev_register`
2. Add multicast MAC for Neighbor Solicitation when adding any IPv6
   address, and remove them when IPv6 address is removed
3. Select `NET_MCASTGROUP` when `NET_ICMPv6` because now we need
   `d_addmac` when we have ICMPv6

Note:
We want modules outside net stack to call functions like
`netdev_ipv6_add` and never touch the related MAC address, so these MAC
functions are added as internal functions to `net/netdev/netdev.h`

Signed-off-by: Zhe Weng <wengzhe@xiaomi.com>
2023-12-16 05:26:16 -08:00
simbit18
c494ce4a96 Update kconfig2html.c
Fix nuttx coding style
2023-12-14 20:02:52 -08:00
Peter van der Perk
7730201689 imxrt: Extend FlexIO support to 117x 2023-12-14 03:59:36 -08:00
GD32-MCU
9a2569882e fix bug in gd32f4xx_serial.c, add romfsimg.h, gd32f4xx_reset and improve gd32f4xx_gpio.c for f470z board, add board decription for f470
add gd32f470 picture
2023-12-13 23:27:23 -08:00
simbit18
9d50d180b1 Fix nuttx coding style
Remove spaces
Remove extra */
2023-12-13 17:29:08 +01:00
Xiang Xiao
ca5a9c711a Remove @ and % tag from all comments
and format the multiple line comments

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-12-11 17:00:10 -03:00
anjiahao
bb0a706bdc arch/arm:add up_debugpoint api
on armv8-m/armv7-m,implement breakpoint & watchpoint using FBP & DWT

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 08:43:26 -08:00
anjiahao
94d449e722 arch:Mark key functions to prohibit instrumentation to prevent recursive calls
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 02:06:51 -08:00
anjiahao
7dfbd14eba libc: add instrument api support
Add registration function instrumentation API,
which can achieve instrumentation of entering and
exiting functions through the compiler's functionality.

We can use CONFIG_ARCH_INSTRUMENT_ALL to add instrumentation for all
source, or add '-finstrument-functions' to CFLAGS for Part of the
source.

Notice:
1. use CONFIG_ARCH_INSTRUMENT_ALL must mark _start or entry noinstrument_function,
   becuase bss not set.
2. Make sure your callbacks are not instrumented recursively.

use instrument_register to register entry function and exit function.
They will be called by the instrumented function

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-12-11 02:06:51 -08:00
Mete Balci
2215278a53 stm32u5: fix EXTICR2,3,4 register offsets 2023-12-11 10:42:09 +01:00
simbit18
3442af4a19 Fix Kconfig style
Remove extra TABs
Add comments
2023-12-09 13:44:46 -08:00
bertrand
0ca8ae81d0 invert tx and rx in spi_dma_setup
remove indent sam_spi.c

removed indent
2023-12-08 19:50:49 -08:00
Petteri Aimonen
dedb563322 usbdev: Add architecture calls to usbdev_sof_irq() 2023-12-08 21:27:36 -03:00
Anthony Merlino
962ac35170 stm32h7_adc: Dynamically set clock prescaler and BOOST setting.
The ADC peripheral can only support up to
    50MHz on rev V silicon and 36MHz on Y silicon.
    The existing driver always used no prescaler
    and kept boost setting at 0.
2023-12-07 03:50:40 -08:00
David Sidrane
d31214aa25 stm32h7:ADC STM32_RCC_D3CCIPR_ADCSEL->STM32_RCC_D3CCIPR_ADCSRC 2023-12-07 03:50:40 -08:00
David Sidrane
6ad7b82cd6 imxrt:Serial refactor out tx dma semaphore 2023-12-07 03:48:19 -08:00
David Sidrane
a81b36394e imxrt:edma Add idle chack 2023-12-07 03:48:19 -08:00
David Sidrane
cc632ea789 imxrt:edma clear state before callback 2023-12-07 03:48:19 -08:00
David Sidrane
b0e31c7d72 s32k3xx:Serial Use smart invalidate 2023-12-07 03:48:19 -08:00
David Sidrane
05e620d12b imxrt:Serial Use smart invalidate 2023-12-07 03:48:19 -08:00
David Sidrane
982e3e01f0 imxrt:gpio disable imxrt_gpio_select for the 1170
The 1170 usage of the GPR registers is to select the
   between GPIO{2|3} or CM7_GPIO{2|3} where as the 1060
   it selected ports between 1-6,2-7..4-9 and uses
   different GPR registers.

   For the 1170 we are defaulting to GPIO{2|3} and not
   supporting the swtich to CM7_GPIO{2|3}.
2023-12-07 03:48:19 -08:00
Peter van der Perk
9906163beb Base IMXRT1170 port
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com>

Co-authored-by: David Sidrane <david.sidrane@nscdg.com>

Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>

imxrt:Kconfig fix formatting

imxrt:usbphy move IMXRT_USBPHY{1|[2]}_BASE to memory map

imxrt:lpspi Fix build breakage from adding 1170

imxrt:Finish 1170 iomux and clockconfig versioning

imxrt:Remove duplicate imxrt_clock{off|all}_lpi2c4

imxrt:pmu remove duplicate dcd non 117x header

imxrt:lpspi Fix unused var warnings

imxrt:lpi2c Fix unused var warnings

imxrt:lowputs Fix unused var warnings

imxrt:imxrt117x_dmamux fix duplicate entries

imxtr:serial Use IOMUX_PULL_{UP|DOWN} and map IOMUX V1 to them

imxrt:MPU Support the 1170

imxrt:dmamux Alias IMXRT_DMAMUX0_BASE as IMXRT_DMAMUX_BASE

imx1170:ccm Alias CCM_CCGR_DMA & CCM_CCGR_SNVS_LP for compatiblity

Author: Peter van der Perk <peter.vanderperk@nxp.com>

IMXRT7 Add LPUART 9/10/11/12 support

Author: David Sidrane <david.sidrane@nscdg.com>

imxrt:1170pinmux Add QTIMER pins

imxrt:1170pinmux Add GPT pins

imxrt:1170pinmux Add FLEXPWM pins

imxrt1170:pinmap Add GPIO_ENET_1G pinning

imxrt:enet Support ENET_1G

imxrt:periphclks rt1170 does not have canX_serial clock

imxrt:flexcan:Layer imxrt_ioctl

imxrt117x:memorymap added CAN3

imxrt:ADC support ver1 and ver2 for imxrt117x

imxrt:imxrt117x_ccm Align timer naming with other imxrt QTIMERn->TIMERn

imxrt:imxrt117x_ccm align CCM names with rt106x

imxrt:XBAR support larger number of selects needed on imxrt1170

Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>

FlexSPI AHB Region support, PIT rename for compatiblity

imxrt:USB Analog add VBUS_VALID_3V

FlexSPI expand prefetch registers for IMXRT117X

imxrt:Support Initialization of FlexRam without Running from OCRAM

imxrt: ocotp add UNIQUE_ID register definition

imxrt: enet use ocotp unique_id

imxrt: enet fixes for imxrt117x

imxrt: ethernet pinmux sion enable

imxrt:imxrt_periphclk_configure add memory sync

   Flush the pipeline to prevent bus faults, by insuring a
   peripheral is clocked before being accessed on return from
   this function.

imxrt:Restructure gpioN to padmux mapping

imxrt:Add imxrt1170 daisy

imxrt: correct power modes for imxrt117x fixing hang on WFI

imxrt: imxrt117x TCM MPU config

imxrt: FlexRAM clocking DIV0 setup

imxrt: 117x periphclocks wait for status bit

imxrt: iomucx set pad settings correctly and allow reconfiguration

imxrt: enet align buffers 64-byte for optimal performance

Add DSC barriers for write-through cache support

imxrt: imxrt1170 use FlexCAN FD/ECC features

imxrt:iomuxc_ver2 (117x) SD_B1 and DISP_B1 use PULL feild not PUE/PUS

imxrt:Fix 1170 SNVS addressing

imxrt: enet set mii clock after ifdown so that phy keep working

nxstyle fixes

imxrt: preprocessor and include fixes

Fix configs

imxrt1170-evk clean defconfig
2023-12-07 03:48:19 -08:00
David Sidrane
e1a9e8fa53 stm32h7:serial Remove .txdmasem = SEM_INITIALIZER(1) from cherry pick 2023-12-06 21:12:01 +01:00
chao an
a3eb42f469 cmake: split extra library from library group
Signed-off-by: chao an <anchao@xiaomi.com>
2023-12-06 07:56:17 -08:00
David Sidrane
f92a9068dc stm32h7:Serial refactor out tx dma semaphore
Fixes is stuttering output.

   The use of the semaphore was causing blocking
   on non blocking callers. This ensured that
   the TX DAM would be restated, but when it
   was switched to trywait in 660ac6, it left
   data in the xmit queue unsent.

   This solution removes the semaphore and restart
   the DMA on completion if there is more data in
   the xmit queue to be sent.
2023-12-05 08:20:10 -08:00