Commit Graph

1090 Commits

Author SHA1 Message Date
Xiang Xiao
c6e9edcbb6 net: Rename arp_arpin to arp_input
align with other similar function(e.g. ipv4_input and ipv6_input)

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-12-04 20:39:21 +08:00
Masayuki Ishikawa
3b2685409a arch: risc-v: Fix nsec overflow in riscv_mtimer_current()
Summary:
- I noticed that mtimer stops around 30min after boot.
- Finally, I found that nesc overflows in riscv_mtimer_current().
- This commit fixes this issue.

Impact:
- None

Testing:
- Tested with rv-virt:nsh on QEMU-7.1

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-12-01 19:33:39 +08:00
Masayuki Ishikawa
8053931d31 arch: qemu-rv: Add qemu_rv_virtio.c
Summary:
- This commit adds qemu_rv_virtio.c

Impact:
- None

Testing
- Tested with rv-virt:netnsh (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-11-29 13:16:44 +08:00
Xiang Xiao
6d30726a1b Remove the unnecessary "return;" at the end of function
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-27 22:23:50 +01:00
chao an
6fa60627eb net/devif/ip: build l2 header on the IP layer
Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-27 12:13:45 +08:00
chao an
8850dee746 net/devif: move preprocess of txpoll into common code
Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-27 12:11:12 +08:00
Alan Carvalho de Assis
0e57e69b08 Add libc_stubs functions to get hmac_md5()
Co-author: Gustavo Nihei <gustavo.nihei@espressif.com>
Co-author: Lucas Vaz <lucas.vaz@espressif.com>
2022-11-25 10:26:37 +08:00
田昕
28739b8b8a libc/stream:Add mtd backend stream.
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
2022-11-24 12:07:10 +08:00
zhangyuan21
d8051ba979 nuttx/sched: merge up_block_task and up_unblock_task 2022-11-22 22:59:08 +08:00
zhangyuan21
a8fa51e6bf arch: rename arch special function name 2022-11-22 16:27:56 +08:00
zhangyuan21
5c1b518314 nuttx/sched: move reprioritize process to public function 2022-11-22 15:29:00 +09:00
zhangyuan21
08f7152d9f nuttx/sched: remove nxsched_remove_readytorun from up_block_task
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
add the task from the specified task list to reduce time consuming.
2022-11-22 15:29:00 +09:00
zhangyuan21
e54b602208 nuttx/sched: remove nxsched_remove_blocked from up_unblock_task
It takes about 10 cycles to obtain the task list according to the task
status. In most cases, we know the task status, so we can directly
delete the task from the specified task list to reduce time consuming.
2022-11-22 15:29:00 +09:00
Eero Nurkkala
6596f0e99a risc-v/mpfs: fix compile warning
After commit b7d2b38, the system suffers from -Warray-bounds warning with -Wall:

chip/mpfs_opensbi.c: In function 'mpfs_hart_to_scratch':
chip/mpfs_opensbi.c:251:26: warning: array subscript hartid is outside array bounds of 'sbi_scratch_holder_t[0]' {aka 'struct sbi_scratch_holder_s[]'} [-Warray-bounds]
  251 |   return (unsigned long)(&g_scratches[hartid].scratch);

Fix it by reverting back to what is was earlier. g_scratches shouldn't be in the bss
region that would be zeroed out.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-11-21 14:43:34 +01:00
flyingfish89
f420b4dce7 esp32c3:fix i2c bug of timout
Signed-off-by: flyingfish89 <2914061332@qq.com>
2022-11-21 12:02:21 +01:00
Ville Juven
596ce5e7b1 riscv/addrenv: Implement up_shmat/shmdt for RISC-V
These are great utility functions to create/destroy anonymous mappings
2022-11-17 09:16:54 +08:00
Ville Juven
5c29042ab4 riscv/mmu: Implement mmu_ln_clear
Implement procedure to clear a mapping from MMU
2022-11-17 09:16:54 +08:00
Ville Juven
85470adcc3 riscv/addrenv: Make private function get_pgtable into a public one
The utility function can be used from other places
2022-11-17 09:16:54 +08:00
Ville Juven
093760b48c mpfs_head.S: Mark .start section attributes explicitly
a = allocated, x = executable. Otherwise the input section type will
become empty, which means output section will be empty as well.
2022-11-16 23:32:51 +08:00
Xiang Xiao
e244720aa4 bl602/spi: add reference in bl602_spibus_initialize
and unlock the mutex before return

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-14 09:34:04 +09:00
Xiang Xiao
14c3bc3b8c arch: Replace sem_t with mutex_t for the lock case
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>

temp

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-14 09:34:04 +09:00
anjiahao
a4563b8744 Fix the coding style and typo issue
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-14 09:34:04 +09:00
anjiahao
d07792a343 Initialize global mutext/sem by NXMUTEX_INITIALIZER and SEM_INITIALIZER
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-11-14 09:34:04 +09:00
Eero Nurkkala
b7d2b38700 risc-v/mpfs: opensbi: fix random boot failures
After the commit b8b541f, the system would not start up properly
with certain coldboot conditions. For example, if the OpenSBI picked
hart4 as the coldboot hart in preference to hart3, the system would
get stuck due to stack corruption. OpenSBI uses a lottery mechanism
to pick the coldboot hart.

Also fix g_scratches area in such a manner than it will not get
initialized to zero. If several harts initialize the area to zero, there's
danger the stack pointer gets wiped out.

Now any coldboot hart works.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-11-05 00:37:51 +08:00
Ville Juven
e239cd942e mpfs/mpfs_mm_init: Fix the section align mask checks
The boundary-1 mask needs to be tested, not the alignment boundary
2022-11-04 23:03:10 +08:00
yinshengkai
85f727f232 tools: replace INCDIR to Makefile variable
In the past, header file paths were generated by the incdir command
Now they are generated by concatenating environment variables

In this way, when executing makefile, no shell command will be executed,
it will improve the speed of executing makfile
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2022-11-03 19:59:55 +08:00
Eero Nurkkala
3afc83abc7 risc-v/mpfs: ihc: reorganize ihc
Currently the IHC (Inter Hart Communication) depends on OpenAMP and
rptun.  However, the bootloader portion of the IHC doesn't need
either of them.  Now they are wasting a lot of bootloader space.

Reorganize the bootloader portion into a separate file 'mpfs_ihc_sbi.c'.
This file contains the OpenSBI vendor extensions, or the only required
functionalities for the bootloader.  On the other hand, 'mpfs_ihc.c'
contains the non-bootloader code.

This patch also makes it possible to utilize 2 RPMSG channels.  This
has been tested so that 2 separate NuttXs on harts 1 and 2 communicate
with Linux kernel that runs on harts 3 and 4.

New configuration files are added as well:
  - rpmsg-ch1:  sample config for RPMSG
  - rpmsg-ch2:  sample config for another RPMSG channel
  - rpmsg-sbi:  sample bootloader config for RPMSG/OpenSBI

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-11-02 21:44:52 +08:00
Eero Nurkkala
e50db35dc4 Revert "mpfs/mpfs_ddr.c: Stop the DDR training once it is completed"
This reverts commit ea9144bda8.

The commit made Icicle MPFS DDR useless. Revert the change for now.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-11-02 21:44:52 +08:00
Gustavo Henrique Nihei
f5c77933cb arch: Fix linking of multiple preprocessed linker script files
Only the last item from the ARCHSCRIPT list was being suffixed with
".tmp".

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-11-02 09:15:27 +08:00
Xiang Xiao
b607f80cf3 arch: Remove the unnecessary nosanitize_address from backtrace source code
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-29 08:26:04 +02:00
Jukka Laitinen
b2e239784f arch/risc-v/src/mpfs/hardware/mpfs250t_484_pinmap.h: Lower the default drive strength for MSSIO GPIOS
The default drive strength was way too high for normal GPIO usage, causing overshoots & clitches

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-10-28 22:42:17 +08:00
Jukka Laitinen
67a60d77dd arch/risc-v/src/mpfs: Add a configuration flag for SD-card card detect line
Make existence of the card detect line configurable

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-10-28 22:42:05 +08:00
anjiahao
2156a102cf fix bl602 i2c sem init mistake
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-27 21:21:01 +08:00
Gustavo Henrique Nihei
facdd4f2b9 esp32[-s2/-s3/-c3]: Re-sort SPI Flash configs
- Reduce "SPI Flash configuration" menu dependency on SPI Flash driver
  just to MTD-related configs.
- Move SPI Flash Mode and Frequency configs to SPI Flash configuration
  menu.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-10-27 10:07:40 +08:00
Petro Karashchenko
a74dddd2ff arch/risc-v/src/mpfs/hardware: fix alignment in comment
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2022-10-24 12:59:24 +08:00
anjiahao
e1ca516488 use SEM_INITIALIZER inside of NXSEM_INITIALIZER
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-22 14:50:48 +08:00
anjiahao
5724c6b2e4 sem:remove sem default protocl
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-22 14:50:48 +08:00
Xiang Xiao
774648de0f risc0v/bl602: Call kthread_create instead of nxtask_create in bl_os_task_create
since the kernel component should use the kernel thread instead the normal task

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-19 08:22:56 +09:00
Xiang Xiao
6b31918b42 Remove the unnecessary cast for main_t, NULL and argv
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-18 08:51:45 +02:00
anjiahao
dee38ce3e8 arch: Replace critical section with nxmutex in i2c/spi/1wire initialization
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
anjiahao
d1d46335df Replace nxsem API when used as a lock with nxmutex API
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-10-17 15:59:46 +09:00
Brennan Ashton
4ce8cf7bdc bl602/dma: Fix possible call of null pointer to function 2022-10-11 14:34:52 +08:00
Jukka Laitinen
e793207bb6 arch/risc-v/src/mpfs: Add a config option for enabling L2 cache
Make a separate config flag for enabling L2 cache. This is on by
default when compiling a standalone/bootloader configuration, but
can also be disabled for special cases, such as memory testing

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2022-10-11 00:59:48 +08:00
Brennan Ashton
8b7d2d3da4 bl602: Fix bug in lli functionality for dma. 2022-10-09 12:06:15 +02:00
Masayuki Ishikawa
cb73e9a67d arch: qemu-rv: Refactor the entry point name for BUILD_KERNEL
Summary:
- This commit refactors the entry point name for BUILD_KERNEL
  to avoid misunderstanding the name

Impact:
- None

Testing:
- Tested with rv-virt:ksmp64

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-09 14:08:47 +08:00
Masayuki Ishikawa
4b6c9915fe arch: qemu-rv: Fix timer and IPI handling for BUILD_KERNEL+SMP
Summary:
- I noticed that the OS timer sometimes proceeds fast when
  a task is scheduled to run on CPUO via IPI.
- Actually, qemu-rv implementation shares supervisor software
  interrupt for both timer and IPI on CPU0.
- This commit fixes this issue.

Impact:
- qemu-rv only

Testing:
- Tested with qemu-6.2

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-08 17:19:51 +08:00
Masayuki Ishikawa
4e095d2e90 arch: risc-v: Add SMP support for BUILD_KERNEL
Summary:
- This commit adds SMP support for BUILD_KERNEL

Impact:
- RISC-V: BUILD_KERNEL + SMP only

Testing:
- Tested with rv-virt:ksmp64 (will be added later)

Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>
2022-10-08 09:25:41 +08:00
Ville Juven
0d52b5be56 mpfs_mm_init: Mark the L2 kernel page table as a global mapping
Kernel mappings are global, i.e. they exist in every address environment
2022-10-07 17:26:21 +08:00
Ville Juven
373568f63a mpfs_mm_init.c: Ensure the L3 page table size is large enough
Run-time check for L3 page table size, to ensure it is large enough
to map all of the kernel memory.

NOTE: The check has to be run-time, as KFLASH_SIZE/KSRAM_SIZE are really
linker relocation symbols, and thus cannot be utilized compile-time.
2022-10-07 17:26:21 +08:00
Ville Juven
dbc9a5ffa2 riscv_mmu: Add some basic sanity checks for section boundaries
L3 table maps 2MB of memory, this brings an implicit requirement for
any L3 region to be aligned to 2MB. This commit adds build time sanity
checks to ensure this requirement is met.

For other SvXX architectures the boundary requirement (might be) is
different.
2022-10-07 17:26:21 +08:00