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1208 Commits

Author SHA1 Message Date
Xiang Xiao
8b7c5b039d arch: Move -fsanitize=kernel-address to ARCHOPTIMIZATION 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 15:40:35 +03:00
Xiang Xiao
2976accd9f arch: Remove the extra space before the function prototype 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
1fb8c13e5e Replace nxsem_timedwait_uninterruptible with nxsem_tickwait_uninterruptible 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Xiang Xiao
816ce73ab4 Replace nxsem_timedwait with nxsem_tickwait 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-15 13:55:58 +03:00
Gustavo Henrique Nihei
be9fc59b07 xtensa: Implement syscalls required for Protected Mode 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-14 21:38:12 +08:00
zhuyanlin
ad57791fe0 arch:xtensa: remove struct xtensa_cpstate_s as no need used 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-13 15:28:45 +02:00
zhuyanlin
f423f94d08 arch:xtensa: modify xtensa_context_save/restore function 
with FPU registers in xcp context, use pointer instead of double
pointer

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-13 15:28:45 +02:00
zhuyanlin
1dc39689ff xtensa: move fpu register to XCPTCONTEXT_REGS 
1 move fpu register to XCP_REGS
2 move save & restore fpu register to context_save/restore

Consistency with other archs.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-13 15:28:45 +02:00
Gustavo Henrique Nihei
ba2829adb2 xtensa: Fix argument passing for sys_call5 and sys_call6 functions 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-05-13 10:43:00 +09:00
Xiang Xiao
1ba316b5c7 arch: Remove board/libboard$(LIBEXT) from the rerequest of export_startup 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-12 23:34:31 +03:00
wangbowen6
bc61e71b94 crypto: change type uint32_t to size_t in aes_cypher() arguments. 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-05-12 22:28:54 +08:00
zhuyanlin
b99ba04a8c arch:xtensa: Add SYS_flush_context syscall 
This syscall do nothing as flush context was done in interrupt handler.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-05-11 10:48:53 +02:00
Abdelatif Guettouche
12453bb623 xtensa_sigtramp.S: Remove the ENTRY instruction. 
_xtensa_sig_trampoline is returned to after a context switch and not called
by the usual Window call instructions (call4, call8 and call12),
thus does not need the entry instruction.  Furthermore, the ENTRY instruction
in this case is messing up the backtrace as it creates an extra frame.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-11 08:17:25 +09:00
Abdelatif Guettouche
3f632bf12b xtensa_sigtramp.S: Fix call0 instruction. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-11 08:17:25 +09:00
Abdelatif Guettouche
1cf2fa75c4 arch/xtensa: Fix some typos and comments. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-11 08:17:25 +09:00
Xiang Xiao
8634e8de64 Replace all sem_xxx with nxsem_xxx 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-10 15:08:36 +03:00
Xiang Xiao
e84e5f0e1d arch: Add gcov related config for arm/risc-v/xtensa 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-06 14:43:57 -03:00
Xiang Xiao
45fb96c508 esp32x/wlan: Fix error: increment of a boolean expression 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-05 16:23:32 -03:00
Abdelatif Guettouche
b19b931722 arch/xtensa/src/common/xtensa_coproc.S: Use the first allocated memory 
for the local variable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-05-04 01:39:07 +08:00
Xiang Xiao
1fde7e17bb arch: Move -fstack-protector-all from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 23:54:15 +03:00
Xiang Xiao
aeb9c5d822 boards: Move -fno-strict-aliasing from Make.defs to Toolchain.defs 
and migrate MAXOPTIMIZATION into ARCHOPTIMIZATION

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 11:36:41 +03:00
Xiang Xiao
a021177de8 arch: Fix the style found in review 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-05-01 11:29:44 +03:00
Xiang Xiao
94cb0c6072 arch: Move -nostdinc++ to Tooolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-29 21:08:14 -03:00
Abdelatif Guettouche
da273fce0b arch/xtensa: Replace the xcp context with stack context to improve context switching 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-29 02:51:41 +08:00
Abdelatif Guettouche
98d8d2a1ff arch/xtensa: Group all the macros in one file. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-27 08:57:53 -03:00
Abdelatif Guettouche
541eabb535 xtensa_int_handlers.S: Refactor the calls to ps_setup. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-27 08:57:53 -03:00
Abdelatif Guettouche
aaa5316235 arch/xtensa: Simply use xtensa_createstack for CPU1 idle task. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-26 01:36:54 +08:00
Xiang Xiao
8f8ee25a9c boards: Move -g from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-25 16:23:03 +03:00
Xiang Xiao
75326e563d boards: Move -fno-common from Make.defs to Toolchain.defs 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-25 07:57:29 +03:00
Abdelatif Guettouche
3942f4d133 arch/xtensa: No need to save SP in EXCSAVE_1 when linking the interrupt 
frame with the previous frame.  The SP is already saved in A12.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-23 10:19:23 +08:00
Abdelatif Guettouche
f130d8c143 xtensa_user_handler.S: Fix backtrace. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-23 10:19:23 +08:00
Abdelatif Guettouche
7a3ad4b224 xtensa_user_handler.S: Use the ps_setup macro when dealing with an 
exception.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-23 10:19:23 +08:00
Xiang Xiao
5a565e753c pm: Move pm_initialize call from driver_initialize to xxx_pminitialize 
since it's too late with the below commit:
ommit a594a5d7a8
Author: chao.an <anchao@xiaomi.com>
Date:   Mon Apr 11 19:44:26 2022 +0800

    sched/init: drivers_initialize() should be late than up_initialize()

    up_initialize
    |
     ->up_serialinit
       |
        ->uart_register  /* ("/dev/console", &CONSOLE_DEV); */

    drivers_initialize
    |
     ->syslog_console_init
       |
        ->register_driver /* ("/dev/console", &g_consoleops, 0666, NULL); */

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-22 14:36:27 +03:00
chao.an
1c8e12406e compile/opt: add config DEBUG_LINK_MAP 
Selecting this option will pass "-Map=$(TOPDIR)$(DELIM)nuttx.map" to ld
when linking NuttX ELF. That file can be useful for verifying
and debugging magic section games, and for seeing which
pieces of code get eliminated with DEBUG_OPT_UNUSED_SECTIONS.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-22 01:37:23 +08:00
chao.an
64d7326ed5 compile/opt: add config DEBUG_OPT_UNUSED_SECTIONS 
Enable this option to optimization the unused input sections with the
linker by compiling with " -ffunction-sections -fdata-sections ", and
linking with " --gc-sections ".

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-22 01:37:23 +08:00
Abdelatif Guettouche
56ecd44f63 arch/xtensa: Color the other CPUs task when they are created. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-22 01:12:55 +08:00
Abdelatif Guettouche
64e4c9ca02 arch/xtensa: Move xtensa_save_context to up_saveusercontext for 
consistency with other archs.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-21 01:59:34 +08:00
Abdelatif Guettouche
6db910a1aa arch/xtensa: Use syscall interface for xtensa_save/restore_context. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-21 01:59:34 +08:00
Huang Qi
95ab7b973b arch/sparc,xtensa: Control output by $(Q) as other arch 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-04-20 12:04:17 +02:00
Xiang Xiao
d28892e454 arch/xtensa: Remove unneeded group_addrenv call which handled by xtensa_irq_dispatch 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-18 18:34:12 +03:00
Xiang Xiao
6bc61b5752 arch/xtensa: Remove FAR from chip and board folder 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-17 18:42:38 +03:00
chao.an
c08d9047b2 arch/Toolchain.defs: replace all ${/$} with $(/$) 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-17 00:58:34 +08:00
Petro Karashchenko
09b3fb25ab drivers: remove unimplemented open/close/ioctl interfaces 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-04-15 16:56:25 +08:00
Alan C. Assis
c232be541c Add SPIRAM to ESP32-S2 2022-04-14 22:10:23 +08:00
chao.an
b3d47e246f arch/stack_color: correct the stack top of running task 
This PR to ensure the stack pointer is locate to the stack top

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-14 16:48:19 +08:00
Abdelatif Guettouche
6d12ee19e2 arch: Move the DUMP_ON_EXIT logic after nxtask_exit. 
Otherwise we will try to dump the state of the current task, however the
exit handler has already started doing some cleanup and invalidated its
group.  Accessing the group from dumponexit will crash.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-13 21:59:23 +08:00
Abdelatif Guettouche
d6c952c56f arch: Fix compile error when enabling CONFIG_DUMP_ON_EXIT 
"error: incompatible types when assigning to type 'struct filelist *' from type 'struct filelist'
   filelist = tcb->group->tg_filelist;"

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-13 21:59:23 +08:00
chao.an
ff210e1c2d arch/stack_color: correct the end address of stack color 
The different optimization of compilers will cause ambiguity in
obtaining sp through up_getsp() in arm_stack_color(), if compile
with clang and enable the optimization flag (-Ofast), up_getsp()
call will be earlier than push {r0-r9,lr}, the end address of color
stack will overlap with saved registers.

Compile line:
clang --target=arm-none-eabi -c "-Ofast" -fno-builtin -march=armv8.1-m.main+mve.fp+fp.dp \
-mtune=cortex-m55 -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -D__NuttX__ -common/arm_checkstack.c -o  arm_checkstack.o

Assembler code:
llvm-objdump -aS arm_checkstack.o
------------------------------------
|00000000 <arm_stack_color>:
|;   start = INT32_ALIGN_UP((uintptr_t)stackbase);
|       0: c2 1c         adds  r2, r0, #3
|       2: 22 f0 03 02   bic r2, r2, #3
|;   end   = nbytes ? INT32_ALIGN_DOWN((uintptr_t)stackbase + nbytes) :
|       6: 19 b1         cbz r1, 0x10 <arm_stack_color+0x10> @ imm = #6
|       8: 08 44         add r0, r1
|       a: 20 f0 03 00   bic r0, r0, #3
|       e: 00 e0         b 0x12 <arm_stack_color+0x12> @ imm = #0
|;   __asm__
|      10: 68 46         mov r0, sp                               <--- fetch the sp before push {r7 lr}
|      12: 80 b5         push  {r7, lr}                           <--- sp changed
|;   nwords = (end - start) >> 2;
|      14: 80 1a         subs  r0, r0, r2
|      16: 80 08         lsrs  r0, r0, #2
|; }
|      18: 08 bf         it  eq
|      1a: 80 bd         popeq {r7, pc}
|      1c: 4b f6 ef 63   movw  r3, #48879
|      20: cd f6 ad 63   movt  r3, #57005
|      24: a0 ee 10 3b   vdup.32 q0, r3
|;   while (nwords-- > 0)
|      28: 20 f0 01 e0   dlstp.32  lr, r0
|;       *ptr++ = STACK_COLOR;                                    <--- overwrite
|      2c: a2 ec 04 1f   vstrw.32  q0, [r2], #16
|      30: 1f f0 05 c0   letp  lr, 0x2c <arm_stack_color+0x2c> @ imm = #-8
|; }
|      34: 80 bd         pop {r7, pc}
------------------------------------

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-13 09:37:54 +08:00
Alan C. Assis
1090e1a8ea xtensa/esp32: Add support to TWAI/CANBus controller 2022-04-06 15:09:46 +03:00
zhuyanlin
6a761ff087 arch:tcbinfo: update tcbinfo as xcpcontext update 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-04-05 13:33:00 +02:00
Abdelatif Guettouche
f527abc324 arch/xtensa: Build the xtensa_tcbinfo.c file for S2 and S3. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-04 21:25:47 +08:00
Abdelatif Guettouche
11807abd4e arch/xtensa: Add xtensa_tcbinfo struct that contains helpful offsets. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-04-02 10:39:14 +08:00
chao.an
253562f11f arch/xtensa: add syscall note support in the flat build 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-04-01 21:04:51 +08:00
Gustavo Henrique Nihei
06d0a9f1ad xtensa|risc-v: Make CXX exception and RTTI depend on Kconfig options 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
c7311829e0 xtensa: Build OS-assisted atomic operations on ESP32-S2 
ESP32-S2 lacks support for conditional load/store instructions.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
7926bce26b xtensa: Move XCHAL_SWINT_CALL definition into syscall header 
This is required to avoid the interface header (syscall.h) depending on
the xtensa_swi.h header from the implementation

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
zhuyanlin
d7391bf6bc xtensa: add xtensa arch oneshot ops 
As xtensa timer is common in all xtensa chips,
Use oneshot ops, implement a common xtensa oneshot timer.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-03-28 22:55:00 +08:00
zhuyanlin
c0c0ffdf2f xtensa: add xtensa_spill_window declaration 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-03-28 12:33:07 +02:00
Xiang Xiao
8c8c60f70a arch: Add -fsanitize=kernel-address to ARCHCPUFLAGS if CONFIG_MM_KASAN=y 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-27 23:01:47 +03:00
ligd
e87d262c7f arch/Toolchain.defs: add wildcard for EXTRA_LIBS 
VELAPLATFO-1491

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-27 22:53:58 +03:00
Abdelatif Guettouche
914e9588bb esp32/Make.defs: Organise common arch files and chip files 
appropriately.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-25 11:31:24 +08:00
Gustavo Henrique Nihei
c92c4af304 xtensa/esp32s2: Initialize instruction cache on startup 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 20:05:40 -03:00
Gustavo Henrique Nihei
bc071ec243 xtensa/esp32s2: Use functions defined in xtensa_counter for TimerISR 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 19:38:28 -03:00
Gustavo Henrique Nihei
04b80cc8d2 xtensa/esp32s2: Remove unused and not unsupported configs from Kconfig 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 19:38:28 -03:00
Huang Qi
9cffc105c8 arch: Show assigned cpu in dump task 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-23 22:18:15 +08:00
Gustavo Henrique Nihei
024364ebbd xtensa/esp32s3: Add support for GPIO pin interrupts 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 07:23:51 +09:00
Gustavo Henrique Nihei
0e67dc8637 xtensa/esp32s3: Add support for GPIO read/write operations 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-23 07:23:51 +09:00
Petro Karashchenko
68902d8732 pid_t: unify usage of special task IDs 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-22 21:22:32 +08:00
Abdelatif Guettouche
10f8f6c9e3 xtensa/esp32(s2)_user.c: For EXCCAUSE values, use macros defined in xtensa_corebits.h 
instead of those defined in core.h as they are deprecated.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-22 10:20:27 +08:00
Petro Karashchenko
3fff4508c7 netinitialize: call xxx_netinitialize unconditionally 
The xxx_netinitialize is defined to a function only if
CONFIG_NET=y and CONFIG_NETDEV_LATEINIT=n.  Otherwise it
is defined to an empty macro.

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-19 17:41:33 +08:00
Abdelatif Guettouche
aa84559566 xtensa_coproc.S: Replace spaces by tabs. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-19 01:09:22 +02:00
Abdelatif Guettouche
ce8fae2842 xtensa_coproc.S: Adjust the save reserved for local variables when 
restoring/saving coprocessor state.

These function don't use call8 or call12 and thus need to create just 16
bytes for the base save area, however they do use one variable so we
need a space for that.  The `entry` instruction works in unit of 8 bytes
so we add whole 8 bytes for one variable.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-19 01:09:22 +02:00
Gustavo Henrique Nihei
9ae826e925 xtensa/esp32s3: Fix output handling for pins numbered from 32 to 48 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Gustavo Henrique Nihei
f21a9f9578 xtensa/esp32s3: Enable UART pins to use IOMUX and bypass GPIO matrix 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Gustavo Henrique Nihei
77944ceb42 xtensa/esp32s3: Clean up and improve GPIO driver interface 
Also fix an inconsistenct regarding the ESP32S3_NGPIOS macro. Although
correctly defining the number of available GPIOs in ESP32-S3, it was
erroneously being used for verifying the pin range.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Gustavo Henrique Nihei
43b7d9b0da xtensa/esp32s3: Sync GPIO sigmap with IDF version 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-19 01:08:27 +02:00
Abdelatif Guettouche
2793e6f82d xtensa_releasepending.c: Remove commented out code. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-19 02:20:36 +08:00
Abdelatif Guettouche
5085f854d0 esp32(s3)_start.c: In SMP mode, don't disable APP CPU at startup. It starts in a 
disabled state and if OpenOCD is used this will clear OpenOCD configuration.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-17 14:33:32 -03:00
Abdelatif Guettouche
b98676f8be esp32(s3)_cpustart.c: Don't reset app CPU if it was already configured by 
OpenOCD.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-17 14:33:32 -03:00
Gustavo Henrique Nihei
39e9a17e60 xtensa/esp32s3: Apply style fixes throughout serial driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-16 19:06:39 -03:00
Gustavo Henrique Nihei
0dc2930403 xtensa/esp32s3: Remove code for not yet supported USB-Serial Driver 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-16 19:06:39 -03:00
Gustavo Henrique Nihei
57273ad994 xtensa/esp32s3: Fix IRQ setup hardcoded to CPU 0 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-16 19:06:39 -03:00
Petro Karashchenko
b04447d066 timer_lowerhalf: minor improvements 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-15 10:30:48 +08:00
Xiang Xiao
b6bc460b2c arch: Make the comment and definition of CONFIG_SYS_RESERVED correctly 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-14 22:51:00 +02:00
Abdelatif Guettouche
d21d02c65d xtensa_panic.S: Save exception cause and vaddr into the user frame. 
This area is what's passed later to assert and be used to dump the
state.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 19:54:30 +08:00
Abdelatif Guettouche
a9e3b5ae37 xtensa_panic.S: A2 is already saved by the caller, no need to save it 
here again.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 19:54:30 +08:00
Abdelatif Guettouche
cff3d9df7b arch/xtensa: Fix some indentations. 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
6fa4a42e34 xtensa/: Save A3 as part of the regular context saving. 
It was separate because the syscal handler was using it before calling
_xtensa_context_save.  The order of operations has now changed and we
can save A3 with the rest of the context.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
4d1bb20f8c xtensa_user_handler.S: In syscall handler store context before 
continuing the rest of the syscall handling.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
5305f76b1d xtensa_context.S: Use Zephyr's version of spilling the window register 
file.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
2445de173d xtensa_dumpstate.c: Don't dump temporary registers. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
4786963ee2 xtensa_context.S: No need to save A2 before calling 
_xtensa_save_context.  It uses CALL0, in this case A1 is callee saved
and we can it directly.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
2dcbf28f15 xtensa_context.S: A1 should be restored by the caller not 
xtensa_context_resotred. Here it was being restored twice.
Remove the one in xtensa_context_restore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
5bd2e97a27 xtensa_context.S: Fix the type of _xtensa_context_restore. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Abdelatif Guettouche
e9018b29bf xtensa_context.S: Remove the CALL0 ABI version of xtensa_context_switch 
as it's the same as the Window ABI now.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-14 11:12:35 +08:00
Xiang Xiao
c96c96a399 drivers: Merge the common driver initialization into one place 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-13 11:24:48 -03:00
Gustavo Henrique Nihei
7ede285cfe xtensa/esp32s3: Add support for RT-Timer based on Systimer peripheral 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 15:27:30 +02:00
Gustavo Henrique Nihei
86b18bd6e9 xtensa/esp32s3: Move code documentation to the correct place 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 11:53:14 +08:00
Gustavo Henrique Nihei
a4db4031c9 xtensa/esp32s3: Stall Systimer when core 1 is temporarily stalled 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-12 11:53:14 +08:00
Xiang Xiao
39fb09738d arch: Move [arm|xtensa]_intstack_[alloc|top] to common header file 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-11 23:08:07 +02:00
Xiang Xiao
17d1a48fc9 arch: Remove up_puts prototype from up_inernal.h 
since it's defined in include/nuttx/arch.h now

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-11 23:08:07 +02:00
Gustavo Henrique Nihei
c8796c1bc2 xtensa/esp32s3: Move SPI RAM configuration out of Peripheral menu 
Menu for configuration of SPI RAM was wrongly placed inside the menu
for peripheral selection.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-11 11:05:24 +08:00
Abdelatif Guettouche
f0a5777a26 xtensa_swint.c: Restore the coprocessor state at the end for consistency. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
7c57739d1d xtensa_exit.c: Co-processor state is restored as part of the 
SYS_Restore_context call, no need to call it separately.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
71ba4a6b76 arch/xtensa: Use the software interrupt when saving context too. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-11 02:23:09 +02:00
Abdelatif Guettouche
329db99e51 arch/xtensa: Use rsync around manipulating interrupt registers and 
replace `isync` by `rsync` in other places.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-11 02:23:09 +02:00
Alan C. Assis
dc1b6776b9 xtensa/esp32s3: Add SPI RAM/PSRAM Support 2022-03-09 19:22:56 +02:00
Gustavo Henrique Nihei
4a29fa903b xtensa/esp32s3: Enable SMP support 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-09 10:42:50 +08:00
Gustavo Henrique Nihei
140dc248db xtensa/esp32s2: Add support for Main System Watchdog Timers 
Support for RTC Watchdog Timer is currently in place, but not yet
functional due to not yet implemented RTC driver.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-08 22:24:07 -03:00
Gustavo Henrique Nihei
bd7ee0d675 xtensa/esp32s2: Sync IRQ management API with ESP32 and ESP32-S3 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-08 11:36:32 -03:00
zhuyanlin
634d337394 riscv/xtensa: corrent dumpstate xcp size 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-03-08 10:14:04 +02:00
zhuyanlin
981282696f xtensa:backtrace: fix backtrace last buffer error in some scene 
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-03-07 10:21:37 +01:00
Abdelatif Guettouche
fa0e5da18e xtensa/xtensa_user_handler.S: Store EXCCAUSE and EXCVADDR into the user 
frame. The user frame is passed them to xtensa_user that actually uses
EXCVADDR.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-04 11:19:06 +02:00
Abdelatif Guettouche
c820085a23 arch/xtensa/esp32s3: Add encrypted support for SPI FLASH. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-03 19:57:59 +08:00
Abdelatif Guettouche
9d5b13cd0e xtensa/esp32s3: Add SPI-Flash support. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-03-03 19:57:59 +08:00
Gustavo Henrique Nihei
16030f713e xtensa/esp32s3: Add support for Free-running Timer 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-03 10:58:53 +08:00
Gustavo Henrique Nihei
3b7a6ae311 xtensa/esp32s3: Add support for Tickless kernel using Systimer 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-02 18:08:44 +01:00
Xiang Xiao
4a16cf71f9 Fix -Werror=nonnull-compare and -Werror=format-truncation= 
Error: module/mod_insmod.c:203:3: error: 'strncpy' specified bound 16 equals destination size [-Werror=stringop-truncation]
  203 |   strncpy(modp->modname, modname, MODLIB_NAMEMAX);
      |   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

wqueue/kwork_thread.c: In function 'work_start_lowpri':
Error: wqueue/kwork_thread.c:212:22: error: '%lx' directive output may be truncated writing between 1 and 16 bytes into a region of size 14 [-Werror=format-truncation=]
  212 |   snprintf(args, 16, "0x%" PRIxPTR, (uintptr_t)wqueue);

local/local_sockif.c: In function 'local_getsockname':
Error: local/local_sockif.c:392:11: error: 'strncpy' specified bound depends on the length of the source argument [-Werror=stringop-overflow=]
  392 |           strncpy(unaddr->sun_path, conn->lc_path, namelen);
      |           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

chip/esp32_wifi_utils.c: In function 'esp_wifi_scan_event_parse':
Error: chip/esp32_wifi_utils.c:373:37: error: argument to 'sizeof' in 'memset' call is the same expression as the destination; did you mean to dereference it? [-Werror=sizeof-pointer-memaccess]
   memset(ap_list_buffer, 0x0, sizeof(ap_list_buffer));
                                     ^

stdio/lib_fputs.c: In function 'fputs':
Error: stdio/lib_fputs.c:99:9: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
   if (s == NULL || stream == NULL)
         ^
Error: stdio/lib_fputs.c:99:27: error: nonnull argument 'stream' compared to NULL [-Werror=nonnull-compare]
   if (s == NULL || stream == NULL)
                           ^

stdio/lib_vfprintf.c: In function 'vfprintf':
Error: stdio/lib_vfprintf.c:40:6: error: nonnull argument 'stream' compared to NULL [-Werror=nonnull-compare]
   if (stream)
      ^

string/lib_strdup.c: In function 'strdup':
Error: string/lib_strdup.c:39:6: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
   if (s)
      ^

string/lib_strndup.c: In function 'strndup':
Error: string/lib_strndup.c:56:6: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
   if (s)
      ^

string/lib_strpbrk.c: In function 'strpbrk':
Error: string/lib_strpbrk.c:39:7: error: nonnull argument 'str' compared to NULL [-Werror=nonnull-compare]
   if (!str || !charset)
       ^~~~
Error: string/lib_strpbrk.c:39:15: error: nonnull argument 'charset' compared to NULL [-Werror=nonnull-compare]
   if (!str || !charset)
               ^~~~~~~~

string/lib_strrchr.c: In function 'strrchr':
Error: string/lib_strrchr.c:40:6: error: nonnull argument 's' compared to NULL [-Werror=nonnull-compare]
   if (s)
      ^

Error: time/lib_asctimer.c:73:50: error: '%d' directive output may be truncated writing between 1 and 11 bytes into a region of size between 0 and 12 [-Werror=format-truncation=]
   snprintf(buf, 26, "%.3s %.3s%3d %.2d:%.2d:%.2d %d\n",
                                                  ^~
time/lib_asctimer.c:73:21: note: directive argument in the range [-2147481748, 2147483647]
   snprintf(buf, 26, "%.3s %.3s%3d %.2d:%.2d:%.2d %d\n",
                     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
time/lib_asctimer.c:73:3: note: 'snprintf' output between 17 and 68 bytes into a destination of size 26
   snprintf(buf, 26, "%.3s %.3s%3d %.2d:%.2d:%.2d %d\n",
   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            g_wday_name[tp->tm_wday], g_mon_name[tp->tm_mon],
            ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            tp->tm_mday, tp->tm_hour, tp->tm_min, tp->tm_sec,
            ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            1900 + tp->tm_year);
            ~~~~~~~~~~~~~~~~~~~

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-03-02 15:55:38 +08:00
zhuyanlin
a4e93be0fb arch:xtensa: fix sp duplicate reduce in handler enter 
In xtensa/include/irq.h the XCPTCONTEXT_SIZE is
`#define XCPTCONTEXT_SIZE    ((4 * XCPTCONTEXT_REGS) + 0x20)`

XCPTCONTEXT_SIZE is already byte size of xcpcontext

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-03-01 13:46:31 +01:00
Xiang Xiao
3bf416e8b8 arch: Move STACK_ALIGNMENT definition to up_internal.h 
to avoid the same macro duplicate to many place

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-28 15:05:41 +08:00
Xiang Xiao
44bd3212d4 arch: Remove SYS_RESERVED from Kconfg 
let's arch define the correct value instead

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-27 22:54:13 +08:00
Xiang Xiao
087b9e5ff3 arch: Move the content from svcall.h to syscall.h 
and remove svcall.h

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-27 22:54:13 +08:00
Xiang Xiao
8b77801b1c arch/xtensa: Remove the unused SYS_pthread_exit 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-27 22:54:13 +08:00
Gustavo Henrique Nihei
6a12befcd5 xtensa/esp32s2: Fix Scheduler CPU Load feature using Oneshot Timer 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-02-26 03:23:13 +08:00
Gustavo Henrique Nihei
d2ada5f030 xtensa/esp32: Fix Scheduler CPU Load feature using Oneshot Timer 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-02-26 03:23:13 +08:00
zhuyanlin
fbc1da98b7 xtensa: use swint to swith context 
Reason for use sw-interrupt as syscall interrupt:
The xtensa `syscall` instruction can cause SYSCALL interrupt.
But SYSCALL interrupt is same interrupt level with level-one
interrupt.
Nuttx swint can enter `enter_critical_section` and gerenate
interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-25 20:43:03 +08:00
zhuyanlin
f5d180bbdf xtensa: spit up_irq_disable and up_irq_save INTLEVEL MARCO 
For up_irq_disable, use XCHAL_EXCM_LEVEL
For up_irq_save,  use XCHAL_IRQ_LEVEL.
Then we can use svcall in enter_crritical_section.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-25 20:43:03 +08:00
Gustavo Henrique Nihei
ea1b49119a xtensa/esp32s3: Apply minor fixes to documentation and code style 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-02-25 10:51:25 +08:00
Gustavo Henrique Nihei
add99fead3 xtensa/esp32s3: Add support for Oneshot timer 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-02-25 10:51:25 +08:00
Abdelatif Guettouche
dc130b4830 arch/xtensa/esp32s2_irq.c: Correctly enable the software interrupt. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-02-25 08:55:41 +09:00
Gustavo Henrique Nihei
b49ee3d4ed xtensa/esp32s3: Add support for Main System Watchdog Timers 
Support for RTC Watchdog Timer is currently in place, but not yet
functional due to not yet implemented RTC driver.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-02-25 02:13:00 +08:00
Gustavo Henrique Nihei
3400b42a33 xtensa/esp32: Fix a minor typo in documentation 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-02-24 17:43:39 +01:00
Gustavo Henrique Nihei
a5024a707d xtensa/esp32s3: Use the running CPU ID for enabling internal interrupts 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-02-24 17:43:39 +01:00
Gustavo Henrique Nihei
83f3ba6d22 xtensa/esp32s3: Add support for Timer Groups 0 and 1 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-02-25 00:13:34 +08:00
zhuyanlin
7d350204f0 xtensa: fix XTHAL_REL_LE not find 
fix `XTHAL_REL_LE` not find build break

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-24 22:13:46 +08:00
Xiang Xiao
6fa5885d2d arch/esp32: Update esp-wireless-drivers-3rdparty to verion 45701c0 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-24 09:05:40 +01:00
zhuyanlin
fc9791c269 xtensa:esp32s3: setup software interrupt as swi interrupt. 
Enable and setup software interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-24 00:06:43 +01:00
zhuyanlin
bf40d70df9 xtensa:esp32s2: setup software interrupt as swi interrupt 
Enable and setup software interrupt for esp32s2

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-24 00:06:43 +01:00
zhuyanlin
7b32ce190e xtensa:esp32: setup software interrupt. (bit 29) 
Enable and setup software interrupt.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-24 00:06:43 +01:00
Xiang Xiao
43f57240e0 Replece clock_gettime(CLOCK_MONOTONIC) with clock_systime_timespec 
it's better to call the kernrel api insteaad user space api in kernel

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-24 01:06:36 +08:00
Xiang Xiao
f1ed349dd9 sched/clock: Remove CLOCK_MONOTONIC option from Kconfig 
here is the reason:
1.clock_systime_timespec(core function) always exist regardless the setting
2.CLOCK_MONOTONIC is a foundamental clock type required by many places

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-23 01:21:26 +08:00
zhuyanlin
7b00c8bdb8 arch:xtensa: modify svcall to swint 
Reason: xtensa svcall only have level-1 interrupt level.
Sush do not generate interrupt when up_irq_save.
Software int can generate interrupt when up_irq_save.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-22 14:06:24 -03:00
Xiang Xiao
163fe4ff0b boards: Replace CONFIG_CYGWIN_WINTOOL with CONVERT_PATH 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-20 21:15:36 +01:00
Xiang Xiao
1d1bdd85a3 Remove the double blank line from source files 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-20 20:10:14 +01:00
Abdelatif Guettouche
ab18b7b3d3 esp32xx_irq.c: Fix CPU interrupt documentation to remove the MAC 
interrupt from the internal interrupt table.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-02-18 13:40:21 +08:00
Abdelatif Guettouche
ee88235d81 esp32_irq.c: Don't reserve BT and Wifi CPU interrupts for APP CPU as 
they are attached to the PRO CPU.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-02-18 13:40:21 +08:00
Abdelatif Guettouche
17e43b0b4a esp32_irq.c: For internal interrupts use the current CPU to enable them. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-02-18 13:40:21 +08:00
Abdelatif Guettouche
3d2771c49a esp32_irq.c: Move interrupt initialisation for special drivers to 
`up_irqinitialize`.  `esp32_cpuint_initialize` is not a good place as
it's also called from CPU1.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-02-18 13:40:21 +08:00
Alan Rosenthal
8defb843aa Remove duplicate linker script definitions 
## Summary
A lot of linker scripts were listed twice, once for unix, once for windows.

This PR cleans up the logic so they're only listed once.

 ## Impact
Any opportunity to use a single source of truth and reduce lines of code is a win!

 ## Testing
CI will test all build
 2022-02-17 02:55:25 +08:00
Petro Karashchenko
41c95da594 register_driver: fix driver modes accross the code 
State of problem:
 - Some drivers that do not support write operations (does not
   have write handler or ioctl do not perform any write actions)
   are registered with write permissions
 - Some drivers that do not support read operation (does not
   have read handler or ioctl do not perform any read actions)
   are registered with read permissions
 - Some drivers are registered with execute permissions

Solution:
 - Iterate code where register_driver() is used and change 'mode'
   parameter to reflect the actual read/write operations executed
   by a driver
 - Remove execute permissions from 'mode' parameter

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-02-16 16:15:29 +08:00
zhuyanlin
c833048484 xtensa:kconfig: move ARCH_HAVE_TESTSET config to chip 
Some xtensa arch have not implentment testset instructions

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-02-10 14:22:58 +08:00
Abdelatif Guettouche
f826e053ae arch/xtensa/esp32: Remove the QEMU special case when initializing the 
heap.

QEMU had a different ROM image that used the regions of PRO CPU for both
CPUs.  This was causing crashes when running SMP mode as the heap was
being corrupted when the APP CPU starts.

QEMU is now loading the same image as the hardware chip and thus this
special case doesn't exist anymore.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-02-03 16:18:09 -03:00
chao.an
3ab557e748 arch/xtensa: correct the netlock handling 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-02-03 11:09:18 -03:00
Xiang Xiao
4c167b0729 Correct the code alignment 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-02-01 21:22:21 -03:00
Xiang Xiao
2c3020ddaf arch/Toolchain.defs: Replace --print-file-name=libgcc.a with --print-libgcc-file-name 
to more compatable with clang: https://reviews.llvm.org/D25338

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-31 09:46:04 +01:00
Xiang Xiao
e0b62bf677 arch/Toolchain.defs: Don't expand EXTRA_LIBS immediately 
since board's Make.defs may overwrite ARCHCPUFLAGS

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-30 11:04:35 +09:00
Xiang Xiao
1c2c0e4707 arch/Toolchain.defs: Simplify the builtin library addition for EXTRA_LIBS 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-28 12:02:38 +01:00
Gustavo Henrique Nihei
b0d24f53c4 xtensa: Add initial support for ESP32-S3 
Co-authored-by: Alan Carvalho de Assis <alan.carvalho@espressif.com>
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-27 13:46:50 -03:00
zhuyanlin
1b08f607be arm/xtensa:cache: flush/clean dcache all if size large than cache size 
For performance, if size large than cache size, use xxx_all instead

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-27 15:15:28 +08:00
Petro Karashchenko
6c27f3c19d toolchain: add libm to EXTRA_LIBS only if it is provided by the compiler 
Some toolchains may be built without libm support, but using
such toochain should not generate any errors in case if math
functions are not used in the program

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-22 15:36:29 +08:00
Xiang Xiao
2935751bfd Fix error: implicit declaration of function 'up_cpu_index' 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-20 23:21:21 +08:00
Xiang Xiao
aa2cdcd848 xtensa/esp32: Change "cpu <= CONFIG_SMP_NCPUS" to "cpu < CONFIG_SMP_NCPUS" 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-20 23:21:21 +08:00
Xiang Xiao
77792a1598 sched: Define CONFIG_SMP_NCPUS to 1 in no SMP case 
to simplify the SMP related code logic

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-01-20 23:21:21 +08:00
Petro Karashchenko
08043fb5bc net: unify FAR keyword usage for all net buffer memory mapped buffers 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-20 01:42:56 +08:00
zhuyanlin
793ec6c909 arch:xtensa:vectors:fix bugs in a0 save 
Use right EXCSAVE_X

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-19 16:28:03 +01:00
zhuyanlin
a1a9ce3d1e arch:xtensa_panic: use right interrupt pointer in xtensa_panic 
When enable interrupt stack, use a12 instead of sp

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-19 16:28:03 +01:00
zhuyanlin
88f5a209ce xtensa: move a3 save in handler instead of _xtensa_context_save 
As in _xtensa_syscall_handler, a3 was save and reused before
_xtensa_context_save, a3 save in _xtensa_context_save will generate
error.

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-19 16:28:03 +01:00
zhuyanlin
561fa88ed1 xtensa: add svcall handler 
svcall.c for xtensa

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-19 16:28:03 +01:00
zhuyanlin
662f071d9a xtensa: fix svccall enter error 
1. error in A3 push stack
2. when interrupt stack enable, push a12 is xtensa_irq_dispatch
parameter 1, instead of sp. As sp is interrupt stack address set by
`setintstack`, not the interruptee stack address

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
 2022-01-19 16:28:03 +01:00
Petro Karashchenko
9551de7115 net: use HTONS, NTOHS, HTONL, NTOHL macro in kernel code 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-18 10:59:47 +01:00
Gustavo Henrique Nihei
04723a89f2 xtensa: Fix core voltage level when SPI Flash runs at 80Mhz 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-18 02:21:46 +08:00
Petro Karashchenko
8d3bf05fd2 include: fix double include pre-processor guards 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-16 11:11:14 -03:00
chao.an
c27839f98e arm/xtensa: save the running registers to xcp context 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-01-15 02:20:01 +08:00
Gustavo Henrique Nihei
c372e1e295 xtensa: Fix typo in xchal_cpX_store macros' invocation 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-13 21:07:04 +01:00
Alan C. Assis
7b32849b84 esp32s2: Fix data cache option in menuconfig 2022-01-12 21:45:04 +01:00
Gustavo Henrique Nihei
80436dd7be xtensa/esp32s2: Fix some wrong definitions related to IRQ management 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-12 21:28:40 +01:00
Gustavo Henrique Nihei
efca63e9e3 xtensa/esp32s2: Fix missing parenthesis on macro expression 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-11 23:21:13 +08:00
ligd
3cfc6761ff xtensa: fix lack of float register save & resotre 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-01-11 12:17:09 +01:00
Alan C. Assis
2079cc0f6e esp32: Add support to RS485 2022-01-10 10:49:16 +08:00
Alan C. Assis
4ca38c6c50 esp32: Add PWM support using the LEDC peripheral 
Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-08 14:46:51 +01:00
Gustavo Henrique Nihei
73ea0c1627 xtensa: Improve Kconfig description of ESP32-S2 arch family 
Also fix the wrong "dual-core" statement, since all ESP32-S2 chips are
composed of a single Xtensa LX7 core.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-07 22:25:05 +01:00
Zeng Zhaoxiu
fb43fd73ed signal: signal handler may cause task's state error 
For example, task is blocked by nxsem_wait(sem1), use nxsem_wait(sem2)
in signal handler, and take sem2 successfully, after exit from signal
handler to task, nxsem_wait(sem1) returns OK, but the correct result
should be -EINTR.

Signed-off-by: Zeng Zhaoxiu <zhaoxiu.zeng@gmail.com>
 2022-01-05 21:36:44 +09:00
Abdelatif Guettouche
4edc5fb701 xtensa: Rename up_stack_color to xtensa_stack_color since it's an 
internal function.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2022-01-04 02:45:45 +08:00
Gustavo Henrique Nihei
78362b0949 xtensa/esp32: Use ROM implementations of libc functions 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-03 10:37:04 -03:00
Petro Karashchenko
d23ad9b9b0 userspace: fix typos in comments 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-01-02 20:50:30 +01:00
Gustavo Henrique Nihei
c1fac720ec xtensa/esp32: Add missing param documentation for SPI Flash function 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-01-01 20:37:44 +08:00
Gustavo Henrique Nihei
9e5e60ba48 esp32s2/esp32c3: Build MCUboot bootloader with Flash Encryption support 2022-01-01 20:37:44 +08:00
Gustavo Henrique Nihei
f130d8b91e xtensa/esp32s2: Remove unavailable support for ROM Basic Console 
This feature is only available for ESP32 chips.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-31 00:56:08 +08:00
chao.an
736add0fe8 arch/backtrace: correct the skip counter 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-30 16:57:40 +08:00
Gustavo Henrique Nihei
80da9abd6a xtensa/esp32: Move assertions after logging to improve debugging 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-30 12:35:41 +08:00
Gustavo Henrique Nihei
b6addaa4c7 xtensa/esp32: Enable the creation of encrypted Flash partitions 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-30 12:35:41 +08:00
Gustavo Henrique Nihei
340e0c8a8f xtensa/esp32: Build MCUboot bootloader with Flash Encryption support 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-30 12:35:41 +08:00
ChenWen
6ce335fa84 xtensa/esp32: Fix some Wi-Fi issues 
1. Fix the issue that Wi-Fi can't connect to some special routers occasionally.
    2. Update Wi-Fi driver code to fix issue of failure to send pkt.
    3. Replace software random with hardware random
 2021-12-28 23:48:25 -06:00
chao.an
7ed0b97414 make/allsyms: skip the unnecessary link operation 
For incremental compilation, skip the stage 1 dummy link
operation if nuttx elf has been generated

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-28 23:47:10 -06:00
Xiang Xiao
dd942f0b04 sched/backtrace: Dump the complete stack regardless the depth 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-12-29 12:09:54 +08:00
chao.an
a42aa8415d compile/flags: add FRAME_POINTER into Toolchain.defs 
Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-27 22:31:27 -06:00
Petro Karashchenko
3ccb657dc2 nuttx: remove space befone newline in logs 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2021-12-27 21:01:19 -06:00
Alan C. Assis
01e4e249cc Add WiFi/BLE Coexistence support 
Co-authored-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-12-23 20:42:23 -06:00
chao.an
fe2830ec94 xtensa: enhance the task dump 
add irq stack information
add cpu loading

Signed-off-by: chao.an <anchao@xiaomi.com>
 2021-12-22 11:46:02 -03:00
Gustavo Henrique Nihei
f542ab4564 xtensa/esp32s2: Add Secure Boot support on top of MCUboot 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2021-12-21 07:02:40 -06:00