Commit Graph

24 Commits

Author SHA1 Message Date
raiden00pl
b565e28da3 Kconfigs: rename {Rpmsg|rpmsg} to RPMGS 2023-10-28 13:58:56 +08:00
hujun5
061be5f18e refine: move BIT Macro to nuttx/bits.h
The BIT macro is widely used in NuttX,
and to achieve a unified strategy,
we have placed the implementation of the BIT macro
in bits.h to simplify code implementation.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-10-12 14:52:56 +08:00
dulibo1
b57e43b4d0 clk:fix some issues when use rpmsg clk
1.check the rpmsg name when clk_register.
2.clk_get rpmsg clk print error:
clk/clk.c:1231:3: runtime error: null pointer passed as argument 2, which is declared to never be null
3.fix some function miss keyword FAR.
4.clk_disable_unused may disable rpmsg clk which disable the clk that maybe used by others

Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2023-09-22 08:47:23 +08:00
zhengshaobo1
6e6ba062fd clock flags add CLK_OPS_PARENT_ENABLE, parents need enable during gate/ungate, set rate and re-parent
Signed-off-by: zhengshaobo1 <zhengshaobo1@xiaomi.com>
2023-09-19 10:34:48 +08:00
zhengshaobo1
be767dde01 vela fs procfs add clock procfs entry
procfs enrty add clock feature procfs operations

Signed-off-by: zhengshaobo1 <zhengshaobo1@xiaomi.com>
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-09-19 10:34:48 +08:00
zhengshaobo1
09a81017b8 To solve the problem of unordered setting of div & mux, after solving the problem, the frequency will be set to mux first, and then div
Signed-off-by: zhengshaobo1 <zhengshaobo1@xiaomi.com>
2023-09-10 13:36:16 +03:00
zhengshaobo1
f6ba2970e0 Solve the risk of dividing by 0 when setting frequency points
Signed-off-by: zhengshaobo1 <zhengshaobo1@xiaomi.com>
2023-09-10 13:36:16 +03:00
Xiang Xiao
a9efeeeebc drivers/clk: Change CLK_SET_RATE_NO_REPARENT to CLK_MUX_SET_RATE_NO_REPARENT
since only mux clk use this flag

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-09-05 18:05:50 +03:00
dongjiuzhu1
afec562fbb drivers/clk: support using clk function at interrupt and idle
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2023-07-28 07:12:51 -07:00
liaoao
a44f498842 rpmsgclk: allow client to disable clk of server
Signed-off-by: liaoao <liaoao@xiaomi.com>
2023-07-28 06:57:29 -07:00
chao an
6ee9ec7656 build: add initial cmake build system
1. Update all CMakeLists.txt to adapt to new layout
2. Fix cmake build break
3. Update all new file license
4. Fully compatible with current compilation environment(use configure.sh or cmake as you choose)

------------------

How to test

From within nuttx/. Configure:

cmake -B build -DBOARD_CONFIG=sim/nsh -GNinja
cmake -B build -DBOARD_CONFIG=sim:nsh -GNinja
cmake -B build -DBOARD_CONFIG=sabre-6quad/smp -GNinja
cmake -B build -DBOARD_CONFIG=lm3s6965-ek/qemu-flat -GNinja

(or full path in custom board) :
cmake -B build -DBOARD_CONFIG=$PWD/boards/sim/sim/sim/configs/nsh -GNinja

This uses ninja generator (install with sudo apt install ninja-build). To build:

$ cmake --build build

menuconfig:

$ cmake --build build -t menuconfig

--------------------------

2. cmake/build: reformat the cmake style by cmake-format

https://github.com/cheshirekow/cmake_format

$ pip install cmakelang

$ for i in `find -name CMakeLists.txt`;do cmake-format $i -o $i;done
$ for i in `find -name *\.cmake`;do cmake-format $i -o $i;done

Co-authored-by: Matias N <matias@protobits.dev>
Signed-off-by: chao an <anchao@xiaomi.com>
2023-07-08 13:50:48 +08:00
lilei19
38f64f559d change strcpy to strlcpy
Signed-off-by: lilei19 <lilei19@xiaomi.com>
2023-02-24 12:15:40 +08:00
chao an
3a0fdb019d nuttx: replace all ARRAY_SIZE()/ARRAYSIZE() to nitems()
Signed-off-by: chao an <anchao@xiaomi.com>
2023-02-09 20:05:44 +08:00
Gustavo Henrique Nihei
e6b204f438 nuttx: Use MIN/MAX definitions from "sys/param.h"
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-02-01 23:47:44 +08:00
chao an
07604b3220 drivers/rpmsg/clk/ioe: destroy nxsem properly
Signed-off-by: chao an <anchao@xiaomi.com>
2022-11-21 01:15:48 +08:00
yinshengkai
85f727f232 tools: replace INCDIR to Makefile variable
In the past, header file paths were generated by the incdir command
Now they are generated by concatenating environment variables

In this way, when executing makefile, no shell command will be executed,
it will improve the speed of executing makfile
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2022-11-03 19:59:55 +08:00
yinshengkai
f018a9cb54 Makefile: Remove INCDIROPT
This option, which resolves to -w when CONFIG_CYGWIN_WINTOOL is
configured, is now appended to INCDIR in tools/Config.mk.

See git commit # 5eae32577e in the main
2022-10-25 12:05:38 +02:00
anjiahao
5724c6b2e4 sem:remove sem default protocl
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-10-22 14:50:48 +08:00
ligd
8a3683fb9f rptun: add ns_match callback to resolve rptun deadlock
thread A: accept -> net_lock -> socket_rpmsg_accept
          -> rpmsg_register_callabck -> rptun_lock
thread B: ns_bind -> rpmsg_socket_ns_bind -> get_tx_payload_buffer
          -> rptun_wait_tx -> usrsock_rpmsg_ept_cb -> usrsockdev_write
          -> net_lock -> deadlock

fix:
add ns_match callback

Signed-off-by: ligd <liguiding1@xiaomi.com>
2022-07-27 20:36:51 +08:00
anjiahao
b88a8cf39f use rmutex inside of all repeated implementation
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2022-05-30 19:43:48 +08:00
Xiang Xiao
9785d6606c openamp: Change the dependence from OPENAMP to RPTUN
since all rpmsg driver need the extension api exposed by rptun driver

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2022-04-05 10:05:41 +03:00
zhuyanlin
1f87ded9c2 driver:clk: clk pending on semaphore waiting on IPC ready
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-12-27 23:25:28 -06:00
ligd
5b369c5cec libs/lbc: remove CHAR_BIT = 16 support
For CEVA platform CHAR_BIT is 16, and will do lots of extra work
when use IPC.
We will not support this platform anymore, so remove all the b2c operations.

Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-13 11:08:28 -06:00
zhuyanlin
565964a12f driver: add clk framework
N/A

Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-12-07 01:35:45 -06:00