Commit Graph

14 Commits

Author SHA1 Message Date
Gregory Nutt
2043e1a114 IOBs: Move from driver/iob to a better location in mm/iob 2017-05-09 07:35:30 -06:00
Gregory Nutt
bfb93338f6 Move net/iob to drivers/iob so that the I/O buffering feature can be available to other drivers when networking is disabled. 2017-04-20 16:08:49 -06:00
Mark Schulte
9d22f5df35 Add argument to timer irq callback 2017-03-01 08:51:15 -06:00
Gregory Nutt
ac6e552ff7 Fixes for coding standard: '*' needs to 'snuggle' with following variable name 2017-02-28 18:37:44 -06:00
Gregory Nutt
dc93340a01 Convert more drivers to use new interrupt argument structure. 2017-02-28 09:29:09 -06:00
Mark Schulte
b3222bbc8a irq_dispatch: Add argument pointer to irq_dispatch
Provide a user defined callback context for irq's, such that when
registering a callback users can provide a pointer that will get
passed back when the isr is called.
2017-02-27 06:27:56 -06:00
Gregory Nutt
1d290c2b37 setvbuf: Add support for disabling I/O buffering. Initially cut; untested. 2017-02-09 09:24:44 -06:00
Gregory Nutt
62a1f6f110 up_timer_initialize() is named incorrectly. The prefix should be the architecture name, not up_ since it is private to the architecture. up_timerisr() is similarly misnamed and should also be private since it is used only with the xyz_timerisr.c files. Also updat TODO list. 2017-02-07 10:35:04 -06:00
Gregory Nutt
3ed091376c In all implementations of _exit(), use enter_critical_section() vs. disabling local interrupts. 2017-01-13 11:08:24 -06:00
Gregory Nutt
13d00344c9 Add configuration to prevent selection of Windows native toolchains when using Ubuntu under Windows 10 2017-01-02 07:16:47 -06:00
Gregory Nutt
b0dffdc2ca Fix a number of header files with mismatched 'extern C {' and '}' 2016-11-05 07:25:05 -06:00
Paul A. Patience
912fe06a86 Add architecture-specific inttypes.h 2016-10-27 16:01:38 -04:00
Ken Pettit
1e40e03c7f Minor RISC-V update 2016-10-21 17:01:40 -06:00
Ken Pettit
201a32cf8c Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it. 2016-10-16 09:47:07 -06:00