sergiotarxz/nuttx
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90 Commits

Author SHA1 Message Date
Alan Carvalho de Assis
b1801f3fd3 tools: Add tools/initialconfig to .gitignore 2018-05-26 09:22:57 -06:00
Gregory Nutt
6fa734457d lpc43/lpc54 SDMDC: Don't enable internal DMA in the control register if not doing internal DMA. Clear pending DMA-related interrupts before enabling them. 2017-12-22 15:16:14 -06:00
Gregory Nutt
1117a6e8ce Revert "lpc43xx and lpc54xx: No handling the wide bus MMC/SD interface correctly." 
This reverts commit 4d6bf464802fa0b7bba703a24cd47c8a6772b2d2.
 2017-12-22 14:39:59 -06:00
Gregory Nutt
4d6bf46480 lpc43xx and lpc54xx: No handling the wide bus MMC/SD interface correctly. 2017-12-22 11:59:45 -06:00
Gregory Nutt
6ed875a63b Leverage the LPC54xx back to the LPC43xx (where it came from originally) 
Squashed commit of the following:

    arch/arm/src/lpc43xx:  SDMMC driver now builds for the LPC43 (provided that the proper definitions appear in the board.h file).
    arch/arm/src/lpc43xx:  Update basic changes to the ported lpc54xx driver for lpc43xx clocking and GPIOs.
    arch/arm/src/lpc43xx:  Brings in the LPC54xx SD/MMC driver with absolutely no changes other than changing all occurences of 54 to 43.
    arm/arm/src/lpc43xx:  Add build support for the lpc54 SDMMC driver.
    lpc54 SDMMC:  Check for successful data transfer last.  Checking first means that we miss errors.
 2017-12-22 08:16:19 -06:00
Gregory Nutt
793c8b785a arch/arm/src/lpc54: Missed a change in the last commit 2017-12-19 15:11:22 -06:00
Gregory Nutt
5a66684293 Squashed commit of the following: 
arch/arm/src/lpc54xx:  Adds the LPC54-specific clock configuration logic to the leveraged SD/MMC driver.
    arch/arm/src/lpc54xx:  Leveraged SD/MMC driver builds without error but is still missing clock configuration logic.
    arch/arm/src/lpc54xx:  Bring in LPC43xx SD/MMC driver from https://github.com/Smoothieware/smoothie-nuttx/tree/master/nuttx/arch/arm/src/lpc43xx
 2017-12-19 12:09:22 -06:00
Gregory Nutt
c17651e26e arch/arm/include/lpc54xx: Add SD/MMC header file. 2017-12-19 09:12:42 -06:00
Alexander Vasiljev
ac3884498f arch/arm/src/lpc43: UART_RX pins should be configured with input buffers enabled. Otherwise it cannot be read. 2017-11-15 07:54:09 -06:00
Alexander Vasiljev
485f0ebd40 arch/arm/src/lpc43: Add LPC43xx CAN driver 2017-11-15 07:54:09 -06:00
Andreas Bihlmaier
871756b6c0 Merged in andreasBihlmaier/nuttx/fixes-lpc43_sct_and_sgpio_headers (pull request #249) 
Fix errors in LPC43 SCT and SGPIO headers.

Approved-by: Gregory Nutt
 2017-03-09 12:52:03 +00:00
Andreas Bihlmaier
be90fbd1a1 Merged in andreasBihlmaier/nuttx/fixes-lpc43_gpdma (pull request #248) 
rename LPC43_GPDMA_GLOBAL_CONFIG (already slipped previous commit C file); fix GPDMA_CONTROL_SBSIZE_*, improve usability of GPDMA_CONTROL_{S,D} macros

Approved-by: Gregory Nutt
 2017-03-09 12:51:20 +00:00
ahb
9b023049a2 Fix errors in LPC43 SCT and SGPIO headers. 
Note: This has already been tested. However, I have to significantly clean up the actual drivers (C files) before committing them, too.
 2017-03-09 11:11:57 +01:00
ahb
aa92e14512 rename LPC43_GPDMA_GLOBAL_CONFIG (already slipped previous commit C file); fix GPDMA_CONTROL_SBSIZE_*, improve usability of GPDMA_CONTROL_{S,D} macros 2017-03-09 11:05:20 +01:00
ahb
41c79c431b add missing PINCONF_INBUFFER in several places of lpc4310203050_pinconfig.h 2017-03-09 10:48:25 +01:00
Alan Carvalho de Assis
25bf212ab4 LPC43 pinset definitions: Add more 1 bit to pinset to reach SFSCLK0-SFSCLK3 2017-01-26 13:31:29 -06:00
Alan Carvalho de Assis
cf2beeb1cf LPC43: Remove PINCONFIG_DIGITAL 2017-01-26 13:26:55 -06:00
Alan Carvalho de Assis
35023e4c6d LPC43xx SD card: Correct pin configuration options needed for SD card pins. 2016-12-09 10:54:17 -06:00
Alan Carvalho de Assis
cd119ad544 GPDMA driver for the LPC43xx. The GPDMA block is basically the same as the LPC17xx. Only the clock configuration is different and LPC43xx has four different DMA request sources, where LPC17xx has only two. 2016-12-01 18:01:04 -06:00
Alan Carvalho de Assis
8b3a6d1eca LPC43 SD/MMC: Correct some git definitions on SMMC control register in lpc43_sdmmc.h 2016-11-30 14:50:32 -06:00
Alan Carvalho de Assis
7dbc25b02b LPC43xx: Add timer driver; configs/bambino-200e: Add support for timer driver 2016-11-23 13:33:51 -06:00
Gregory Nutt
b0dffdc2ca Fix a number of header files with mismatched 'extern C {' and '}' 2016-11-05 07:25:05 -06:00
Vytautas Lukenskas
fd1de92016 There are some small problems in LPC43xx RS485 mode configuration. In particular: 1. UART0,2,3 do not have DTR pins (different from UART1), so, Kconfig needs to be adjusted. 2. lpc43_uart.c in RS485 mode only configures DIR pin, but doesn't enable pin output for UART0,2,3. 3. should be option to reverse DIR control pin output polarity. 4. lpc43xx/chip/lpc43_uart.h doesn't have USART3 definitions. NOTE: I didn't modified and didn't tested USART1, as it has different hardware. From Vytautas Lukenskas. 2016-09-30 08:51:49 -06:00
Vytautas Lukenskas
f222d37aa7 Extend LPC43xx EMC code to support SDRAM on a dynamic memory interface. 2016-07-19 07:11:04 -06:00
Gregory Nutt
317bf064a8 i.MX6: Clean up some initializers 2016-05-24 07:44:36 -06:00
Alexander Vasiljev
ad6f37edfa Adds definitions for the LPC4337jet100 chip. 2016-05-24 07:03:50 -06:00
Alexander Vasiljev
b43fcd6f99 LPC43xx: Add AES support. 2016-05-23 08:03:32 -06:00
Gregory Nutt
b8ee28cb57 lpc4357fet256_pinconfig.h has wrong ethernet pins configuration (slow slew rate, somewhere inbuffer should be used). From Vytautas Lukenskas 2016-04-20 06:37:26 -06:00
Dave Marples
41b56a5f09 Enable the Ethernet for the LPC4330 and autonegotiation when the MAC is a LAN8720. 2016-02-18 19:07:33 -06:00
Gregory Nutt
6c2cd3edee Changes from review of last pull request 2016-01-15 10:55:58 -06:00
Lok Tep
6c872c3162 ssp in pin buffer fix 2015-12-07 23:13:14 +01:00
Lok Tep
fd74d0b625 spifi 2015-12-01 23:09:31 +01:00
Lok Tep
9a527ad3ed adc: timer mode 2015-12-01 14:53:52 +01:00
Lok Tep
dd4ef7b2e9 rename to offset 2015-11-25 21:07:14 +01:00
Lok Tep
70ab09976a setup out with data 
ep 5-6
fixex
 2015-11-25 21:07:00 +01:00
Lok Tep
5d689fedcf spifi regs 2015-11-17 18:02:08 +01:00
Lok Tep
1f8c0fdcdb timer base name difference 2015-11-09 14:34:59 +01:00
Lok Tep
08224b8606 after debug 2015-11-01 23:11:37 +01:00
Gregory Nutt
3acc09c056 LPC43xx: Remove unused .c file picked up in a recent merge 2015-10-01 07:18:07 -06:00
Gregory Nutt
2a6c71e850 Costmetic changes from last merge to better conform to the coding standard 2015-09-29 09:06:16 -06:00
pkolesnikov
e6ab9cc339 init hw, draft 2015-09-29 15:53:20 +02:00
Ilya Averyanov
0fea56cd8b LPC43xx: Add ehci driver. 2015-09-10 07:23:03 -06:00
Ilya Averyanov
a3bc46f629 LPC43xx: Add Ethernet support. From Ilya Averyanov 2015-09-02 09:01:41 -06:00
Ilya Averyanov
8c52786395 LPC43xx: Fix missing #define in eeprom. From Ilya Averyanov 2015-09-01 08:08:09 -06:00
Sebastien Lorquet
7f7082f938 Extend STM32 Ethernet operating frequency to 180MHz: 
-Extend frequency range options to 180 MHz for STM32 ETH_MACMIIA_CR
-Fix a typo in a frequency range option in LPC43
-Only configure the PPS GPIO if the PTP protocol is enabled

From Sebastien Lorquet
 2015-07-17 07:44:12 -06:00
Alessandro Temil
d4cd35af5f More changes to LPC3450 pin configuration: The hardware ETM pins will not toggle unless the SLEW FAST bit is set. From Alessandro Temil. 2015-07-09 13:36:22 -06:00
Alessandro Temil
d687bedf36 Correct some LPC4350 GPIO pin configurations. From Alessandro Temil 2015-07-09 12:09:00 -06:00
Gregory Nutt
29136e51cc Clean up and review of header files for conformance to standards 2015-06-12 19:26:01 -06:00
Gregory Nutt
7bd3d5eaf1 Clean up and review of header files for conformance to standards 2015-06-12 19:00:52 -06:00
Gregory Nutt
d78464404a Get USART 2 & 3 working on lpc4357-evb. These changes are required to get USART 2 and 3 working on the Embest development board. From Toby Duckworth 2015-01-26 07:33:22 -06:00