As suggested in PR:12530, changed the default names of ESP32S3WROOM chips to ESP32S3WROOM1N4,
ESP32S3WROOM2N16R8, ESP32S3WROOM2N32R8, ESP32S3MINI1N8.
Also regenerated all the defconfigs for board configurations.
Added a custom ESP32S3 module for custom flash configurations.
Declared ESP32S3_PSRAM_8M variable with prompt
we can use g_cpu_lockset to determine whether we are currently in the scheduling lock,
and all accesses and modifications to g_cpu_lockset, g_cpu_irqlock, g_cpu_irqset
are in the critical section, so we can directly operate on it.
test:
We can use qemu for testing.
compiling
make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20
running
qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx
Signed-off-by: hujun5 <hujun5@xiaomi.com>
- In some cases, an operational Ethernet MAC may have no PHY, for example
when the system has a direct RMII MAC-to-MAC link.
- New config option STM32H7_NO_PHY
- With this option, PHY-specific code in the ethernet driver is not built
- This option is inherently incompatible with autonegotiation and speed and
duplex settings must be compiled in
To simplify processing, the existed SBI function code is just
invoking the ecall and return the error value. This omits
potential return value in "a1", which is defined in SBI doc.
Add the "sbiret" struct so it can handle all the return value.
In addition, there are some minor improvement:
1. move the SBI related interface to a separate file to make it clean.
2. add all necessary SBI ecall interface macro until version 2.0.
3. add an utilty function to convert sbi error numner to standard
error number.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
This revises `getregXX` and `setregXX` for rv64ilp32 to overcome
the limitation of compiler generated addresses and reach devices
in a larger range.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This PR adds support for Milk-V Duo S 64-bit RISC-V SBC, based on SOPHGO SG2000 SoC (T-Head C906 Core). Most of the code is derived from NuttX for Ox64 BL808. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-sg2000
Modified Files:
`boards/Kconfig`: Added Milk-V Duo S board
`arch/risc-v/src/sg2000/sg2000_timerisr.c`: Fixed MTIMER_FREQ for sleep() to work correctly
New Files in boards/risc-v/sg2000/milkv_duos:
`src/sg2000_appinit.c`: Startup Code
`include/board.h`: Milk-V Duo S Definitions
`include/board_memorymap.h`: Memory Map
`src/etc/init.d/rc.sysinit`, `rcS`: Startup Script
`src/.gitignore`: Ignore the tmp filesystem
`scripts/ld.script`: Linker Script
`scripts/Make.defs`: Milk-V Duo S Makefile
`src/Makefile`: Milk-V Duo S Makefile
`Kconfig`: Milk-V Duo S Config
`configs/nsh/defconfig`: Build Config for `milkv_duos:nsh`
Updated Documentation:
`platforms/risc-v/sg2000/index.rst`: New page for SOPHGO SG2000 SoC
`platforms/risc-v/sg2000/boards/milkv_duos/index.rst`: Building and booting NuttX for Milk-V Duo S
This PR adds support for the SOPHGO SG2000 SoC, based on T-Head C906 64-bit RISC-V Core. This will be used by the upcoming port of NuttX for Milk-V Duo S SBC.
Most of the code was derived from NuttX for Ox64 BL808. The source files are explained in the articles here: https://github.com/lupyuen/nuttx-sg2000
Modified Files in arch/risc-v:
`Kconfig`: Added ARCH_CHIP_SG2000 for SG2000 SoC
New Files in arch/risc-v:
`include/sg2000/chip.h`: SG2000 Definitions
`include/sg2000/irq.h`: External Interrupts
`src/sg2000/chip.h`: Interrupt Stack Macro
`src/sg2000/sg2000_allocateheap.c`: Kernel Heap
`src/sg2000/sg2000_head.S`: Linux Header and Boot Code
`src/sg2000/sg2000_irq.c`: Configure Interrupts
`src/sg2000/sg2000_irq_dispatch.c`: Dispatch Interrupts
`src/sg2000/sg2000_memorymap.h`: Memory Map
`src/sg2000/sg2000_mm_init.c`, `sg2000_mm_init.h`: Memory Mgmt
`src/sg2000/sg2000_pgalloc.c`: Page Allocator
`src/sg2000/sg2000_start.c`: Startup Code
`src/sg2000/sg2000_timerisr.c`: Timer Interrupt
`src/sg2000/hardware/sg2000_memorymap.h`: PLIC and UART Base Address
`src/sg2000/hardware/sg2000_plic.h`: PLIC Register Addresses
`src/sg2000/Kconfig`: SG2000 Config
`src/sg2000/Make.defs`: Makefile
There is no need to use kernel build for S-mode all the time. As cpu
scratch is supported for non kernel mode build, it is possible to use
flat build for S-mode.
Add flat build support for risc-v S mode.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
This applies uintreg_t in risc-v commons and fixes araised ci issues
for multiple devices. The FLAT build runs on qemu-rv64ilp32 target.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This adds support of rv64ilp32 toolchain available from Github repo
`ruyisdk/riscv-gnu-toolchain-rv64ilp32`. With this 32-bit nuttx can
be generated for RV64 devices.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
* arch/risc-v/src/common/Toolchain.defs
arch/xtensa/src/lx6/Toolchain.defs
arch/xtensa/src/lx7/Toolchain.defs
- Define SHMODULEFLAGS etc. for sotest/dynload
- Add --entry=__start to SHMODULEFLAGS
* boards/arm64/qemu/qemu-armv8a/scripts/Make.defs
boards/sim/sim/sim/scripts/Make.defs
- Define SHMODULEFLAGS etc. for sotest/dynload
For newer devices, IDF bootloader is not supported because the
devices are able to boot directly into NuttX or use MCUBoot to
enable OTA and security features.
This commit enables users to select the legacy bootloader (IDF
bootloader) in `menuconfig` directly. Please note, that this is a
legacy option intended to support devices already deployed and it
isn't recommended for new designs.
*Note:* ldmd2 is ldc2-wrapper, allow using dmd frontend flags.
This support may be extended to gdc (gnu) if nuttx developers demand it
or are interested in it.
Check return value of mpfs_board_pmp_setup() and
jump to mpfs_board_pmp_error() in case of error.
Signed-off-by: Jani Paalijarvi <jani.paalijarvi@unikie.com>
Add the address alignment to keep the constraint of ARMv7-M architecture same as RAM vector.
ARMv7-M architecture describes the vector table address alignment as following.
The Vector table must be naturally aligned to a power of two
whose alignment value is greater than or equal to (Number of Exceptions supported x 4),
with a minimum alignment of 128 bytes.
I wonder why the implementation of arm_vectors.c does not follow
this constraint of address alignment about ARMv7-M architecture.
Although RAM vector is taken care about it.
I think, as the result it was done by linker script on each board.
At our system, NuttX will be started by bootloader.
To fix the address of entry point(__start) I set the address of entry point to beginning of binary,
so the beginning of binary is not a vector table.
At this case, keeping the address alignment constraint of arm_vectors.c is needed.
The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.
This commit also removes deprecated code and makes this bootloader
configuration as default for esp32s2 targets and removes the need
for running 'make bootloader' command for it.
Signed-off-by: Almir Okato <almir.okato@espressif.com>
Cache the next timeout value in the drivers instance and update the mtimecmp value once. This is advantageous as the opensbi ecall to set the timer is expensive in systems which don't have the supervisor mode timer extension.
This patch changes how user service calls are executed:
Instead of using the common interrupt logic, execute the user service
call directly.
Why? When a user makes a service call request, all of the service call
parameters are already loaded into the correct registers, thus it makes
no sense to first clobber them and then reload them, which is what the
old logic does. It is much more effective to run the system call directly.
During a user system call the interrupts must be re-enabled, which the
new logic does as soon as we know the exception is a user service call
request.
This patch does NOT change the behavior of reserved system calls (like
switch_context), only the user service call request is affected.
